src/gallium/drivers/i915/i915_state_emit.c

   1 /**************************************************************************
   2  *
   3  * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
   4  * All Rights Reserved.
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the
   8  * "Software"), to deal in the Software without restriction, including
   9  * without limitation the rights to use, copy, modify, merge, publish,
  10  * distribute, sub license, and/or sell copies of the Software, and to
  11  * permit persons to whom the Software is furnished to do so, subject to
  12  * the following conditions:
  13  *
  14  * The above copyright notice and this permission notice (including the
  15  * next paragraph) shall be included in all copies or substantial portions
  16  * of the Software.
  17  *
  18  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  19  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  20  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
  21  * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
  22  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
  23  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
  24  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25  *
  26  **************************************************************************/
  27
  28
  29 #include "i915_reg.h"
  30 #include "i915_context.h"
  31 #include "i915_batch.h"
  32 #include "i915_debug.h"
  33 #include "i915_resource.h"
  34
  35 #include "pipe/p_context.h"
  36 #include "pipe/p_defines.h"
  37
  38 #include "util/u_math.h"
  39
  40 static unsigned translate_format( enum pipe_format format )
  41 {
  42    switch (format) {
  43    case PIPE_FORMAT_B8G8R8A8_UNORM:
  44       return COLOR_BUF_ARGB8888;
  45    case PIPE_FORMAT_B5G6R5_UNORM:
  46       return COLOR_BUF_RGB565;
  47    default:
  48       assert(0);
  49       return 0;
  50    }
  51 }
  52
  53 static unsigned translate_depth_format( enum pipe_format zformat )
  54 {
  55    switch (zformat) {
  56    case PIPE_FORMAT_Z24X8_UNORM:
  57    case PIPE_FORMAT_Z24_UNORM_S8_USCALED:
  58       return DEPTH_FRMT_24_FIXED_8_OTHER;
  59    case PIPE_FORMAT_Z16_UNORM:
  60       return DEPTH_FRMT_16_FIXED;
  61    default:
  62       assert(0);
  63       return 0;
  64    }
  65 }
  66
  67
  68 /**
  69  * Examine framebuffer state to determine width, height.
  70  */
  71 static boolean
  72 framebuffer_size(const struct pipe_framebuffer_state *fb,
  73                  uint *width, uint *height)
  74 {
  75    if (fb->cbufs[0]) {
  76       *width = fb->cbufs[0]->width;
  77       *height = fb->cbufs[0]->height;
  78       return TRUE;
  79    }
  80    else if (fb->zsbuf) {
  81       *width = fb->zsbuf->width;
  82       *height = fb->zsbuf->height;
  83       return TRUE;
  84    }
  85    else {
  86       *width = *height = 0;
  87       return FALSE;
  88    }
  89 }
  90
  91 static inline uint32_t
  92 buf_3d_tiling_bits(enum i915_winsys_buffer_tile tiling)
  93 {
  94          uint32_t tiling_bits = 0;
  95
  96          switch (tiling) {
  97          case I915_TILE_Y:
  98             tiling_bits |= BUF_3D_TILE_WALK_Y;
  99          case I915_TILE_X:
 100             tiling_bits |= BUF_3D_TILED_SURFACE;
 101          case I915_TILE_NONE:
 102             break;
 103          }
 104
 105          return tiling_bits;
 106 }
 107
 108 /* Push the state into the sarea and/or texture memory.
 109  */
 110 void
 111 i915_emit_hardware_state(struct i915_context *i915 )
 112 {
 113    /* XXX: there must be an easier way */
 114    const unsigned dwords = ( 14 +
 115                              7 +
 116                              I915_MAX_DYNAMIC +
 117                              8 +
 118                              2 + I915_TEX_UNITS*3 +
 119                              2 + I915_TEX_UNITS*3 +
 120                              2 + I915_MAX_CONSTANT*4 +
 121 #if 0
 122                              i915->current.program_len +
 123 #else
 124                              i915->fs->program_len +
 125 #endif
 126                              6
 127                            ) * 3/2; /* plus 50% margin */
 128    const unsigned relocs = ( I915_TEX_UNITS +
 129                              3
 130                            ) * 3/2; /* plus 50% margin */
 131
 132    uintptr_t save_ptr;
 133    size_t save_relocs;
 134
 135    if (I915_DBG_ON(DBG_ATOMS))
 136       i915_dump_hardware_dirty(i915, __FUNCTION__);
 137
 138    if(!BEGIN_BATCH(dwords, relocs)) {
 139       FLUSH_BATCH(NULL);
 140       assert(BEGIN_BATCH(dwords, relocs));
 141    }
 142
 143    save_ptr = (uintptr_t)i915->batch->ptr;
 144    save_relocs = i915->batch->relocs;
 145
 146    /* 14 dwords, 0 relocs */
 147    if (i915->hardware_dirty & I915_HW_INVARIANT)
 148    {
 149       OUT_BATCH(_3DSTATE_AA_CMD |
 150                 AA_LINE_ECAAR_WIDTH_ENABLE |
 151                 AA_LINE_ECAAR_WIDTH_1_0 |
 152                 AA_LINE_REGION_WIDTH_ENABLE | AA_LINE_REGION_WIDTH_1_0);
 153
 154       OUT_BATCH(_3DSTATE_DFLT_DIFFUSE_CMD);
 155       OUT_BATCH(0);
 156
 157       OUT_BATCH(_3DSTATE_DFLT_SPEC_CMD);
 158       OUT_BATCH(0);
 159
 160       OUT_BATCH(_3DSTATE_DFLT_Z_CMD);
 161       OUT_BATCH(0);
 162
 163       OUT_BATCH(_3DSTATE_COORD_SET_BINDINGS |
 164                 CSB_TCB(0, 0) |
 165                 CSB_TCB(1, 1) |
 166                 CSB_TCB(2, 2) |
 167                 CSB_TCB(3, 3) |
 168                 CSB_TCB(4, 4) |
 169                 CSB_TCB(5, 5) |
 170                 CSB_TCB(6, 6) |
 171                 CSB_TCB(7, 7));
 172
 173       OUT_BATCH(_3DSTATE_RASTER_RULES_CMD |
 174                 ENABLE_POINT_RASTER_RULE |
 175                 OGL_POINT_RASTER_RULE |
 176                 ENABLE_LINE_STRIP_PROVOKE_VRTX |
 177                 ENABLE_TRI_FAN_PROVOKE_VRTX |
 178                 LINE_STRIP_PROVOKE_VRTX(1) |
 179                 TRI_FAN_PROVOKE_VRTX(2) |
 180                 ENABLE_TEXKILL_3D_4D |
 181                 TEXKILL_4D);
 182
 183       OUT_BATCH(_3DSTATE_DEPTH_SUBRECT_DISABLE);
 184
 185       /* disable indirect state for now
 186        */
 187       OUT_BATCH(_3DSTATE_LOAD_INDIRECT | 0);
 188       OUT_BATCH(0);
 189    }
 190
 191    /* 7 dwords, 1 relocs */
 192    if (i915->hardware_dirty & I915_HW_IMMEDIATE)
 193    {
 194       /* remove unwatned bits and S7 */
 195       unsigned dirty = (1 << I915_IMMEDIATE_S0 | 1 << I915_IMMEDIATE_S1 |
 196                         1 << I915_IMMEDIATE_S2 | 1 << I915_IMMEDIATE_S3 |
 197                         1 << I915_IMMEDIATE_S3 | 1 << I915_IMMEDIATE_S4 |
 198                         1 << I915_IMMEDIATE_S5 | 1 << I915_IMMEDIATE_S6) &
 199                        i915->immediate_dirty;
 200       int i, num = util_bitcount(dirty);
 201       assert(num && num <= I915_MAX_IMMEDIATE);
 202
 203       OUT_BATCH(_3DSTATE_LOAD_STATE_IMMEDIATE_1 |
 204                 dirty << 4 | (num - 1));
 205
 206       if (i915->immediate_dirty & (1 << I915_IMMEDIATE_S0)) {
 207          if (i915->vbo)
 208             OUT_RELOC(i915->vbo, I915_USAGE_VERTEX,
 209                       i915->current.immediate[I915_IMMEDIATE_S0]);
 210          else
 211             OUT_BATCH(0);
 212       }
 213
 214       for (i = 1; i < I915_MAX_IMMEDIATE; i++) {
 215          if (dirty & (1 << i))
 216             OUT_BATCH(i915->current.immediate[i]);
 217       }
 218    }
 219
 220 #if 01
 221    /* I915_MAX_DYNAMIC dwords, 0 relocs */
 222    if (i915->hardware_dirty & I915_HW_DYNAMIC)
 223    {
 224       int i;
 225       for (i = 0; i < I915_MAX_DYNAMIC; i++) {
 226          if (i915->dynamic_dirty & (1 << i));
 227             OUT_BATCH(i915->current.dynamic[i]);
 228       }
 229    }
 230 #endif
 231
 232 #if 01
 233    /* 8 dwords, 2 relocs */
 234    if (i915->hardware_dirty & I915_HW_STATIC)
 235    {
 236       struct pipe_surface *cbuf_surface = i915->framebuffer.cbufs[0];
 237       struct pipe_surface *depth_surface = i915->framebuffer.zsbuf;
 238
 239       if (cbuf_surface) {
 240          struct i915_texture *tex = i915_texture(cbuf_surface->texture);
 241          assert(tex);
 242
 243          OUT_BATCH(_3DSTATE_BUF_INFO_CMD);
 244
 245          OUT_BATCH(BUF_3D_ID_COLOR_BACK |
 246                    BUF_3D_PITCH(tex->stride) |  /* pitch in bytes */
 247                    buf_3d_tiling_bits(tex->tiling));
 248
 249          OUT_RELOC(tex->buffer,
 250                    I915_USAGE_RENDER,
 251                    0);
 252       }
 253
 254       /* What happens if no zbuf??
 255        */
 256       if (depth_surface) {
 257          struct i915_texture *tex = i915_texture(depth_surface->texture);
 258          unsigned offset = i915_texture_offset(tex, depth_surface->u.tex.level,
 259                                                depth_surface->u.tex.first_layer);
 260          assert(tex);
 261          assert(offset == 0);
 262
 263          OUT_BATCH(_3DSTATE_BUF_INFO_CMD);
 264
 265          assert(tex);
 266          OUT_BATCH(BUF_3D_ID_DEPTH |
 267                    BUF_3D_PITCH(tex->stride) |  /* pitch in bytes */
 268                    buf_3d_tiling_bits(tex->tiling));
 269
 270          OUT_RELOC(tex->buffer,
 271                    I915_USAGE_RENDER,
 272                    0);
 273       }
 274
 275       {
 276          unsigned cformat, zformat = 0;
 277
 278          if (cbuf_surface)
 279             cformat = cbuf_surface->format;
 280          else
 281             cformat = PIPE_FORMAT_B8G8R8A8_UNORM; /* arbitrary */
 282          cformat = translate_format(cformat);
 283
 284          if (depth_surface)
 285             zformat = translate_depth_format( i915->framebuffer.zsbuf->format );
 286
 287          OUT_BATCH(_3DSTATE_DST_BUF_VARS_CMD);
 288          OUT_BATCH(DSTORG_HORT_BIAS(0x8) | /* .5 */
 289                    DSTORG_VERT_BIAS(0x8) | /* .5 */
 290                    LOD_PRECLAMP_OGL |
 291                    TEX_DEFAULT_COLOR_OGL |
 292                    cformat |
 293                    zformat );
 294       }
 295    }
 296 #endif
 297
 298 #if 01
 299       /* texture images */
 300       /* 2 + I915_TEX_UNITS*3 dwords, I915_TEX_UNITS relocs */
 301       if (i915->hardware_dirty & (I915_HW_MAP | I915_HW_SAMPLER))
 302       {
 303          const uint nr = i915->current.sampler_enable_nr;
 304          if (nr) {
 305             const uint enabled = i915->current.sampler_enable_flags;
 306             uint unit;
 307             uint count = 0;
 308             OUT_BATCH(_3DSTATE_MAP_STATE | (3 * nr));
 309             OUT_BATCH(enabled);
 310             for (unit = 0; unit < I915_TEX_UNITS; unit++) {
 311                if (enabled & (1 << unit)) {
 312                   struct i915_texture *texture = i915_texture(i915->fragment_sampler_views[unit]->texture);
 313                   struct i915_winsys_buffer *buf = texture->buffer;
 314                   assert(buf);
 315
 316                   count++;
 317
 318                   OUT_RELOC(buf, I915_USAGE_SAMPLER, 0);
 319                   OUT_BATCH(i915->current.texbuffer[unit][0]); /* MS3 */
 320                   OUT_BATCH(i915->current.texbuffer[unit][1]); /* MS4 */
 321                }
 322             }
 323             assert(count == nr);
 324          }
 325       }
 326 #endif
 327
 328 #if 01
 329    /* samplers */
 330    /* 2 + I915_TEX_UNITS*3 dwords, 0 relocs */
 331    if (i915->hardware_dirty & I915_HW_SAMPLER)
 332    {
 333       if (i915->current.sampler_enable_nr) {
 334          int i;
 335
 336          OUT_BATCH( _3DSTATE_SAMPLER_STATE |
 337                     (3 * i915->current.sampler_enable_nr) );
 338
 339          OUT_BATCH( i915->current.sampler_enable_flags );
 340
 341          for (i = 0; i < I915_TEX_UNITS; i++) {
 342             if (i915->current.sampler_enable_flags & (1<<i)) {
 343                OUT_BATCH( i915->current.sampler[i][0] );
 344                OUT_BATCH( i915->current.sampler[i][1] );
 345                OUT_BATCH( i915->current.sampler[i][2] );
 346             }
 347          }
 348       }
 349    }
 350 #endif
 351
 352 #if 01
 353    /* constants */
 354    /* 2 + I915_MAX_CONSTANT*4 dwords, 0 relocs */
 355    if (i915->hardware_dirty & I915_HW_CONSTANTS)
 356    {
 357       /* Collate the user-defined constants with the fragment shader's
 358        * immediates according to the constant_flags[] array.
 359        */
 360       const uint nr = i915->fs->num_constants;
 361       if (nr) {
 362          uint i;
 363
 364          OUT_BATCH( _3DSTATE_PIXEL_SHADER_CONSTANTS | (nr * 4) );
 365          OUT_BATCH((1 << nr) - 1);
 366
 367          for (i = 0; i < nr; i++) {
 368             const uint *c;
 369             if (i915->fs->constant_flags[i] == I915_CONSTFLAG_USER) {
 370                /* grab user-defined constant */
 371                c = (uint *) i915_buffer(i915->constants[PIPE_SHADER_FRAGMENT])->data;
 372                c += 4 * i;
 373             }
 374             else {
 375                /* emit program constant */
 376                c = (uint *) i915->fs->constants[i];
 377             }
 378 #if 0 /* debug */
 379             {
 380                float *f = (float *) c;
 381                printf("Const %2d: %f %f %f %f %s\n", i, f[0], f[1], f[2], f[3],
 382                       (i915->fs->constant_flags[i] == I915_CONSTFLAG_USER
 383                        ? "user" : "immediate"));
 384             }
 385 #endif
 386             OUT_BATCH(*c++);
 387             OUT_BATCH(*c++);
 388             OUT_BATCH(*c++);
 389             OUT_BATCH(*c++);
 390          }
 391       }
 392    }
 393 #endif
 394
 395 #if 01
 396    /* Fragment program */
 397    /* i915->current.program_len dwords, 0 relocs */
 398    if (i915->hardware_dirty & I915_HW_PROGRAM)
 399    {
 400       uint i;
 401       /* we should always have, at least, a pass-through program */
 402       assert(i915->fs->program_len > 0);
 403       for (i = 0; i < i915->fs->program_len; i++) {
 404          OUT_BATCH(i915->fs->program[i]);
 405       }
 406    }
 407 #endif
 408
 409 #if 01
 410    /* drawing surface size */
 411    /* 6 dwords, 0 relocs */
 412    if (i915->hardware_dirty & I915_HW_STATIC)
 413    {
 414       uint w, h;
 415       struct pipe_surface *cbuf_surface = i915->framebuffer.cbufs[0];
 416       unsigned x, y;
 417       int layer;
 418       uint32_t draw_offset;
 419       boolean ret;
 420
 421       ret = framebuffer_size(&i915->framebuffer, &w, &h);
 422       assert(ret);
 423
 424       if (cbuf_surface) {
 425          struct i915_texture *tex = i915_texture(cbuf_surface->texture);
 426          layer = cbuf_surface->u.tex.first_layer;
 427
 428          x = tex->image_offset[cbuf_surface->u.tex.level][layer].nblocksx;
 429          y = tex->image_offset[cbuf_surface->u.tex.level][layer].nblocksy;
 430
 431       } else
 432          x = y = 0;
 433
 434       draw_offset = x | (y << 16);
 435
 436       /* XXX flush only required when the draw_offset changes! */
 437       OUT_BATCH(MI_FLUSH | INHIBIT_FLUSH_RENDER_CACHE);
 438       OUT_BATCH(_3DSTATE_DRAW_RECT_CMD);
 439       OUT_BATCH(DRAW_RECT_DIS_DEPTH_OFS);
 440       OUT_BATCH(draw_offset);
 441       OUT_BATCH((w - 1 + x) | ((h - 1 + y) << 16));
 442       OUT_BATCH(draw_offset);
 443    }
 444 #endif
 445
 446    I915_DBG(DBG_EMIT, "%s: used %d dwords, %d relocs\n", __FUNCTION__,
 447             ((uintptr_t)i915->batch->ptr - save_ptr) / 4,
 448             i915->batch->relocs - save_relocs);
 449
 450    i915->hardware_dirty = 0;
 451    i915->immediate_dirty = 0;
 452    i915->dynamic_dirty = 0;
 453 }