Merge branch '7.8'
[mesa.git] / src / gallium / drivers / i915 / i915_state_emit.c
1 /**************************************************************************
2 *
3 * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 **************************************************************************/
27
28
29 #include "i915_reg.h"
30 #include "i915_context.h"
31 #include "i915_batch.h"
32 #include "i915_reg.h"
33
34 #include "pipe/p_context.h"
35 #include "pipe/p_defines.h"
36
37 static unsigned translate_format( enum pipe_format format )
38 {
39 switch (format) {
40 case PIPE_FORMAT_B8G8R8A8_UNORM:
41 return COLOR_BUF_ARGB8888;
42 case PIPE_FORMAT_B5G6R5_UNORM:
43 return COLOR_BUF_RGB565;
44 default:
45 assert(0);
46 return 0;
47 }
48 }
49
50 static unsigned translate_depth_format( enum pipe_format zformat )
51 {
52 switch (zformat) {
53 case PIPE_FORMAT_Z24S8_UNORM:
54 return DEPTH_FRMT_24_FIXED_8_OTHER;
55 case PIPE_FORMAT_Z16_UNORM:
56 return DEPTH_FRMT_16_FIXED;
57 default:
58 assert(0);
59 return 0;
60 }
61 }
62
63
64 /**
65 * Examine framebuffer state to determine width, height.
66 */
67 static boolean
68 framebuffer_size(const struct pipe_framebuffer_state *fb,
69 uint *width, uint *height)
70 {
71 if (fb->cbufs[0]) {
72 *width = fb->cbufs[0]->width;
73 *height = fb->cbufs[0]->height;
74 return TRUE;
75 }
76 else if (fb->zsbuf) {
77 *width = fb->zsbuf->width;
78 *height = fb->zsbuf->height;
79 return TRUE;
80 }
81 else {
82 *width = *height = 0;
83 return FALSE;
84 }
85 }
86
87
88 /* Push the state into the sarea and/or texture memory.
89 */
90 void
91 i915_emit_hardware_state(struct i915_context *i915 )
92 {
93 /* XXX: there must be an easier way */
94 const unsigned dwords = ( 14 +
95 7 +
96 I915_MAX_DYNAMIC +
97 8 +
98 2 + I915_TEX_UNITS*3 +
99 2 + I915_TEX_UNITS*3 +
100 2 + I915_MAX_CONSTANT*4 +
101 #if 0
102 i915->current.program_len +
103 #else
104 i915->fs->program_len +
105 #endif
106 6
107 ) * 3/2; /* plus 50% margin */
108 const unsigned relocs = ( I915_TEX_UNITS +
109 3
110 ) * 3/2; /* plus 50% margin */
111
112 #if 0
113 debug_printf("i915_emit_hardware_state: %d dwords, %d relocs\n", dwords, relocs);
114 #endif
115
116 if(!BEGIN_BATCH(dwords, relocs)) {
117 FLUSH_BATCH(NULL);
118 assert(BEGIN_BATCH(dwords, relocs));
119 }
120
121 /* 14 dwords, 0 relocs */
122 if (i915->hardware_dirty & I915_HW_INVARIENT)
123 {
124 OUT_BATCH(_3DSTATE_AA_CMD |
125 AA_LINE_ECAAR_WIDTH_ENABLE |
126 AA_LINE_ECAAR_WIDTH_1_0 |
127 AA_LINE_REGION_WIDTH_ENABLE | AA_LINE_REGION_WIDTH_1_0);
128
129 OUT_BATCH(_3DSTATE_DFLT_DIFFUSE_CMD);
130 OUT_BATCH(0);
131
132 OUT_BATCH(_3DSTATE_DFLT_SPEC_CMD);
133 OUT_BATCH(0);
134
135 OUT_BATCH(_3DSTATE_DFLT_Z_CMD);
136 OUT_BATCH(0);
137
138 OUT_BATCH(_3DSTATE_COORD_SET_BINDINGS |
139 CSB_TCB(0, 0) |
140 CSB_TCB(1, 1) |
141 CSB_TCB(2, 2) |
142 CSB_TCB(3, 3) |
143 CSB_TCB(4, 4) |
144 CSB_TCB(5, 5) |
145 CSB_TCB(6, 6) |
146 CSB_TCB(7, 7));
147
148 OUT_BATCH(_3DSTATE_RASTER_RULES_CMD |
149 ENABLE_POINT_RASTER_RULE |
150 OGL_POINT_RASTER_RULE |
151 ENABLE_LINE_STRIP_PROVOKE_VRTX |
152 ENABLE_TRI_FAN_PROVOKE_VRTX |
153 LINE_STRIP_PROVOKE_VRTX(1) |
154 TRI_FAN_PROVOKE_VRTX(2) |
155 ENABLE_TEXKILL_3D_4D |
156 TEXKILL_4D);
157
158 /* Need to initialize this to zero.
159 */
160 OUT_BATCH(_3DSTATE_LOAD_STATE_IMMEDIATE_1 | I1_LOAD_S(3) | (0));
161 OUT_BATCH(0);
162
163 OUT_BATCH(_3DSTATE_DEPTH_SUBRECT_DISABLE);
164
165 /* disable indirect state for now
166 */
167 OUT_BATCH(_3DSTATE_LOAD_INDIRECT | 0);
168 OUT_BATCH(0);
169 }
170
171 /* 7 dwords, 1 relocs */
172 if (i915->hardware_dirty & I915_HW_IMMEDIATE)
173 {
174 OUT_BATCH(_3DSTATE_LOAD_STATE_IMMEDIATE_1 |
175 I1_LOAD_S(0) |
176 I1_LOAD_S(1) |
177 I1_LOAD_S(2) |
178 I1_LOAD_S(4) |
179 I1_LOAD_S(5) |
180 I1_LOAD_S(6) |
181 (5));
182
183 if(i915->vbo)
184 OUT_RELOC(i915->vbo,
185 I915_USAGE_VERTEX,
186 i915->current.immediate[I915_IMMEDIATE_S0]);
187 else
188 /* FIXME: we should not do this */
189 OUT_BATCH(0);
190 OUT_BATCH(i915->current.immediate[I915_IMMEDIATE_S1]);
191 OUT_BATCH(i915->current.immediate[I915_IMMEDIATE_S2]);
192 OUT_BATCH(i915->current.immediate[I915_IMMEDIATE_S4]);
193 OUT_BATCH(i915->current.immediate[I915_IMMEDIATE_S5]);
194 OUT_BATCH(i915->current.immediate[I915_IMMEDIATE_S6]);
195 }
196
197 /* I915_MAX_DYNAMIC dwords, 0 relocs */
198 if (i915->hardware_dirty & I915_HW_DYNAMIC)
199 {
200 int i;
201 for (i = 0; i < I915_MAX_DYNAMIC; i++) {
202 OUT_BATCH(i915->current.dynamic[i]);
203 }
204 }
205
206 /* 8 dwords, 2 relocs */
207 if (i915->hardware_dirty & I915_HW_STATIC)
208 {
209 struct pipe_surface *cbuf_surface = i915->framebuffer.cbufs[0];
210 struct pipe_surface *depth_surface = i915->framebuffer.zsbuf;
211
212 if (cbuf_surface) {
213 unsigned ctile = BUF_3D_USE_FENCE;
214 struct i915_texture *tex = (struct i915_texture *)
215 cbuf_surface->texture;
216 assert(tex);
217
218 if (tex && tex->sw_tiled) {
219 ctile = BUF_3D_TILED_SURFACE;
220 }
221
222 OUT_BATCH(_3DSTATE_BUF_INFO_CMD);
223
224 OUT_BATCH(BUF_3D_ID_COLOR_BACK |
225 BUF_3D_PITCH(tex->stride) | /* pitch in bytes */
226 ctile);
227
228 OUT_RELOC(tex->buffer,
229 I915_USAGE_RENDER,
230 cbuf_surface->offset);
231 }
232
233 /* What happens if no zbuf??
234 */
235 if (depth_surface) {
236 unsigned ztile = BUF_3D_USE_FENCE;
237 struct i915_texture *tex = (struct i915_texture *)
238 depth_surface->texture;
239 assert(tex);
240
241 if (tex && tex->sw_tiled) {
242 ztile = BUF_3D_TILED_SURFACE;
243 }
244
245 OUT_BATCH(_3DSTATE_BUF_INFO_CMD);
246
247 assert(tex);
248 OUT_BATCH(BUF_3D_ID_DEPTH |
249 BUF_3D_PITCH(tex->stride) | /* pitch in bytes */
250 ztile);
251
252 OUT_RELOC(tex->buffer,
253 I915_USAGE_RENDER,
254 depth_surface->offset);
255 }
256
257 {
258 unsigned cformat, zformat = 0;
259
260 if (cbuf_surface)
261 cformat = cbuf_surface->format;
262 else
263 cformat = PIPE_FORMAT_B8G8R8A8_UNORM; /* arbitrary */
264 cformat = translate_format(cformat);
265
266 if (depth_surface)
267 zformat = translate_depth_format( i915->framebuffer.zsbuf->format );
268
269 OUT_BATCH(_3DSTATE_DST_BUF_VARS_CMD);
270 OUT_BATCH(DSTORG_HORT_BIAS(0x8) | /* .5 */
271 DSTORG_VERT_BIAS(0x8) | /* .5 */
272 LOD_PRECLAMP_OGL |
273 TEX_DEFAULT_COLOR_OGL |
274 cformat |
275 zformat );
276 }
277 }
278
279 #if 01
280 /* texture images */
281 /* 2 + I915_TEX_UNITS*3 dwords, I915_TEX_UNITS relocs */
282 if (i915->hardware_dirty & (I915_HW_MAP | I915_HW_SAMPLER))
283 {
284 const uint nr = i915->current.sampler_enable_nr;
285 if (nr) {
286 const uint enabled = i915->current.sampler_enable_flags;
287 uint unit;
288 uint count = 0;
289 OUT_BATCH(_3DSTATE_MAP_STATE | (3 * nr));
290 OUT_BATCH(enabled);
291 for (unit = 0; unit < I915_TEX_UNITS; unit++) {
292 if (enabled & (1 << unit)) {
293 struct i915_texture *texture = (struct i915_texture *)i915->fragment_sampler_views[unit]->texture;
294 struct i915_winsys_buffer *buf = texture->buffer;
295 uint offset = 0;
296 assert(buf);
297
298 count++;
299
300 OUT_RELOC(buf, I915_USAGE_SAMPLER, offset);
301 OUT_BATCH(i915->current.texbuffer[unit][0]); /* MS3 */
302 OUT_BATCH(i915->current.texbuffer[unit][1]); /* MS4 */
303 }
304 }
305 assert(count == nr);
306 }
307 }
308 #endif
309
310 #if 01
311 /* samplers */
312 /* 2 + I915_TEX_UNITS*3 dwords, 0 relocs */
313 if (i915->hardware_dirty & I915_HW_SAMPLER)
314 {
315 if (i915->current.sampler_enable_nr) {
316 int i;
317
318 OUT_BATCH( _3DSTATE_SAMPLER_STATE |
319 (3 * i915->current.sampler_enable_nr) );
320
321 OUT_BATCH( i915->current.sampler_enable_flags );
322
323 for (i = 0; i < I915_TEX_UNITS; i++) {
324 if (i915->current.sampler_enable_flags & (1<<i)) {
325 OUT_BATCH( i915->current.sampler[i][0] );
326 OUT_BATCH( i915->current.sampler[i][1] );
327 OUT_BATCH( i915->current.sampler[i][2] );
328 }
329 }
330 }
331 }
332 #endif
333
334 /* constants */
335 /* 2 + I915_MAX_CONSTANT*4 dwords, 0 relocs */
336 if (i915->hardware_dirty & I915_HW_PROGRAM)
337 {
338 /* Collate the user-defined constants with the fragment shader's
339 * immediates according to the constant_flags[] array.
340 */
341 const uint nr = i915->fs->num_constants;
342 if (nr) {
343 uint i;
344
345 OUT_BATCH( _3DSTATE_PIXEL_SHADER_CONSTANTS | (nr * 4) );
346 OUT_BATCH( (1 << (nr - 1)) | ((1 << (nr - 1)) - 1) );
347
348 for (i = 0; i < nr; i++) {
349 const uint *c;
350 if (i915->fs->constant_flags[i] == I915_CONSTFLAG_USER) {
351 /* grab user-defined constant */
352 c = (uint *) i915->current.constants[PIPE_SHADER_FRAGMENT][i];
353 }
354 else {
355 /* emit program constant */
356 c = (uint *) i915->fs->constants[i];
357 }
358 #if 0 /* debug */
359 {
360 float *f = (float *) c;
361 printf("Const %2d: %f %f %f %f %s\n", i, f[0], f[1], f[2], f[3],
362 (i915->fs->constant_flags[i] == I915_CONSTFLAG_USER
363 ? "user" : "immediate"));
364 }
365 #endif
366 OUT_BATCH(*c++);
367 OUT_BATCH(*c++);
368 OUT_BATCH(*c++);
369 OUT_BATCH(*c++);
370 }
371 }
372 }
373
374 /* Fragment program */
375 /* i915->current.program_len dwords, 0 relocs */
376 if (i915->hardware_dirty & I915_HW_PROGRAM)
377 {
378 uint i;
379 /* we should always have, at least, a pass-through program */
380 assert(i915->fs->program_len > 0);
381 for (i = 0; i < i915->fs->program_len; i++) {
382 OUT_BATCH(i915->fs->program[i]);
383 }
384 }
385
386 /* drawing surface size */
387 /* 6 dwords, 0 relocs */
388 {
389 uint w, h;
390 boolean k = framebuffer_size(&i915->framebuffer, &w, &h);
391 (void)k;
392 assert(k);
393
394 OUT_BATCH(_3DSTATE_DRAW_RECT_CMD);
395 OUT_BATCH(0);
396 OUT_BATCH(0);
397 OUT_BATCH(((w - 1) & 0xffff) | ((h - 1) << 16));
398 OUT_BATCH(0);
399 OUT_BATCH(0);
400 }
401
402
403 i915->hardware_dirty = 0;
404 }