Merge branch 'mesa_7_6_branch'
[mesa.git] / src / gallium / drivers / i915 / i915_state_immediate.c
1 /**************************************************************************
2 *
3 * Copyright 2007 Tungsten Graphics, Inc., Cedar Park, Texas.
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 **************************************************************************/
27 /*
28 * Authors:
29 * Keith Whitwell <keith@tungstengraphics.com>
30 */
31
32 #include "i915_state_inlines.h"
33 #include "i915_context.h"
34 #include "i915_state.h"
35 #include "i915_reg.h"
36 #include "util/u_memory.h"
37
38
39 /* All state expressable with the LOAD_STATE_IMMEDIATE_1 packet.
40 * Would like to opportunistically recombine all these fragments into
41 * a single packet containing only what has changed, but for now emit
42 * as multiple packets.
43 */
44
45
46
47
48 /***********************************************************************
49 * S0,S1: Vertex buffer state.
50 */
51 static void upload_S0S1(struct i915_context *i915)
52 {
53 unsigned LIS0, LIS1;
54
55 /* INTEL_NEW_VBO */
56 /* TODO: re-use vertex buffers here? */
57 LIS0 = i915->vbo_offset;
58
59 /* INTEL_NEW_VERTEX_SIZE -- do this where the vertex size is calculated!
60 */
61 {
62 unsigned vertex_size = i915->current.vertex_info.size;
63
64 LIS1 = ((vertex_size << 24) |
65 (vertex_size << 16));
66 }
67
68 /* INTEL_NEW_VBO */
69 /* TODO: use a vertex generation number to track vbo changes */
70 if (1 ||
71 i915->current.immediate[I915_IMMEDIATE_S0] != LIS0 ||
72 i915->current.immediate[I915_IMMEDIATE_S1] != LIS1)
73 {
74 i915->current.immediate[I915_IMMEDIATE_S0] = LIS0;
75 i915->current.immediate[I915_IMMEDIATE_S1] = LIS1;
76 i915->hardware_dirty |= I915_HW_IMMEDIATE;
77 }
78 }
79
80 const struct i915_tracked_state i915_upload_S0S1 = {
81 I915_NEW_VBO | I915_NEW_VERTEX_FORMAT,
82 upload_S0S1
83 };
84
85
86
87
88 /***********************************************************************
89 * S4: Vertex format, rasterization state
90 */
91 static void upload_S2S4(struct i915_context *i915)
92 {
93 unsigned LIS2, LIS4;
94
95 /* I915_NEW_VERTEX_FORMAT */
96 {
97 LIS2 = i915->current.vertex_info.hwfmt[1];
98 LIS4 = i915->current.vertex_info.hwfmt[0];
99 /*
100 debug_printf("LIS2: 0x%x LIS4: 0x%x\n", LIS2, LIS4);
101 */
102 assert(LIS4); /* should never be zero? */
103 }
104
105 LIS4 |= i915->rasterizer->LIS4;
106
107 if (LIS2 != i915->current.immediate[I915_IMMEDIATE_S2] ||
108 LIS4 != i915->current.immediate[I915_IMMEDIATE_S4]) {
109
110 i915->current.immediate[I915_IMMEDIATE_S2] = LIS2;
111 i915->current.immediate[I915_IMMEDIATE_S4] = LIS4;
112 i915->hardware_dirty |= I915_HW_IMMEDIATE;
113 }
114 }
115
116
117 const struct i915_tracked_state i915_upload_S2S4 = {
118 I915_NEW_RASTERIZER | I915_NEW_VERTEX_FORMAT,
119 upload_S2S4
120 };
121
122
123
124 /***********************************************************************
125 *
126 */
127 static void upload_S5( struct i915_context *i915 )
128 {
129 unsigned LIS5 = 0;
130
131 LIS5 |= i915->depth_stencil->stencil_LIS5;
132
133 LIS5 |= i915->blend->LIS5;
134
135 #if 0
136 /* I915_NEW_RASTERIZER */
137 if (i915->state.Polygon->OffsetFill) {
138 LIS5 |= S5_GLOBAL_DEPTH_OFFSET_ENABLE;
139 }
140 #endif
141
142
143 if (LIS5 != i915->current.immediate[I915_IMMEDIATE_S5]) {
144 i915->current.immediate[I915_IMMEDIATE_S5] = LIS5;
145 i915->hardware_dirty |= I915_HW_IMMEDIATE;
146 }
147 }
148
149 const struct i915_tracked_state i915_upload_S5 = {
150 (I915_NEW_DEPTH_STENCIL | I915_NEW_BLEND | I915_NEW_RASTERIZER),
151 upload_S5
152 };
153
154
155 /***********************************************************************
156 */
157 static void upload_S6( struct i915_context *i915 )
158 {
159 unsigned LIS6 = (2 << S6_TRISTRIP_PV_SHIFT);
160
161 /* I915_NEW_FRAMEBUFFER
162 */
163 if (i915->framebuffer.cbufs[0])
164 LIS6 |= S6_COLOR_WRITE_ENABLE;
165
166 /* I915_NEW_BLEND
167 */
168 LIS6 |= i915->blend->LIS6;
169
170 /* I915_NEW_DEPTH
171 */
172 LIS6 |= i915->depth_stencil->depth_LIS6;
173
174 if (LIS6 != i915->current.immediate[I915_IMMEDIATE_S6]) {
175 i915->current.immediate[I915_IMMEDIATE_S6] = LIS6;
176 i915->hardware_dirty |= I915_HW_IMMEDIATE;
177 }
178 }
179
180 const struct i915_tracked_state i915_upload_S6 = {
181 I915_NEW_BLEND | I915_NEW_DEPTH_STENCIL | I915_NEW_FRAMEBUFFER,
182 upload_S6
183 };
184
185
186 /***********************************************************************
187 */
188 static void upload_S7( struct i915_context *i915 )
189 {
190 unsigned LIS7;
191
192 /* I915_NEW_RASTERIZER
193 */
194 LIS7 = i915->rasterizer->LIS7;
195
196 if (LIS7 != i915->current.immediate[I915_IMMEDIATE_S7]) {
197 i915->current.immediate[I915_IMMEDIATE_S7] = LIS7;
198 i915->hardware_dirty |= I915_HW_IMMEDIATE;
199 }
200 }
201
202 const struct i915_tracked_state i915_upload_S7 = {
203 I915_NEW_RASTERIZER,
204 upload_S7
205 };
206
207
208 static const struct i915_tracked_state *atoms[] = {
209 &i915_upload_S0S1,
210 &i915_upload_S2S4,
211 &i915_upload_S5,
212 &i915_upload_S6,
213 &i915_upload_S7
214 };
215
216 /*
217 */
218 void i915_update_immediate( struct i915_context *i915 )
219 {
220 int i;
221
222 for (i = 0; i < Elements(atoms); i++)
223 if (i915->dirty & atoms[i]->dirty)
224 atoms[i]->update( i915 );
225 }