r300/compiler: implement DP2 opcode
[mesa.git] / src / gallium / drivers / i915 / i915_state_immediate.c
1 /**************************************************************************
2 *
3 * Copyright 2007 Tungsten Graphics, Inc., Cedar Park, Texas.
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 **************************************************************************/
27 /*
28 * Authors:
29 * Keith Whitwell <keith@tungstengraphics.com>
30 */
31
32 #include "i915_state_inlines.h"
33 #include "i915_context.h"
34 #include "i915_state.h"
35 #include "i915_reg.h"
36 #include "util/u_memory.h"
37
38
39 /* All state expressable with the LOAD_STATE_IMMEDIATE_1 packet.
40 * Would like to opportunistically recombine all these fragments into
41 * a single packet containing only what has changed, but for now emit
42 * as multiple packets.
43 */
44
45
46
47
48 /***********************************************************************
49 * S0,S1: Vertex buffer state.
50 */
51 static void upload_S0S1(struct i915_context *i915)
52 {
53 unsigned LIS0, LIS1;
54
55 /* I915_NEW_VBO
56 */
57 LIS0 = i915->vbo_offset;
58
59 /* I915_NEW_VERTEX_SIZE
60 */
61 /* XXX do this where the vertex size is calculated! */
62 {
63 unsigned vertex_size = i915->current.vertex_info.size;
64
65 LIS1 = ((vertex_size << 24) |
66 (vertex_size << 16));
67 }
68
69 /* I915_NEW_VBO
70 */
71 if (1 ||
72 i915->current.immediate[I915_IMMEDIATE_S0] != LIS0 ||
73 i915->current.immediate[I915_IMMEDIATE_S1] != LIS1)
74 {
75 i915->current.immediate[I915_IMMEDIATE_S0] = LIS0;
76 i915->current.immediate[I915_IMMEDIATE_S1] = LIS1;
77 i915->hardware_dirty |= I915_HW_IMMEDIATE;
78 }
79 }
80
81 const struct i915_tracked_state i915_upload_S0S1 = {
82 "imm S0 S1",
83 upload_S0S1,
84 I915_NEW_VBO | I915_NEW_VERTEX_FORMAT
85 };
86
87
88
89 /***********************************************************************
90 * S4: Vertex format, rasterization state
91 */
92 static void upload_S2S4(struct i915_context *i915)
93 {
94 unsigned LIS2, LIS4;
95
96 /* I915_NEW_VERTEX_FORMAT
97 */
98 {
99 LIS2 = i915->current.vertex_info.hwfmt[1];
100 LIS4 = i915->current.vertex_info.hwfmt[0];
101 /*
102 debug_printf("LIS2: 0x%x LIS4: 0x%x\n", LIS2, LIS4);
103 */
104 assert(LIS4); /* should never be zero? */
105 }
106
107 LIS4 |= i915->rasterizer->LIS4;
108
109 if (LIS2 != i915->current.immediate[I915_IMMEDIATE_S2] ||
110 LIS4 != i915->current.immediate[I915_IMMEDIATE_S4]) {
111
112 i915->current.immediate[I915_IMMEDIATE_S2] = LIS2;
113 i915->current.immediate[I915_IMMEDIATE_S4] = LIS4;
114 i915->hardware_dirty |= I915_HW_IMMEDIATE;
115 }
116 }
117
118 const struct i915_tracked_state i915_upload_S2S4 = {
119 "imm S2 S4",
120 upload_S2S4,
121 I915_NEW_RASTERIZER | I915_NEW_VERTEX_FORMAT
122 };
123
124
125
126 /***********************************************************************
127 */
128 static void upload_S5(struct i915_context *i915)
129 {
130 unsigned LIS5 = 0;
131
132 /* I915_NEW_DEPTH_STENCIL
133 */
134 LIS5 |= i915->depth_stencil->stencil_LIS5;
135 /* hope it's safe to set stencil ref value even if stencil test is disabled? */
136 LIS5 |= i915->stencil_ref.ref_value[0] << S5_STENCIL_REF_SHIFT;
137
138 /* I915_NEW_BLEND
139 */
140 LIS5 |= i915->blend->LIS5;
141
142 #if 0
143 /* I915_NEW_RASTERIZER
144 */
145 if (i915->state.Polygon->OffsetFill) {
146 LIS5 |= S5_GLOBAL_DEPTH_OFFSET_ENABLE;
147 }
148 #endif
149
150 if (LIS5 != i915->current.immediate[I915_IMMEDIATE_S5]) {
151 i915->current.immediate[I915_IMMEDIATE_S5] = LIS5;
152 i915->hardware_dirty |= I915_HW_IMMEDIATE;
153 }
154 }
155
156 const struct i915_tracked_state i915_upload_S5 = {
157 "imm S5",
158 upload_S5,
159 I915_NEW_DEPTH_STENCIL | I915_NEW_BLEND | I915_NEW_RASTERIZER
160 };
161
162
163
164 /***********************************************************************
165 */
166 static void upload_S6(struct i915_context *i915)
167 {
168 unsigned LIS6 = (2 << S6_TRISTRIP_PV_SHIFT);
169
170 /* I915_NEW_FRAMEBUFFER
171 */
172 if (i915->framebuffer.cbufs[0])
173 LIS6 |= S6_COLOR_WRITE_ENABLE;
174
175 /* I915_NEW_BLEND
176 */
177 LIS6 |= i915->blend->LIS6;
178
179 /* I915_NEW_DEPTH
180 */
181 LIS6 |= i915->depth_stencil->depth_LIS6;
182
183 if (LIS6 != i915->current.immediate[I915_IMMEDIATE_S6]) {
184 i915->current.immediate[I915_IMMEDIATE_S6] = LIS6;
185 i915->hardware_dirty |= I915_HW_IMMEDIATE;
186 }
187 }
188
189 const struct i915_tracked_state i915_upload_S6 = {
190 "imm s6",
191 upload_S6,
192 I915_NEW_BLEND | I915_NEW_DEPTH_STENCIL | I915_NEW_FRAMEBUFFER
193 };
194
195
196
197 /***********************************************************************
198 */
199 static void upload_S7(struct i915_context *i915)
200 {
201 unsigned LIS7;
202
203 /* I915_NEW_RASTERIZER
204 */
205 LIS7 = i915->rasterizer->LIS7;
206
207 if (LIS7 != i915->current.immediate[I915_IMMEDIATE_S7]) {
208 i915->current.immediate[I915_IMMEDIATE_S7] = LIS7;
209 i915->hardware_dirty |= I915_HW_IMMEDIATE;
210 }
211 }
212
213 const struct i915_tracked_state i915_upload_S7 = {
214 "imm S7",
215 upload_S7,
216 I915_NEW_RASTERIZER
217 };
218
219
220
221 /***********************************************************************
222 */
223 static const struct i915_tracked_state *atoms[] = {
224 &i915_upload_S0S1,
225 &i915_upload_S2S4,
226 &i915_upload_S5,
227 &i915_upload_S6,
228 &i915_upload_S7
229 };
230
231 static void update_immediate(struct i915_context *i915)
232 {
233 int i;
234
235 for (i = 0; i < Elements(atoms); i++)
236 if (i915->dirty & atoms[i]->dirty)
237 atoms[i]->update(i915);
238 }
239
240 struct i915_tracked_state i915_hw_immediate = {
241 "immediate",
242 update_immediate,
243 ~0 /* all state atoms, becuase we do internal checking */
244 };