1 /**************************************************************************
3 * Copyright 2007 Tungsten Graphics, Inc., Cedar Park, Texas.
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
26 **************************************************************************/
29 * Keith Whitwell <keith@tungstengraphics.com>
32 #include "i915_state_inlines.h"
33 #include "i915_context.h"
34 #include "i915_state.h"
36 #include "util/u_memory.h"
39 /* All state expressable with the LOAD_STATE_IMMEDIATE_1 packet.
40 * Would like to opportunistically recombine all these fragments into
41 * a single packet containing only what has changed, but for now emit
42 * as multiple packets.
48 /***********************************************************************
49 * S0,S1: Vertex buffer state.
51 static void upload_S0S1(struct i915_context
*i915
)
57 LIS0
= i915
->vbo_offset
;
59 /* I915_NEW_VERTEX_SIZE
61 /* XXX do this where the vertex size is calculated! */
63 unsigned vertex_size
= i915
->current
.vertex_info
.size
;
65 LIS1
= ((vertex_size
<< 24) |
72 i915
->current
.immediate
[I915_IMMEDIATE_S0
] != LIS0
||
73 i915
->current
.immediate
[I915_IMMEDIATE_S1
] != LIS1
)
75 i915
->current
.immediate
[I915_IMMEDIATE_S0
] = LIS0
;
76 i915
->current
.immediate
[I915_IMMEDIATE_S1
] = LIS1
;
77 i915
->hardware_dirty
|= I915_HW_IMMEDIATE
;
81 const struct i915_tracked_state i915_upload_S0S1
= {
84 I915_NEW_VBO
| I915_NEW_VERTEX_FORMAT
89 /***********************************************************************
90 * S4: Vertex format, rasterization state
92 static void upload_S2S4(struct i915_context
*i915
)
96 /* I915_NEW_VERTEX_FORMAT
99 LIS2
= i915
->current
.vertex_info
.hwfmt
[1];
100 LIS4
= i915
->current
.vertex_info
.hwfmt
[0];
102 debug_printf("LIS2: 0x%x LIS4: 0x%x\n", LIS2, LIS4);
104 assert(LIS4
); /* should never be zero? */
107 LIS4
|= i915
->rasterizer
->LIS4
;
109 if (LIS2
!= i915
->current
.immediate
[I915_IMMEDIATE_S2
] ||
110 LIS4
!= i915
->current
.immediate
[I915_IMMEDIATE_S4
]) {
112 i915
->current
.immediate
[I915_IMMEDIATE_S2
] = LIS2
;
113 i915
->current
.immediate
[I915_IMMEDIATE_S4
] = LIS4
;
114 i915
->hardware_dirty
|= I915_HW_IMMEDIATE
;
118 const struct i915_tracked_state i915_upload_S2S4
= {
121 I915_NEW_RASTERIZER
| I915_NEW_VERTEX_FORMAT
126 /***********************************************************************
128 static void upload_S5(struct i915_context
*i915
)
132 /* I915_NEW_DEPTH_STENCIL
134 LIS5
|= i915
->depth_stencil
->stencil_LIS5
;
135 /* hope it's safe to set stencil ref value even if stencil test is disabled? */
136 LIS5
|= i915
->stencil_ref
.ref_value
[0] << S5_STENCIL_REF_SHIFT
;
140 LIS5
|= i915
->blend
->LIS5
;
143 /* I915_NEW_RASTERIZER
145 if (i915
->state
.Polygon
->OffsetFill
) {
146 LIS5
|= S5_GLOBAL_DEPTH_OFFSET_ENABLE
;
150 if (LIS5
!= i915
->current
.immediate
[I915_IMMEDIATE_S5
]) {
151 i915
->current
.immediate
[I915_IMMEDIATE_S5
] = LIS5
;
152 i915
->hardware_dirty
|= I915_HW_IMMEDIATE
;
156 const struct i915_tracked_state i915_upload_S5
= {
159 I915_NEW_DEPTH_STENCIL
| I915_NEW_BLEND
| I915_NEW_RASTERIZER
164 /***********************************************************************
166 static void upload_S6(struct i915_context
*i915
)
168 unsigned LIS6
= (2 << S6_TRISTRIP_PV_SHIFT
);
170 /* I915_NEW_FRAMEBUFFER
172 if (i915
->framebuffer
.cbufs
[0])
173 LIS6
|= S6_COLOR_WRITE_ENABLE
;
177 LIS6
|= i915
->blend
->LIS6
;
181 LIS6
|= i915
->depth_stencil
->depth_LIS6
;
183 if (LIS6
!= i915
->current
.immediate
[I915_IMMEDIATE_S6
]) {
184 i915
->current
.immediate
[I915_IMMEDIATE_S6
] = LIS6
;
185 i915
->hardware_dirty
|= I915_HW_IMMEDIATE
;
189 const struct i915_tracked_state i915_upload_S6
= {
192 I915_NEW_BLEND
| I915_NEW_DEPTH_STENCIL
| I915_NEW_FRAMEBUFFER
197 /***********************************************************************
199 static void upload_S7(struct i915_context
*i915
)
203 /* I915_NEW_RASTERIZER
205 LIS7
= i915
->rasterizer
->LIS7
;
207 if (LIS7
!= i915
->current
.immediate
[I915_IMMEDIATE_S7
]) {
208 i915
->current
.immediate
[I915_IMMEDIATE_S7
] = LIS7
;
209 i915
->hardware_dirty
|= I915_HW_IMMEDIATE
;
213 const struct i915_tracked_state i915_upload_S7
= {
221 /***********************************************************************
223 static const struct i915_tracked_state
*atoms
[] = {
231 static void update_immediate(struct i915_context
*i915
)
235 for (i
= 0; i
< Elements(atoms
); i
++)
236 if (i915
->dirty
& atoms
[i
]->dirty
)
237 atoms
[i
]->update(i915
);
240 struct i915_tracked_state i915_hw_immediate
= {
243 ~0 /* all state atoms, becuase we do internal checking */