cell: put most simple state-setter functions in new cell_pipe_state.c file
[mesa.git] / src / gallium / drivers / i915simple / i915_context.c
1 /**************************************************************************
2 *
3 * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 **************************************************************************/
27
28 #include "i915_context.h"
29 #include "i915_winsys.h"
30 #include "i915_state.h"
31 #include "i915_batch.h"
32 #include "i915_texture.h"
33 #include "i915_reg.h"
34
35 #include "draw/draw_context.h"
36 #include "pipe/p_defines.h"
37 #include "pipe/p_winsys.h"
38 #include "pipe/p_util.h"
39
40
41 /**
42 * Query format support for creating a texture, drawing surface, etc.
43 * \param format the format to test
44 * \param type one of PIPE_TEXTURE, PIPE_SURFACE
45 */
46 static boolean
47 i915_is_format_supported( struct pipe_context *pipe,
48 enum pipe_format format, uint type )
49 {
50 static const enum pipe_format tex_supported[] = {
51 PIPE_FORMAT_R8G8B8A8_UNORM,
52 PIPE_FORMAT_A8R8G8B8_UNORM,
53 PIPE_FORMAT_R5G6B5_UNORM,
54 PIPE_FORMAT_U_L8,
55 PIPE_FORMAT_U_A8,
56 PIPE_FORMAT_U_I8,
57 PIPE_FORMAT_U_A8_L8,
58 PIPE_FORMAT_YCBCR,
59 PIPE_FORMAT_YCBCR_REV,
60 PIPE_FORMAT_S8Z24_UNORM,
61 PIPE_FORMAT_NONE /* list terminator */
62 };
63 static const enum pipe_format surface_supported[] = {
64 PIPE_FORMAT_A8R8G8B8_UNORM,
65 PIPE_FORMAT_R5G6B5_UNORM,
66 PIPE_FORMAT_S8Z24_UNORM,
67 /*PIPE_FORMAT_R16G16B16A16_SNORM,*/
68 PIPE_FORMAT_NONE /* list terminator */
69 };
70 const enum pipe_format *list;
71 uint i;
72
73 switch (type) {
74 case PIPE_TEXTURE:
75 list = tex_supported;
76 break;
77 case PIPE_SURFACE:
78 list = surface_supported;
79 break;
80 default:
81 assert(0);
82 }
83
84 for (i = 0; list[i] != PIPE_FORMAT_NONE; i++) {
85 if (list[i] == format)
86 return TRUE;
87 }
88
89 return FALSE;
90 }
91
92
93 static int
94 i915_get_param(struct pipe_context *pipe, int param)
95 {
96 switch (param) {
97 case PIPE_CAP_MAX_TEXTURE_IMAGE_UNITS:
98 return 8;
99 case PIPE_CAP_NPOT_TEXTURES:
100 return 1;
101 case PIPE_CAP_TWO_SIDED_STENCIL:
102 return 1;
103 case PIPE_CAP_GLSL:
104 return 0;
105 case PIPE_CAP_S3TC:
106 return 0;
107 case PIPE_CAP_ANISOTROPIC_FILTER:
108 return 0;
109 case PIPE_CAP_POINT_SPRITE:
110 return 0;
111 case PIPE_CAP_MAX_RENDER_TARGETS:
112 return 1;
113 case PIPE_CAP_OCCLUSION_QUERY:
114 return 0;
115 case PIPE_CAP_TEXTURE_SHADOW_MAP:
116 return 1;
117 case PIPE_CAP_MAX_TEXTURE_2D_LEVELS:
118 return 11; /* max 1024x1024 */
119 case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
120 return 8; /* max 128x128x128 */
121 case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
122 return 11; /* max 1024x1024 */
123 default:
124 return 0;
125 }
126 }
127
128
129 static float
130 i915_get_paramf(struct pipe_context *pipe, int param)
131 {
132 switch (param) {
133 case PIPE_CAP_MAX_LINE_WIDTH:
134 /* fall-through */
135 case PIPE_CAP_MAX_LINE_WIDTH_AA:
136 return 7.5;
137
138 case PIPE_CAP_MAX_POINT_WIDTH:
139 /* fall-through */
140 case PIPE_CAP_MAX_POINT_WIDTH_AA:
141 return 255.0;
142
143 case PIPE_CAP_MAX_TEXTURE_ANISOTROPY:
144 return 4.0;
145
146 case PIPE_CAP_MAX_TEXTURE_LOD_BIAS:
147 return 16.0;
148
149 default:
150 return 0;
151 }
152 }
153
154
155 static void i915_destroy( struct pipe_context *pipe )
156 {
157 struct i915_context *i915 = i915_context( pipe );
158
159 draw_destroy( i915->draw );
160
161 FREE( i915 );
162 }
163
164
165
166
167 static boolean
168 i915_draw_elements( struct pipe_context *pipe,
169 struct pipe_buffer *indexBuffer,
170 unsigned indexSize,
171 unsigned prim, unsigned start, unsigned count)
172 {
173 struct i915_context *i915 = i915_context( pipe );
174 struct draw_context *draw = i915->draw;
175 unsigned i;
176
177 if (i915->dirty)
178 i915_update_derived( i915 );
179
180 /*
181 * Map vertex buffers
182 */
183 for (i = 0; i < PIPE_ATTRIB_MAX; i++) {
184 if (i915->vertex_buffer[i].buffer) {
185 void *buf
186 = pipe->winsys->buffer_map(pipe->winsys,
187 i915->vertex_buffer[i].buffer,
188 PIPE_BUFFER_USAGE_CPU_READ);
189 draw_set_mapped_vertex_buffer(draw, i, buf);
190 }
191 }
192 /* Map index buffer, if present */
193 if (indexBuffer) {
194 void *mapped_indexes
195 = pipe->winsys->buffer_map(pipe->winsys, indexBuffer,
196 PIPE_BUFFER_USAGE_CPU_READ);
197 draw_set_mapped_element_buffer(draw, indexSize, mapped_indexes);
198 }
199 else {
200 /* no index/element buffer */
201 draw_set_mapped_element_buffer(draw, 0, NULL);
202 }
203
204
205 draw_set_mapped_constant_buffer(draw,
206 i915->current.constants[PIPE_SHADER_VERTEX]);
207
208 /* draw! */
209 draw_arrays(i915->draw, prim, start, count);
210
211 /*
212 * unmap vertex/index buffers
213 */
214 for (i = 0; i < PIPE_ATTRIB_MAX; i++) {
215 if (i915->vertex_buffer[i].buffer) {
216 pipe->winsys->buffer_unmap(pipe->winsys, i915->vertex_buffer[i].buffer);
217 draw_set_mapped_vertex_buffer(draw, i, NULL);
218 }
219 }
220 if (indexBuffer) {
221 pipe->winsys->buffer_unmap(pipe->winsys, indexBuffer);
222 draw_set_mapped_element_buffer(draw, 0, NULL);
223 }
224
225 return TRUE;
226 }
227
228
229 static boolean i915_draw_arrays( struct pipe_context *pipe,
230 unsigned prim, unsigned start, unsigned count)
231 {
232 return i915_draw_elements(pipe, NULL, 0, prim, start, count);
233 }
234
235
236
237 struct pipe_context *i915_create( struct pipe_winsys *pipe_winsys,
238 struct i915_winsys *i915_winsys,
239 unsigned pci_id )
240 {
241 struct i915_context *i915;
242 unsigned is_i945 = 0;
243
244 switch (pci_id) {
245 case PCI_CHIP_I915_G:
246 case PCI_CHIP_I915_GM:
247 break;
248
249 case PCI_CHIP_I945_G:
250 case PCI_CHIP_I945_GM:
251 case PCI_CHIP_I945_GME:
252 case PCI_CHIP_G33_G:
253 case PCI_CHIP_Q33_G:
254 case PCI_CHIP_Q35_G:
255 is_i945 = 1;
256 break;
257
258 default:
259 pipe_winsys->printf(pipe_winsys,
260 "%s: unknown pci id 0x%x, cannot create context\n",
261 __FUNCTION__, pci_id);
262 return NULL;
263 }
264
265 i915 = CALLOC_STRUCT(i915_context);
266 if (i915 == NULL)
267 return NULL;
268
269 i915->winsys = i915_winsys;
270 i915->pipe.winsys = pipe_winsys;
271
272 i915->pipe.destroy = i915_destroy;
273 i915->pipe.is_format_supported = i915_is_format_supported;
274 i915->pipe.get_param = i915_get_param;
275 i915->pipe.get_paramf = i915_get_paramf;
276
277 i915->pipe.clear = i915_clear;
278
279
280 i915->pipe.draw_arrays = i915_draw_arrays;
281 i915->pipe.draw_elements = i915_draw_elements;
282
283 /*
284 * Create drawing context and plug our rendering stage into it.
285 */
286 i915->draw = draw_create();
287 assert(i915->draw);
288 if (GETENV("I915_VBUF")) {
289 draw_set_rasterize_stage(i915->draw, i915_draw_vbuf_stage(i915));
290 }
291 else {
292 draw_set_rasterize_stage(i915->draw, i915_draw_render_stage(i915));
293 }
294
295 i915_init_surface_functions(i915);
296 i915_init_state_functions(i915);
297 i915_init_flush_functions(i915);
298 i915_init_string_functions(i915);
299 i915_init_texture_functions(i915);
300
301 i915->pci_id = pci_id;
302 i915->flags.is_i945 = is_i945;
303
304
305 i915->dirty = ~0;
306 i915->hardware_dirty = ~0;
307
308 /* Batch stream debugging is a bit hacked up at the moment:
309 */
310 i915->batch_start = NULL;
311
312 /*
313 * XXX we could plug GL selection/feedback into the drawing pipeline
314 * by specifying a different setup/render stage.
315 */
316
317 return &i915->pipe;
318 }
319