gallium/i915: overhaul of fragment shader compilation, constant/immediate allocation
[mesa.git] / src / gallium / drivers / i915simple / i915_context.h
1 /**************************************************************************
2 *
3 * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 **************************************************************************/
27
28 #ifndef I915_CONTEXT_H
29 #define I915_CONTEXT_H
30
31
32 #include "pipe/p_context.h"
33 #include "pipe/p_defines.h"
34 #include "pipe/p_state.h"
35
36 #include "draw/draw_vertex.h"
37
38
39 #define I915_TEX_UNITS 8
40
41 #define I915_DYNAMIC_MODES4 0
42 #define I915_DYNAMIC_DEPTHSCALE_0 1 /* just the header */
43 #define I915_DYNAMIC_DEPTHSCALE_1 2
44 #define I915_DYNAMIC_IAB 3
45 #define I915_DYNAMIC_BC_0 4 /* just the header */
46 #define I915_DYNAMIC_BC_1 5
47 #define I915_DYNAMIC_BFO_0 6
48 #define I915_DYNAMIC_BFO_1 7
49 #define I915_DYNAMIC_STP_0 8
50 #define I915_DYNAMIC_STP_1 9
51 #define I915_DYNAMIC_SC_ENA_0 10
52 #define I915_DYNAMIC_SC_RECT_0 11
53 #define I915_DYNAMIC_SC_RECT_1 12
54 #define I915_DYNAMIC_SC_RECT_2 13
55 #define I915_MAX_DYNAMIC 14
56
57
58 #define I915_IMMEDIATE_S0 0
59 #define I915_IMMEDIATE_S1 1
60 #define I915_IMMEDIATE_S2 2
61 #define I915_IMMEDIATE_S3 3
62 #define I915_IMMEDIATE_S4 4
63 #define I915_IMMEDIATE_S5 5
64 #define I915_IMMEDIATE_S6 6
65 #define I915_IMMEDIATE_S7 7
66 #define I915_MAX_IMMEDIATE 8
67
68 /* These must mach the order of LI0_STATE_* bits, as they will be used
69 * to generate hardware packets:
70 */
71 #define I915_CACHE_STATIC 0
72 #define I915_CACHE_DYNAMIC 1 /* handled specially */
73 #define I915_CACHE_SAMPLER 2
74 #define I915_CACHE_MAP 3
75 #define I915_CACHE_PROGRAM 4
76 #define I915_CACHE_CONSTANTS 5
77 #define I915_MAX_CACHE 6
78
79 #define I915_MAX_CONSTANT 32
80
81
82 /** See constant_flags[] below */
83 #define I915_CONSTFLAG_USER 0x1f
84
85
86 /**
87 * Subclass of pipe_shader_state
88 */
89 struct i915_fragment_shader
90 {
91 struct pipe_shader_state state;
92 uint *program;
93 uint program_len;
94
95 /**
96 * constants introduced during translation.
97 * These are placed at the end of the constant buffer and grow toward
98 * the beginning (eg: slot 31, 30 29, ...)
99 * User-provided constants start at 0.
100 * This allows both types of constants to co-exist (until there's too many)
101 * and doesn't require regenerating/changing the fragment program to
102 * shuffle constants around.
103 */
104 uint num_constants;
105 float constants[I915_MAX_CONSTANT][4];
106
107 /**
108 * Status of each constant
109 * if I915_CONSTFLAG_PARAM, the value must be taken from the corresponding
110 * slot of the user's constant buffer. (set by pipe->set_constant_buffer())
111 * Else, the bitmask indicates which components are occupied by immediates.
112 */
113 ubyte constant_flags[I915_MAX_CONSTANT];
114 };
115
116
117 struct i915_cache_context;
118
119 /* Use to calculate differences between state emitted to hardware and
120 * current driver-calculated state.
121 */
122 struct i915_state
123 {
124 unsigned immediate[I915_MAX_IMMEDIATE];
125 unsigned dynamic[I915_MAX_DYNAMIC];
126
127 float constants[PIPE_SHADER_TYPES][I915_MAX_CONSTANT][4];
128 /** number of constants passed in through a constant buffer */
129 uint num_user_constants[PIPE_SHADER_TYPES];
130
131 /* texture sampler state */
132 unsigned sampler[I915_TEX_UNITS][3];
133 unsigned sampler_enable_flags;
134 unsigned sampler_enable_nr;
135
136 /* texture image buffers */
137 unsigned texbuffer[I915_TEX_UNITS][2];
138
139 /** Describes the current hardware vertex layout */
140 struct vertex_info vertex_info;
141
142 unsigned id; /* track lost context events */
143 };
144
145 struct i915_blend_state {
146 unsigned iab;
147 unsigned modes4;
148 unsigned LIS5;
149 unsigned LIS6;
150 };
151
152 struct i915_depth_stencil_state {
153 unsigned stencil_modes4;
154 unsigned bfo[2];
155 unsigned stencil_LIS5;
156 unsigned depth_LIS6;
157 };
158
159 struct i915_rasterizer_state {
160 int light_twoside : 1;
161 unsigned st;
162 enum interp_mode color_interp;
163
164 unsigned LIS4;
165 unsigned LIS7;
166 unsigned sc[1];
167
168 const struct pipe_rasterizer_state *templ;
169
170 union { float f; unsigned u; } ds[2];
171 };
172
173 struct i915_sampler_state {
174 unsigned state[3];
175 const struct pipe_sampler_state *templ;
176 };
177
178
179 struct i915_texture {
180 struct pipe_texture base;
181
182 /* Derived from the above:
183 */
184 unsigned pitch;
185 unsigned depth_pitch; /* per-image on i945? */
186 unsigned total_height;
187
188 unsigned nr_images[PIPE_MAX_TEXTURE_LEVELS];
189
190 /* Explicitly store the offset of each image for each cube face or
191 * depth value. Pretty much have to accept that hardware formats
192 * are going to be so diverse that there is no unified way to
193 * compute the offsets of depth/cube images within a mipmap level,
194 * so have to store them as a lookup table:
195 */
196 unsigned *image_offset[PIPE_MAX_TEXTURE_LEVELS]; /**< array [depth] of offsets */
197
198 /* Includes image offset tables:
199 */
200 unsigned level_offset[PIPE_MAX_TEXTURE_LEVELS];
201
202 /* The data is held here:
203 */
204 struct pipe_buffer *buffer;
205 };
206
207 struct i915_context
208 {
209 struct pipe_context pipe;
210 struct i915_winsys *winsys;
211 struct draw_context *draw;
212
213 /* The most recent drawing state as set by the driver:
214 */
215 const struct i915_blend_state *blend;
216 const struct i915_sampler_state *sampler[PIPE_MAX_SAMPLERS];
217 const struct i915_depth_stencil_state *depth_stencil;
218 const struct i915_rasterizer_state *rasterizer;
219
220 struct i915_fragment_shader *fs;
221
222 struct pipe_blend_color blend_color;
223 struct pipe_clip_state clip;
224 struct pipe_constant_buffer constants[PIPE_SHADER_TYPES];
225 struct pipe_framebuffer_state framebuffer;
226 struct pipe_poly_stipple poly_stipple;
227 struct pipe_scissor_state scissor;
228 struct i915_texture *texture[PIPE_MAX_SAMPLERS];
229 struct pipe_viewport_state viewport;
230 struct pipe_vertex_buffer vertex_buffer[PIPE_ATTRIB_MAX];
231
232 unsigned dirty;
233
234 unsigned *batch_start;
235
236 /** Vertex buffer */
237 struct pipe_buffer *vbo;
238
239 struct i915_state current;
240 unsigned hardware_dirty;
241
242 unsigned debug;
243 unsigned pci_id;
244
245 struct {
246 unsigned is_i945:1;
247 } flags;
248 };
249
250 /* A flag for each state_tracker state object:
251 */
252 #define I915_NEW_VIEWPORT 0x1
253 #define I915_NEW_RASTERIZER 0x2
254 #define I915_NEW_FS 0x4
255 #define I915_NEW_BLEND 0x8
256 #define I915_NEW_CLIP 0x10
257 #define I915_NEW_SCISSOR 0x20
258 #define I915_NEW_STIPPLE 0x40
259 #define I915_NEW_FRAMEBUFFER 0x80
260 #define I915_NEW_ALPHA_TEST 0x100
261 #define I915_NEW_DEPTH_STENCIL 0x200
262 #define I915_NEW_SAMPLER 0x400
263 #define I915_NEW_TEXTURE 0x800
264 #define I915_NEW_CONSTANTS 0x1000
265 #define I915_NEW_VBO 0x2000
266
267
268 /* Driver's internally generated state flags:
269 */
270 #define I915_NEW_VERTEX_FORMAT 0x10000
271
272
273 /* Dirty flags for hardware emit
274 */
275 #define I915_HW_STATIC (1<<I915_CACHE_STATIC)
276 #define I915_HW_DYNAMIC (1<<I915_CACHE_DYNAMIC)
277 #define I915_HW_SAMPLER (1<<I915_CACHE_SAMPLER)
278 #define I915_HW_MAP (1<<I915_CACHE_MAP)
279 #define I915_HW_PROGRAM (1<<I915_CACHE_PROGRAM)
280 #define I915_HW_CONSTANTS (1<<I915_CACHE_CONSTANTS)
281 #define I915_HW_IMMEDIATE (1<<(I915_MAX_CACHE+0))
282 #define I915_HW_INVARIENT (1<<(I915_MAX_CACHE+1))
283
284
285 /***********************************************************************
286 * i915_prim_emit.c:
287 */
288 struct draw_stage *i915_draw_render_stage( struct i915_context *i915 );
289
290
291 /***********************************************************************
292 * i915_prim_vbuf.c:
293 */
294 struct draw_stage *i915_draw_vbuf_stage( struct i915_context *i915 );
295
296
297 /***********************************************************************
298 * i915_state_emit.c:
299 */
300 void i915_emit_hardware_state(struct i915_context *i915 );
301
302
303
304 /***********************************************************************
305 * i915_clear.c:
306 */
307 void i915_clear(struct pipe_context *pipe, struct pipe_surface *ps,
308 unsigned clearValue);
309
310
311 /***********************************************************************
312 * i915_surface.c:
313 */
314 void i915_init_surface_functions( struct i915_context *i915 );
315
316 void i915_init_state_functions( struct i915_context *i915 );
317 void i915_init_flush_functions( struct i915_context *i915 );
318 void i915_init_string_functions( struct i915_context *i915 );
319
320
321
322 /***********************************************************************
323 * Inline conversion functions. These are better-typed than the
324 * macros used previously:
325 */
326 static INLINE struct i915_context *
327 i915_context( struct pipe_context *pipe )
328 {
329 return (struct i915_context *)pipe;
330 }
331
332
333
334 #endif