Merge branch 'upstream-gallium-0.1' into nouveau-gallium-0.1
[mesa.git] / src / gallium / drivers / i915simple / i915_fpc_emit.c
1 /**************************************************************************
2 *
3 * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 **************************************************************************/
27
28 #include "i915_reg.h"
29 #include "i915_context.h"
30 #include "i915_fpc.h"
31
32
33 #define A0_DEST( reg ) (((reg)&UREG_TYPE_NR_MASK)>>UREG_A0_DEST_SHIFT_LEFT)
34 #define D0_DEST( reg ) (((reg)&UREG_TYPE_NR_MASK)>>UREG_A0_DEST_SHIFT_LEFT)
35 #define T0_DEST( reg ) (((reg)&UREG_TYPE_NR_MASK)>>UREG_A0_DEST_SHIFT_LEFT)
36 #define A0_SRC0( reg ) (((reg)&UREG_MASK)>>UREG_A0_SRC0_SHIFT_LEFT)
37 #define A1_SRC0( reg ) (((reg)&UREG_MASK)<<UREG_A1_SRC0_SHIFT_RIGHT)
38 #define A1_SRC1( reg ) (((reg)&UREG_MASK)>>UREG_A1_SRC1_SHIFT_LEFT)
39 #define A2_SRC1( reg ) (((reg)&UREG_MASK)<<UREG_A2_SRC1_SHIFT_RIGHT)
40 #define A2_SRC2( reg ) (((reg)&UREG_MASK)>>UREG_A2_SRC2_SHIFT_LEFT)
41
42 /* These are special, and don't have swizzle/negate bits.
43 */
44 #define T0_SAMPLER( reg ) (GET_UREG_NR(reg)<<T0_SAMPLER_NR_SHIFT)
45 #define T1_ADDRESS_REG( reg ) ((GET_UREG_NR(reg)<<T1_ADDRESS_REG_NR_SHIFT) | \
46 (GET_UREG_TYPE(reg)<<T1_ADDRESS_REG_TYPE_SHIFT))
47
48
49 /* Macros for translating UREG's into the various register fields used
50 * by the I915 programmable unit.
51 */
52 #define UREG_A0_DEST_SHIFT_LEFT (UREG_TYPE_SHIFT - A0_DEST_TYPE_SHIFT)
53 #define UREG_A0_SRC0_SHIFT_LEFT (UREG_TYPE_SHIFT - A0_SRC0_TYPE_SHIFT)
54 #define UREG_A1_SRC0_SHIFT_RIGHT (A1_SRC0_CHANNEL_W_SHIFT - UREG_CHANNEL_W_SHIFT)
55 #define UREG_A1_SRC1_SHIFT_LEFT (UREG_TYPE_SHIFT - A1_SRC1_TYPE_SHIFT)
56 #define UREG_A2_SRC1_SHIFT_RIGHT (A2_SRC1_CHANNEL_W_SHIFT - UREG_CHANNEL_W_SHIFT)
57 #define UREG_A2_SRC2_SHIFT_LEFT (UREG_TYPE_SHIFT - A2_SRC2_TYPE_SHIFT)
58
59 #define UREG_MASK 0xffffff00
60 #define UREG_TYPE_NR_MASK ((REG_TYPE_MASK << UREG_TYPE_SHIFT) | \
61 (REG_NR_MASK << UREG_NR_SHIFT))
62
63
64 uint
65 i915_get_temp(struct i915_fp_compile *p)
66 {
67 int bit = ffs(~p->temp_flag);
68 if (!bit) {
69 i915_program_error(p, "i915_get_temp: out of temporaries\n");
70 return 0;
71 }
72
73 p->temp_flag |= 1 << (bit - 1);
74 return bit - 1;
75 }
76
77
78 static void
79 i915_release_temp(struct i915_fp_compile *p, int reg)
80 {
81 p->temp_flag &= ~(1 << reg);
82 }
83
84
85 /**
86 * Get unpreserved temporary, a temp whose value is not preserved between
87 * PS program phases.
88 */
89 uint
90 i915_get_utemp(struct i915_fp_compile * p)
91 {
92 int bit = ffs(~p->utemp_flag);
93 if (!bit) {
94 i915_program_error(p, "i915_get_utemp: out of temporaries\n");
95 return 0;
96 }
97
98 p->utemp_flag |= 1 << (bit - 1);
99 return UREG(REG_TYPE_U, (bit - 1));
100 }
101
102 void
103 i915_release_utemps(struct i915_fp_compile *p)
104 {
105 p->utemp_flag = ~0x7;
106 }
107
108
109 uint
110 i915_emit_decl(struct i915_fp_compile *p,
111 uint type, uint nr, uint d0_flags)
112 {
113 uint reg = UREG(type, nr);
114
115 if (type == REG_TYPE_T) {
116 if (p->decl_t & (1 << nr))
117 return reg;
118
119 p->decl_t |= (1 << nr);
120 }
121 else if (type == REG_TYPE_S) {
122 if (p->decl_s & (1 << nr))
123 return reg;
124
125 p->decl_s |= (1 << nr);
126 }
127 else
128 return reg;
129
130 *(p->decl++) = (D0_DCL | D0_DEST(reg) | d0_flags);
131 *(p->decl++) = D1_MBZ;
132 *(p->decl++) = D2_MBZ;
133
134 p->nr_decl_insn++;
135 return reg;
136 }
137
138 uint
139 i915_emit_arith(struct i915_fp_compile * p,
140 uint op,
141 uint dest,
142 uint mask,
143 uint saturate, uint src0, uint src1, uint src2)
144 {
145 uint c[3];
146 uint nr_const = 0;
147
148 assert(GET_UREG_TYPE(dest) != REG_TYPE_CONST);
149 dest = UREG(GET_UREG_TYPE(dest), GET_UREG_NR(dest));
150 assert(dest);
151
152 if (GET_UREG_TYPE(src0) == REG_TYPE_CONST)
153 c[nr_const++] = 0;
154 if (GET_UREG_TYPE(src1) == REG_TYPE_CONST)
155 c[nr_const++] = 1;
156 if (GET_UREG_TYPE(src2) == REG_TYPE_CONST)
157 c[nr_const++] = 2;
158
159 /* Recursively call this function to MOV additional const values
160 * into temporary registers. Use utemp registers for this -
161 * currently shouldn't be possible to run out, but keep an eye on
162 * this.
163 */
164 if (nr_const > 1) {
165 uint s[3], first, i, old_utemp_flag;
166
167 s[0] = src0;
168 s[1] = src1;
169 s[2] = src2;
170 old_utemp_flag = p->utemp_flag;
171
172 first = GET_UREG_NR(s[c[0]]);
173 for (i = 1; i < nr_const; i++) {
174 if (GET_UREG_NR(s[c[i]]) != first) {
175 uint tmp = i915_get_utemp(p);
176
177 i915_emit_arith(p, A0_MOV, tmp, A0_DEST_CHANNEL_ALL, 0,
178 s[c[i]], 0, 0);
179 s[c[i]] = tmp;
180 }
181 }
182
183 src0 = s[0];
184 src1 = s[1];
185 src2 = s[2];
186 p->utemp_flag = old_utemp_flag; /* restore */
187 }
188
189 *(p->csr++) = (op | A0_DEST(dest) | mask | saturate | A0_SRC0(src0));
190 *(p->csr++) = (A1_SRC0(src0) | A1_SRC1(src1));
191 *(p->csr++) = (A2_SRC1(src1) | A2_SRC2(src2));
192
193 p->nr_alu_insn++;
194 return dest;
195 }
196
197
198 /**
199 * Emit a texture load or texkill instruction.
200 * \param dest the dest i915 register
201 * \param destmask the dest register writemask
202 * \param sampler the i915 sampler register
203 * \param coord the i915 source texcoord operand
204 * \param opcode the instruction opcode
205 */
206 uint i915_emit_texld( struct i915_fp_compile *p,
207 uint dest,
208 uint destmask,
209 uint sampler,
210 uint coord,
211 uint opcode )
212 {
213 const uint k = UREG(GET_UREG_TYPE(coord), GET_UREG_NR(coord));
214 int temp = -1;
215
216 if (coord != k) {
217 /* texcoord is swizzled or negated. Need to allocate a new temporary
218 * register (a utemp / unpreserved temp) won't do.
219 */
220 uint tempReg;
221
222 temp = i915_get_temp(p); /* get temp reg index */
223 tempReg = UREG(REG_TYPE_R, temp); /* make i915 register */
224
225 i915_emit_arith( p, A0_MOV,
226 tempReg, A0_DEST_CHANNEL_ALL, /* dest reg, writemask */
227 0, /* saturate */
228 coord, 0, 0 ); /* src0, src1, src2 */
229
230 /* new src texcoord is tempReg */
231 coord = tempReg;
232 }
233
234 /* Don't worry about saturate as we only support
235 */
236 if (destmask != A0_DEST_CHANNEL_ALL) {
237 /* if not writing to XYZW... */
238 uint tmp = i915_get_utemp(p);
239 i915_emit_texld( p, tmp, A0_DEST_CHANNEL_ALL, sampler, coord, opcode );
240 i915_emit_arith( p, A0_MOV, dest, destmask, 0, tmp, 0, 0 );
241 /* XXX release utemp here? */
242 }
243 else {
244 assert(GET_UREG_TYPE(dest) != REG_TYPE_CONST);
245 assert(dest = UREG(GET_UREG_TYPE(dest), GET_UREG_NR(dest)));
246
247 /* is the sampler coord a texcoord input reg? */
248 if (GET_UREG_TYPE(coord) != REG_TYPE_T) {
249 p->nr_tex_indirect++;
250 }
251
252 *(p->csr++) = (opcode |
253 T0_DEST( dest ) |
254 T0_SAMPLER( sampler ));
255
256 *(p->csr++) = T1_ADDRESS_REG( coord );
257 *(p->csr++) = T2_MBZ;
258
259 p->nr_tex_insn++;
260 }
261
262 if (temp >= 0)
263 i915_release_temp(p, temp);
264
265 return dest;
266 }
267
268
269 uint
270 i915_emit_const1f(struct i915_fp_compile * p, float c0)
271 {
272 struct i915_fragment_shader *ifs = p->shader;
273 unsigned reg, idx;
274
275 if (c0 == 0.0)
276 return swizzle(UREG(REG_TYPE_R, 0), ZERO, ZERO, ZERO, ZERO);
277 if (c0 == 1.0)
278 return swizzle(UREG(REG_TYPE_R, 0), ONE, ONE, ONE, ONE);
279
280 for (reg = 0; reg < I915_MAX_CONSTANT; reg++) {
281 if (ifs->constant_flags[reg] == I915_CONSTFLAG_USER)
282 continue;
283 for (idx = 0; idx < 4; idx++) {
284 if (!(ifs->constant_flags[reg] & (1 << idx)) ||
285 ifs->constants[reg][idx] == c0) {
286 ifs->constants[reg][idx] = c0;
287 ifs->constant_flags[reg] |= 1 << idx;
288 if (reg + 1 > ifs->num_constants)
289 ifs->num_constants = reg + 1;
290 return swizzle(UREG(REG_TYPE_CONST, reg), idx, ZERO, ZERO, ONE);
291 }
292 }
293 }
294
295 i915_program_error(p, "i915_emit_const1f: out of constants\n");
296 return 0;
297 }
298
299 uint
300 i915_emit_const2f(struct i915_fp_compile * p, float c0, float c1)
301 {
302 struct i915_fragment_shader *ifs = p->shader;
303 unsigned reg, idx;
304
305 if (c0 == 0.0)
306 return swizzle(i915_emit_const1f(p, c1), ZERO, X, Z, W);
307 if (c0 == 1.0)
308 return swizzle(i915_emit_const1f(p, c1), ONE, X, Z, W);
309
310 if (c1 == 0.0)
311 return swizzle(i915_emit_const1f(p, c0), X, ZERO, Z, W);
312 if (c1 == 1.0)
313 return swizzle(i915_emit_const1f(p, c0), X, ONE, Z, W);
314
315 for (reg = 0; reg < I915_MAX_CONSTANT; reg++) {
316 if (ifs->constant_flags[reg] == 0xf ||
317 ifs->constant_flags[reg] == I915_CONSTFLAG_USER)
318 continue;
319 for (idx = 0; idx < 3; idx++) {
320 if (!(ifs->constant_flags[reg] & (3 << idx))) {
321 ifs->constants[reg][idx + 0] = c0;
322 ifs->constants[reg][idx + 1] = c1;
323 ifs->constant_flags[reg] |= 3 << idx;
324 if (reg + 1 > ifs->num_constants)
325 ifs->num_constants = reg + 1;
326 return swizzle(UREG(REG_TYPE_CONST, reg), idx, idx + 1, ZERO, ONE);
327 }
328 }
329 }
330
331 i915_program_error(p, "i915_emit_const2f: out of constants\n");
332 return 0;
333 }
334
335
336
337 uint
338 i915_emit_const4f(struct i915_fp_compile * p,
339 float c0, float c1, float c2, float c3)
340 {
341 struct i915_fragment_shader *ifs = p->shader;
342 unsigned reg;
343
344 for (reg = 0; reg < I915_MAX_CONSTANT; reg++) {
345 if (ifs->constant_flags[reg] == 0xf &&
346 ifs->constants[reg][0] == c0 &&
347 ifs->constants[reg][1] == c1 &&
348 ifs->constants[reg][2] == c2 &&
349 ifs->constants[reg][3] == c3) {
350 return UREG(REG_TYPE_CONST, reg);
351 }
352 else if (ifs->constant_flags[reg] == 0) {
353
354 ifs->constants[reg][0] = c0;
355 ifs->constants[reg][1] = c1;
356 ifs->constants[reg][2] = c2;
357 ifs->constants[reg][3] = c3;
358 ifs->constant_flags[reg] = 0xf;
359 if (reg + 1 > ifs->num_constants)
360 ifs->num_constants = reg + 1;
361 return UREG(REG_TYPE_CONST, reg);
362 }
363 }
364
365 i915_program_error(p, "i915_emit_const4f: out of constants\n");
366 return 0;
367 }
368
369
370 uint
371 i915_emit_const4fv(struct i915_fp_compile * p, const float * c)
372 {
373 return i915_emit_const4f(p, c[0], c[1], c[2], c[3]);
374 }