gallium/i915: overhaul of fragment shader compilation, constant/immediate allocation
[mesa.git] / src / gallium / drivers / i915simple / i915_fpc_emit.c
1 /**************************************************************************
2 *
3 * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 **************************************************************************/
27
28 #include "i915_reg.h"
29 #include "i915_context.h"
30 #include "i915_fpc.h"
31
32
33 #define A0_DEST( reg ) (((reg)&UREG_TYPE_NR_MASK)>>UREG_A0_DEST_SHIFT_LEFT)
34 #define D0_DEST( reg ) (((reg)&UREG_TYPE_NR_MASK)>>UREG_A0_DEST_SHIFT_LEFT)
35 #define T0_DEST( reg ) (((reg)&UREG_TYPE_NR_MASK)>>UREG_A0_DEST_SHIFT_LEFT)
36 #define A0_SRC0( reg ) (((reg)&UREG_MASK)>>UREG_A0_SRC0_SHIFT_LEFT)
37 #define A1_SRC0( reg ) (((reg)&UREG_MASK)<<UREG_A1_SRC0_SHIFT_RIGHT)
38 #define A1_SRC1( reg ) (((reg)&UREG_MASK)>>UREG_A1_SRC1_SHIFT_LEFT)
39 #define A2_SRC1( reg ) (((reg)&UREG_MASK)<<UREG_A2_SRC1_SHIFT_RIGHT)
40 #define A2_SRC2( reg ) (((reg)&UREG_MASK)>>UREG_A2_SRC2_SHIFT_LEFT)
41
42 /* These are special, and don't have swizzle/negate bits.
43 */
44 #define T0_SAMPLER( reg ) (GET_UREG_NR(reg)<<T0_SAMPLER_NR_SHIFT)
45 #define T1_ADDRESS_REG( reg ) ((GET_UREG_NR(reg)<<T1_ADDRESS_REG_NR_SHIFT) | \
46 (GET_UREG_TYPE(reg)<<T1_ADDRESS_REG_TYPE_SHIFT))
47
48
49 /* Macros for translating UREG's into the various register fields used
50 * by the I915 programmable unit.
51 */
52 #define UREG_A0_DEST_SHIFT_LEFT (UREG_TYPE_SHIFT - A0_DEST_TYPE_SHIFT)
53 #define UREG_A0_SRC0_SHIFT_LEFT (UREG_TYPE_SHIFT - A0_SRC0_TYPE_SHIFT)
54 #define UREG_A1_SRC0_SHIFT_RIGHT (A1_SRC0_CHANNEL_W_SHIFT - UREG_CHANNEL_W_SHIFT)
55 #define UREG_A1_SRC1_SHIFT_LEFT (UREG_TYPE_SHIFT - A1_SRC1_TYPE_SHIFT)
56 #define UREG_A2_SRC1_SHIFT_RIGHT (A2_SRC1_CHANNEL_W_SHIFT - UREG_CHANNEL_W_SHIFT)
57 #define UREG_A2_SRC2_SHIFT_LEFT (UREG_TYPE_SHIFT - A2_SRC2_TYPE_SHIFT)
58
59 #define UREG_MASK 0xffffff00
60 #define UREG_TYPE_NR_MASK ((REG_TYPE_MASK << UREG_TYPE_SHIFT) | \
61 (REG_NR_MASK << UREG_NR_SHIFT))
62
63
64 uint
65 i915_get_temp(struct i915_fp_compile *p)
66 {
67 int bit = ffs(~p->temp_flag);
68 if (!bit) {
69 i915_program_error(p, "i915_get_temp: out of temporaries\n");
70 return 0;
71 }
72
73 p->temp_flag |= 1 << (bit - 1);
74 return UREG(REG_TYPE_R, (bit - 1));
75 }
76
77
78 uint
79 i915_get_utemp(struct i915_fp_compile * p)
80 {
81 int bit = ffs(~p->utemp_flag);
82 if (!bit) {
83 i915_program_error(p, "i915_get_utemp: out of temporaries\n");
84 return 0;
85 }
86
87 p->utemp_flag |= 1 << (bit - 1);
88 return UREG(REG_TYPE_U, (bit - 1));
89 }
90
91 void
92 i915_release_utemps(struct i915_fp_compile *p)
93 {
94 p->utemp_flag = ~0x7;
95 }
96
97
98 uint
99 i915_emit_decl(struct i915_fp_compile *p,
100 uint type, uint nr, uint d0_flags)
101 {
102 uint reg = UREG(type, nr);
103
104 if (type == REG_TYPE_T) {
105 if (p->decl_t & (1 << nr))
106 return reg;
107
108 p->decl_t |= (1 << nr);
109 }
110 else if (type == REG_TYPE_S) {
111 if (p->decl_s & (1 << nr))
112 return reg;
113
114 p->decl_s |= (1 << nr);
115 }
116 else
117 return reg;
118
119 *(p->decl++) = (D0_DCL | D0_DEST(reg) | d0_flags);
120 *(p->decl++) = D1_MBZ;
121 *(p->decl++) = D2_MBZ;
122
123 p->nr_decl_insn++;
124 return reg;
125 }
126
127 uint
128 i915_emit_arith(struct i915_fp_compile * p,
129 uint op,
130 uint dest,
131 uint mask,
132 uint saturate, uint src0, uint src1, uint src2)
133 {
134 uint c[3];
135 uint nr_const = 0;
136
137 assert(GET_UREG_TYPE(dest) != REG_TYPE_CONST);
138 dest = UREG(GET_UREG_TYPE(dest), GET_UREG_NR(dest));
139 assert(dest);
140
141 if (GET_UREG_TYPE(src0) == REG_TYPE_CONST)
142 c[nr_const++] = 0;
143 if (GET_UREG_TYPE(src1) == REG_TYPE_CONST)
144 c[nr_const++] = 1;
145 if (GET_UREG_TYPE(src2) == REG_TYPE_CONST)
146 c[nr_const++] = 2;
147
148 /* Recursively call this function to MOV additional const values
149 * into temporary registers. Use utemp registers for this -
150 * currently shouldn't be possible to run out, but keep an eye on
151 * this.
152 */
153 if (nr_const > 1) {
154 uint s[3], first, i, old_utemp_flag;
155
156 s[0] = src0;
157 s[1] = src1;
158 s[2] = src2;
159 old_utemp_flag = p->utemp_flag;
160
161 first = GET_UREG_NR(s[c[0]]);
162 for (i = 1; i < nr_const; i++) {
163 if (GET_UREG_NR(s[c[i]]) != first) {
164 uint tmp = i915_get_utemp(p);
165
166 i915_emit_arith(p, A0_MOV, tmp, A0_DEST_CHANNEL_ALL, 0,
167 s[c[i]], 0, 0);
168 s[c[i]] = tmp;
169 }
170 }
171
172 src0 = s[0];
173 src1 = s[1];
174 src2 = s[2];
175 p->utemp_flag = old_utemp_flag; /* restore */
176 }
177
178 *(p->csr++) = (op | A0_DEST(dest) | mask | saturate | A0_SRC0(src0));
179 *(p->csr++) = (A1_SRC0(src0) | A1_SRC1(src1));
180 *(p->csr++) = (A2_SRC1(src1) | A2_SRC2(src2));
181
182 p->nr_alu_insn++;
183 return dest;
184 }
185
186 uint i915_emit_texld( struct i915_fp_compile *p,
187 uint dest,
188 uint destmask,
189 uint sampler,
190 uint coord,
191 uint op )
192 {
193 uint k = UREG(GET_UREG_TYPE(coord), GET_UREG_NR(coord));
194 if (coord != k) {
195 /* No real way to work around this in the general case - need to
196 * allocate and declare a new temporary register (a utemp won't
197 * do). Will fallback for now.
198 */
199 i915_program_error(p, "Can't (yet) swizzle TEX arguments");
200 assert(0);
201 return 0;
202 }
203
204 /* Don't worry about saturate as we only support
205 */
206 if (destmask != A0_DEST_CHANNEL_ALL) {
207 uint tmp = i915_get_utemp(p);
208 i915_emit_texld( p, tmp, A0_DEST_CHANNEL_ALL, sampler, coord, op );
209 i915_emit_arith( p, A0_MOV, dest, destmask, 0, tmp, 0, 0 );
210 return dest;
211 }
212 else {
213 assert(GET_UREG_TYPE(dest) != REG_TYPE_CONST);
214 assert(dest = UREG(GET_UREG_TYPE(dest), GET_UREG_NR(dest)));
215
216 if (GET_UREG_TYPE(coord) != REG_TYPE_T) {
217 p->nr_tex_indirect++;
218 }
219
220 *(p->csr++) = (op |
221 T0_DEST( dest ) |
222 T0_SAMPLER( sampler ));
223
224 *(p->csr++) = T1_ADDRESS_REG( coord );
225 *(p->csr++) = T2_MBZ;
226
227 p->nr_tex_insn++;
228 return dest;
229 }
230 }
231
232
233 uint
234 i915_emit_const1f(struct i915_fp_compile * p, float c0)
235 {
236 struct i915_fragment_shader *ifs = p->shader;
237 unsigned reg, idx;
238
239 if (c0 == 0.0)
240 return swizzle(UREG(REG_TYPE_R, 0), ZERO, ZERO, ZERO, ZERO);
241 if (c0 == 1.0)
242 return swizzle(UREG(REG_TYPE_R, 0), ONE, ONE, ONE, ONE);
243
244 for (reg = 0; reg < I915_MAX_CONSTANT; reg++) {
245 if (ifs->constant_flags[reg] == I915_CONSTFLAG_USER)
246 continue;
247 for (idx = 0; idx < 4; idx++) {
248 if (!(ifs->constant_flags[reg] & (1 << idx)) ||
249 ifs->constants[reg][idx] == c0) {
250 ifs->constants[reg][idx] = c0;
251 ifs->constant_flags[reg] |= 1 << idx;
252 if (reg + 1 > ifs->num_constants)
253 ifs->num_constants = reg + 1;
254 return swizzle(UREG(REG_TYPE_CONST, reg), idx, ZERO, ZERO, ONE);
255 }
256 }
257 }
258
259 i915_program_error(p, "i915_emit_const1f: out of constants\n");
260 return 0;
261 }
262
263 uint
264 i915_emit_const2f(struct i915_fp_compile * p, float c0, float c1)
265 {
266 struct i915_fragment_shader *ifs = p->shader;
267 unsigned reg, idx;
268
269 if (c0 == 0.0)
270 return swizzle(i915_emit_const1f(p, c1), ZERO, X, Z, W);
271 if (c0 == 1.0)
272 return swizzle(i915_emit_const1f(p, c1), ONE, X, Z, W);
273
274 if (c1 == 0.0)
275 return swizzle(i915_emit_const1f(p, c0), X, ZERO, Z, W);
276 if (c1 == 1.0)
277 return swizzle(i915_emit_const1f(p, c0), X, ONE, Z, W);
278
279 for (reg = 0; reg < I915_MAX_CONSTANT; reg++) {
280 if (ifs->constant_flags[reg] == 0xf ||
281 ifs->constant_flags[reg] == I915_CONSTFLAG_USER)
282 continue;
283 for (idx = 0; idx < 3; idx++) {
284 if (!(ifs->constant_flags[reg] & (3 << idx))) {
285 ifs->constants[reg][idx + 0] = c0;
286 ifs->constants[reg][idx + 1] = c1;
287 ifs->constant_flags[reg] |= 3 << idx;
288 if (reg + 1 > ifs->num_constants)
289 ifs->num_constants = reg + 1;
290 return swizzle(UREG(REG_TYPE_CONST, reg), idx, idx + 1, ZERO, ONE);
291 }
292 }
293 }
294
295 i915_program_error(p, "i915_emit_const2f: out of constants\n");
296 return 0;
297 }
298
299
300
301 uint
302 i915_emit_const4f(struct i915_fp_compile * p,
303 float c0, float c1, float c2, float c3)
304 {
305 struct i915_fragment_shader *ifs = p->shader;
306 unsigned reg;
307
308 for (reg = 0; reg < I915_MAX_CONSTANT; reg++) {
309 if (ifs->constant_flags[reg] == 0xf &&
310 ifs->constants[reg][0] == c0 &&
311 ifs->constants[reg][1] == c1 &&
312 ifs->constants[reg][2] == c2 &&
313 ifs->constants[reg][3] == c3) {
314 return UREG(REG_TYPE_CONST, reg);
315 }
316 else if (ifs->constant_flags[reg] == 0) {
317
318 ifs->constants[reg][0] = c0;
319 ifs->constants[reg][1] = c1;
320 ifs->constants[reg][2] = c2;
321 ifs->constants[reg][3] = c3;
322 ifs->constant_flags[reg] = 0xf;
323 if (reg + 1 > ifs->num_constants)
324 ifs->num_constants = reg + 1;
325 return UREG(REG_TYPE_CONST, reg);
326 }
327 }
328
329 i915_program_error(p, "i915_emit_const4f: out of constants\n");
330 return 0;
331 }
332
333
334 uint
335 i915_emit_const4fv(struct i915_fp_compile * p, const float * c)
336 {
337 return i915_emit_const4f(p, c[0], c[1], c[2], c[3]);
338 }