Code reorganization: update build.
[mesa.git] / src / gallium / drivers / i915simple / i915_state.c
1 /**************************************************************************
2 *
3 * Copyright 2007 Tungsten Graphics, Inc., Cedar Park, Texas.
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 **************************************************************************/
27
28 /* Authors: Keith Whitwell <keith@tungstengraphics.com>
29 */
30
31
32 #include "draw/draw_context.h"
33 #include "pipe/p_winsys.h"
34 #include "pipe/p_util.h"
35
36 #include "i915_context.h"
37 #include "i915_reg.h"
38 #include "i915_state.h"
39 #include "i915_state_inlines.h"
40
41
42 /* The i915 (and related graphics cores) do not support GL_CLAMP. The
43 * Intel drivers for "other operating systems" implement GL_CLAMP as
44 * GL_CLAMP_TO_EDGE, so the same is done here.
45 */
46 static unsigned
47 translate_wrap_mode(unsigned wrap)
48 {
49 switch (wrap) {
50 case PIPE_TEX_WRAP_REPEAT:
51 return TEXCOORDMODE_WRAP;
52 case PIPE_TEX_WRAP_CLAMP:
53 return TEXCOORDMODE_CLAMP_EDGE; /* not quite correct */
54 case PIPE_TEX_WRAP_CLAMP_TO_EDGE:
55 return TEXCOORDMODE_CLAMP_EDGE;
56 case PIPE_TEX_WRAP_CLAMP_TO_BORDER:
57 return TEXCOORDMODE_CLAMP_BORDER;
58 // case PIPE_TEX_WRAP_MIRRORED_REPEAT:
59 // return TEXCOORDMODE_MIRROR;
60 default:
61 return TEXCOORDMODE_WRAP;
62 }
63 }
64
65 static unsigned translate_img_filter( unsigned filter )
66 {
67 switch (filter) {
68 case PIPE_TEX_FILTER_NEAREST:
69 return FILTER_NEAREST;
70 case PIPE_TEX_FILTER_LINEAR:
71 return FILTER_LINEAR;
72 default:
73 assert(0);
74 return FILTER_NEAREST;
75 }
76 }
77
78 static unsigned translate_mip_filter( unsigned filter )
79 {
80 switch (filter) {
81 case PIPE_TEX_MIPFILTER_NONE:
82 return MIPFILTER_NONE;
83 case PIPE_TEX_MIPFILTER_NEAREST:
84 return MIPFILTER_NEAREST;
85 case PIPE_TEX_FILTER_LINEAR:
86 return MIPFILTER_LINEAR;
87 default:
88 assert(0);
89 return MIPFILTER_NONE;
90 }
91 }
92
93
94 /* None of this state is actually used for anything yet.
95 */
96 static void *
97 i915_create_blend_state(struct pipe_context *pipe,
98 const struct pipe_blend_state *blend)
99 {
100 struct i915_blend_state *cso_data = CALLOC_STRUCT( i915_blend_state );
101
102 {
103 unsigned eqRGB = blend->rgb_func;
104 unsigned srcRGB = blend->rgb_src_factor;
105 unsigned dstRGB = blend->rgb_dst_factor;
106
107 unsigned eqA = blend->alpha_func;
108 unsigned srcA = blend->alpha_src_factor;
109 unsigned dstA = blend->alpha_dst_factor;
110
111 /* Special handling for MIN/MAX filter modes handled at
112 * state_tracker level.
113 */
114
115 if (srcA != srcRGB ||
116 dstA != dstRGB ||
117 eqA != eqRGB) {
118
119 cso_data->iab = (_3DSTATE_INDEPENDENT_ALPHA_BLEND_CMD |
120 IAB_MODIFY_ENABLE |
121 IAB_ENABLE |
122 IAB_MODIFY_FUNC |
123 IAB_MODIFY_SRC_FACTOR |
124 IAB_MODIFY_DST_FACTOR |
125 SRC_ABLND_FACT(i915_translate_blend_factor(srcA)) |
126 DST_ABLND_FACT(i915_translate_blend_factor(dstA)) |
127 (i915_translate_blend_func(eqA) << IAB_FUNC_SHIFT));
128 }
129 else {
130 cso_data->iab = (_3DSTATE_INDEPENDENT_ALPHA_BLEND_CMD |
131 IAB_MODIFY_ENABLE |
132 0);
133 }
134 }
135
136 cso_data->modes4 |= (_3DSTATE_MODES_4_CMD |
137 ENABLE_LOGIC_OP_FUNC |
138 LOGIC_OP_FUNC(i915_translate_logic_op(blend->logicop_func)));
139
140 if (blend->logicop_enable)
141 cso_data->LIS5 |= S5_LOGICOP_ENABLE;
142
143 if (blend->dither)
144 cso_data->LIS5 |= S5_COLOR_DITHER_ENABLE;
145
146 if ((blend->colormask & PIPE_MASK_R) == 0)
147 cso_data->LIS5 |= S5_WRITEDISABLE_RED;
148
149 if ((blend->colormask & PIPE_MASK_G) == 0)
150 cso_data->LIS5 |= S5_WRITEDISABLE_GREEN;
151
152 if ((blend->colormask & PIPE_MASK_B) == 0)
153 cso_data->LIS5 |= S5_WRITEDISABLE_BLUE;
154
155 if ((blend->colormask & PIPE_MASK_A) == 0)
156 cso_data->LIS5 |= S5_WRITEDISABLE_ALPHA;
157
158 if (blend->blend_enable) {
159 unsigned funcRGB = blend->rgb_func;
160 unsigned srcRGB = blend->rgb_src_factor;
161 unsigned dstRGB = blend->rgb_dst_factor;
162
163 cso_data->LIS6 |= (S6_CBUF_BLEND_ENABLE |
164 SRC_BLND_FACT(i915_translate_blend_factor(srcRGB)) |
165 DST_BLND_FACT(i915_translate_blend_factor(dstRGB)) |
166 (i915_translate_blend_func(funcRGB) << S6_CBUF_BLEND_FUNC_SHIFT));
167 }
168
169 return cso_data;
170 }
171
172 static void i915_bind_blend_state(struct pipe_context *pipe,
173 void *blend)
174 {
175 struct i915_context *i915 = i915_context(pipe);
176
177 i915->blend = (struct i915_blend_state*)blend;
178
179 i915->dirty |= I915_NEW_BLEND;
180 }
181
182
183 static void i915_delete_blend_state(struct pipe_context *pipe, void *blend)
184 {
185 FREE(blend);
186 }
187
188 static void i915_set_blend_color( struct pipe_context *pipe,
189 const struct pipe_blend_color *blend_color )
190 {
191 struct i915_context *i915 = i915_context(pipe);
192
193 i915->blend_color = *blend_color;
194
195 i915->dirty |= I915_NEW_BLEND;
196 }
197
198 static void *
199 i915_create_sampler_state(struct pipe_context *pipe,
200 const struct pipe_sampler_state *sampler)
201 {
202 struct i915_sampler_state *cso = CALLOC_STRUCT( i915_sampler_state );
203 const unsigned ws = sampler->wrap_s;
204 const unsigned wt = sampler->wrap_t;
205 const unsigned wr = sampler->wrap_r;
206 unsigned minFilt, magFilt;
207 unsigned mipFilt;
208
209 cso->templ = sampler;
210
211 mipFilt = translate_mip_filter(sampler->min_mip_filter);
212 if (sampler->max_anisotropy > 1.0) {
213 minFilt = FILTER_ANISOTROPIC;
214 magFilt = FILTER_ANISOTROPIC;
215 if (sampler->max_anisotropy > 2.0) {
216 cso->state[0] |= SS2_MAX_ANISO_4;
217 }
218 }
219 else {
220 minFilt = translate_img_filter( sampler->min_img_filter );
221 magFilt = translate_img_filter( sampler->mag_img_filter );
222 }
223
224 {
225 int b = (int) (sampler->lod_bias * 16.0);
226 b = CLAMP(b, -256, 255);
227 cso->state[0] |= ((b << SS2_LOD_BIAS_SHIFT) & SS2_LOD_BIAS_MASK);
228 }
229
230 /* Shadow:
231 */
232 if (sampler->compare_mode == PIPE_TEX_COMPARE_R_TO_TEXTURE)
233 {
234 cso->state[0] |= (SS2_SHADOW_ENABLE |
235 i915_translate_compare_func(sampler->compare_func));
236
237 minFilt = FILTER_4X4_FLAT;
238 magFilt = FILTER_4X4_FLAT;
239 }
240
241 cso->state[0] |= ((minFilt << SS2_MIN_FILTER_SHIFT) |
242 (mipFilt << SS2_MIP_FILTER_SHIFT) |
243 (magFilt << SS2_MAG_FILTER_SHIFT));
244
245 cso->state[1] |=
246 ((translate_wrap_mode(ws) << SS3_TCX_ADDR_MODE_SHIFT) |
247 (translate_wrap_mode(wt) << SS3_TCY_ADDR_MODE_SHIFT) |
248 (translate_wrap_mode(wr) << SS3_TCZ_ADDR_MODE_SHIFT));
249
250 if (sampler->normalized_coords)
251 cso->state[1] |= SS3_NORMALIZED_COORDS;
252
253 if (0) /* XXX not tested yet */
254 {
255 int minlod = (int) (16.0 * sampler->min_lod);
256 minlod = CLAMP(minlod, 0, 16 * 11);
257 cso->state[1] |= (minlod << SS3_MIN_LOD_SHIFT);
258 }
259
260 {
261 ubyte r = float_to_ubyte(sampler->border_color[0]);
262 ubyte g = float_to_ubyte(sampler->border_color[1]);
263 ubyte b = float_to_ubyte(sampler->border_color[2]);
264 ubyte a = float_to_ubyte(sampler->border_color[3]);
265 cso->state[2] = I915PACKCOLOR8888(r, g, b, a);
266 }
267 return cso;
268 }
269
270 static void i915_bind_sampler_state(struct pipe_context *pipe,
271 unsigned unit, void *sampler)
272 {
273 struct i915_context *i915 = i915_context(pipe);
274
275 assert(unit < PIPE_MAX_SAMPLERS);
276 i915->sampler[unit] = (const struct i915_sampler_state*)sampler;
277
278 i915->dirty |= I915_NEW_SAMPLER;
279 }
280
281 static void i915_delete_sampler_state(struct pipe_context *pipe,
282 void *sampler)
283 {
284 FREE(sampler);
285 }
286
287
288 /** XXX move someday? Or consolidate all these simple state setters
289 * into one file.
290 */
291
292 static void *
293 i915_create_depth_stencil_state(struct pipe_context *pipe,
294 const struct pipe_depth_stencil_alpha_state *depth_stencil)
295 {
296 struct i915_depth_stencil_state *cso = CALLOC_STRUCT( i915_depth_stencil_state );
297
298 {
299 int testmask = depth_stencil->stencil[0].value_mask & 0xff;
300 int writemask = depth_stencil->stencil[0].write_mask & 0xff;
301
302 cso->stencil_modes4 |= (_3DSTATE_MODES_4_CMD |
303 ENABLE_STENCIL_TEST_MASK |
304 STENCIL_TEST_MASK(testmask) |
305 ENABLE_STENCIL_WRITE_MASK |
306 STENCIL_WRITE_MASK(writemask));
307 }
308
309 if (depth_stencil->stencil[0].enabled) {
310 int test = i915_translate_compare_func(depth_stencil->stencil[0].func);
311 int fop = i915_translate_stencil_op(depth_stencil->stencil[0].fail_op);
312 int dfop = i915_translate_stencil_op(depth_stencil->stencil[0].zfail_op);
313 int dpop = i915_translate_stencil_op(depth_stencil->stencil[0].zpass_op);
314 int ref = depth_stencil->stencil[0].ref_value & 0xff;
315
316 cso->stencil_LIS5 |= (S5_STENCIL_TEST_ENABLE |
317 S5_STENCIL_WRITE_ENABLE |
318 (ref << S5_STENCIL_REF_SHIFT) |
319 (test << S5_STENCIL_TEST_FUNC_SHIFT) |
320 (fop << S5_STENCIL_FAIL_SHIFT) |
321 (dfop << S5_STENCIL_PASS_Z_FAIL_SHIFT) |
322 (dpop << S5_STENCIL_PASS_Z_PASS_SHIFT));
323 }
324
325 if (depth_stencil->stencil[1].enabled) {
326 int test = i915_translate_compare_func(depth_stencil->stencil[1].func);
327 int fop = i915_translate_stencil_op(depth_stencil->stencil[1].fail_op);
328 int dfop = i915_translate_stencil_op(depth_stencil->stencil[1].zfail_op);
329 int dpop = i915_translate_stencil_op(depth_stencil->stencil[1].zpass_op);
330 int ref = depth_stencil->stencil[1].ref_value & 0xff;
331 int tmask = depth_stencil->stencil[1].value_mask & 0xff;
332 int wmask = depth_stencil->stencil[1].write_mask & 0xff;
333
334 cso->bfo[0] = (_3DSTATE_BACKFACE_STENCIL_OPS |
335 BFO_ENABLE_STENCIL_FUNCS |
336 BFO_ENABLE_STENCIL_TWO_SIDE |
337 BFO_ENABLE_STENCIL_REF |
338 BFO_STENCIL_TWO_SIDE |
339 (ref << BFO_STENCIL_REF_SHIFT) |
340 (test << BFO_STENCIL_TEST_SHIFT) |
341 (fop << BFO_STENCIL_FAIL_SHIFT) |
342 (dfop << BFO_STENCIL_PASS_Z_FAIL_SHIFT) |
343 (dpop << BFO_STENCIL_PASS_Z_PASS_SHIFT));
344
345 cso->bfo[1] = (_3DSTATE_BACKFACE_STENCIL_MASKS |
346 BFM_ENABLE_STENCIL_TEST_MASK |
347 BFM_ENABLE_STENCIL_WRITE_MASK |
348 (tmask << BFM_STENCIL_TEST_MASK_SHIFT) |
349 (wmask << BFM_STENCIL_WRITE_MASK_SHIFT));
350 }
351 else {
352 /* This actually disables two-side stencil: The bit set is a
353 * modify-enable bit to indicate we are changing the two-side
354 * setting. Then there is a symbolic zero to show that we are
355 * setting the flag to zero/off.
356 */
357 cso->bfo[0] = (_3DSTATE_BACKFACE_STENCIL_OPS |
358 BFO_ENABLE_STENCIL_TWO_SIDE |
359 0);
360 cso->bfo[1] = 0;
361 }
362
363 if (depth_stencil->depth.enabled) {
364 int func = i915_translate_compare_func(depth_stencil->depth.func);
365
366 cso->depth_LIS6 |= (S6_DEPTH_TEST_ENABLE |
367 (func << S6_DEPTH_TEST_FUNC_SHIFT));
368
369 if (depth_stencil->depth.writemask)
370 cso->depth_LIS6 |= S6_DEPTH_WRITE_ENABLE;
371 }
372
373 if (depth_stencil->alpha.enabled) {
374 int test = i915_translate_compare_func(depth_stencil->alpha.func);
375 ubyte refByte = float_to_ubyte(depth_stencil->alpha.ref);
376
377 cso->depth_LIS6 |= (S6_ALPHA_TEST_ENABLE |
378 (test << S6_ALPHA_TEST_FUNC_SHIFT) |
379 (((unsigned) refByte) << S6_ALPHA_REF_SHIFT));
380 }
381
382 return cso;
383 }
384
385 static void i915_bind_depth_stencil_state(struct pipe_context *pipe,
386 void *depth_stencil)
387 {
388 struct i915_context *i915 = i915_context(pipe);
389
390 i915->depth_stencil = (const struct i915_depth_stencil_state *)depth_stencil;
391
392 i915->dirty |= I915_NEW_DEPTH_STENCIL;
393 }
394
395 static void i915_delete_depth_stencil_state(struct pipe_context *pipe,
396 void *depth_stencil)
397 {
398 FREE(depth_stencil);
399 }
400
401
402 static void i915_set_scissor_state( struct pipe_context *pipe,
403 const struct pipe_scissor_state *scissor )
404 {
405 struct i915_context *i915 = i915_context(pipe);
406
407 memcpy( &i915->scissor, scissor, sizeof(*scissor) );
408 i915->dirty |= I915_NEW_SCISSOR;
409 }
410
411
412 static void i915_set_polygon_stipple( struct pipe_context *pipe,
413 const struct pipe_poly_stipple *stipple )
414 {
415 }
416
417
418 static void * i915_create_fs_state(struct pipe_context *pipe,
419 const struct pipe_shader_state *templ)
420 {
421 return 0;
422 }
423
424 static void i915_bind_fs_state(struct pipe_context *pipe, void *fs)
425 {
426 struct i915_context *i915 = i915_context(pipe);
427
428 i915->fs = (struct pipe_shader_state *)fs;
429
430 i915->dirty |= I915_NEW_FS;
431 }
432
433 static void i915_delete_fs_state(struct pipe_context *pipe, void *shader)
434 {
435 /*do nothing*/
436 }
437
438 static void *
439 i915_create_vs_state(struct pipe_context *pipe,
440 const struct pipe_shader_state *templ)
441 {
442 struct i915_context *i915 = i915_context(pipe);
443
444 /* just pass-through to draw module */
445 return draw_create_vertex_shader(i915->draw, templ);
446 }
447
448 static void i915_bind_vs_state(struct pipe_context *pipe, void *shader)
449 {
450 struct i915_context *i915 = i915_context(pipe);
451
452 /* just pass-through to draw module */
453 draw_bind_vertex_shader(i915->draw, (struct draw_vertex_shader *) shader);
454 }
455
456 static void i915_delete_vs_state(struct pipe_context *pipe, void *shader)
457 {
458 struct i915_context *i915 = i915_context(pipe);
459
460 /* just pass-through to draw module */
461 draw_delete_vertex_shader(i915->draw, (struct draw_vertex_shader *) shader);
462 }
463
464 static void i915_set_constant_buffer(struct pipe_context *pipe,
465 uint shader, uint index,
466 const struct pipe_constant_buffer *buf)
467 {
468 struct i915_context *i915 = i915_context(pipe);
469 struct pipe_winsys *ws = pipe->winsys;
470
471 assert(shader < PIPE_SHADER_TYPES);
472 assert(index == 0);
473
474 /* Make a copy of shader constants.
475 * During fragment program translation we may add additional
476 * constants to the array.
477 *
478 * We want to consider the situation where some user constants
479 * (ex: a material color) may change frequently but the shader program
480 * stays the same. In that case we should only be updating the first
481 * N constants, leaving any extras from shader translation alone.
482 */
483 {
484 void *mapped;
485 if (buf->size &&
486 (mapped = ws->buffer_map(ws, buf->buffer,
487 PIPE_BUFFER_USAGE_CPU_READ))) {
488 memcpy(i915->current.constants[shader], mapped, buf->size);
489 ws->buffer_unmap(ws, buf->buffer);
490 i915->current.num_user_constants[shader]
491 = buf->size / (4 * sizeof(float));
492 }
493 else {
494 i915->current.num_user_constants[shader] = 0;
495 }
496 }
497
498 i915->dirty |= I915_NEW_CONSTANTS;
499 }
500
501
502 static void i915_set_sampler_texture(struct pipe_context *pipe,
503 unsigned sampler,
504 struct pipe_texture *texture)
505 {
506 struct i915_context *i915 = i915_context(pipe);
507
508 i915->texture[sampler] = (struct i915_texture*)texture; /* ptr, not struct */
509
510 i915->dirty |= I915_NEW_TEXTURE;
511 }
512
513
514
515 static void i915_set_framebuffer_state(struct pipe_context *pipe,
516 const struct pipe_framebuffer_state *fb)
517 {
518 struct i915_context *i915 = i915_context(pipe);
519
520 i915->framebuffer = *fb; /* struct copy */
521
522 i915->dirty |= I915_NEW_FRAMEBUFFER;
523 }
524
525
526
527 static void i915_set_clip_state( struct pipe_context *pipe,
528 const struct pipe_clip_state *clip )
529 {
530 struct i915_context *i915 = i915_context(pipe);
531
532 draw_set_clip_state(i915->draw, clip);
533
534 i915->dirty |= I915_NEW_CLIP;
535 }
536
537
538
539 /* Called when driver state tracker notices changes to the viewport
540 * matrix:
541 */
542 static void i915_set_viewport_state( struct pipe_context *pipe,
543 const struct pipe_viewport_state *viewport )
544 {
545 struct i915_context *i915 = i915_context(pipe);
546
547 i915->viewport = *viewport; /* struct copy */
548
549 /* pass the viewport info to the draw module */
550 draw_set_viewport_state(i915->draw, &i915->viewport);
551
552 i915->dirty |= I915_NEW_VIEWPORT;
553 }
554
555
556 static void *
557 i915_create_rasterizer_state(struct pipe_context *pipe,
558 const struct pipe_rasterizer_state *rasterizer)
559 {
560 struct i915_rasterizer_state *cso = CALLOC_STRUCT( i915_rasterizer_state );
561
562 cso->templ = rasterizer;
563 cso->color_interp = rasterizer->flatshade ? INTERP_CONSTANT : INTERP_LINEAR;
564 cso->light_twoside = rasterizer->light_twoside;
565 cso->ds[0].u = _3DSTATE_DEPTH_OFFSET_SCALE;
566 cso->ds[1].f = rasterizer->offset_scale;
567 if (rasterizer->poly_stipple_enable) {
568 cso->st |= ST1_ENABLE;
569 }
570
571 if (rasterizer->scissor)
572 cso->sc[0] = _3DSTATE_SCISSOR_ENABLE_CMD | ENABLE_SCISSOR_RECT;
573 else
574 cso->sc[0] = _3DSTATE_SCISSOR_ENABLE_CMD | DISABLE_SCISSOR_RECT;
575
576 switch (rasterizer->cull_mode) {
577 case PIPE_WINDING_NONE:
578 cso->LIS4 |= S4_CULLMODE_NONE;
579 break;
580 case PIPE_WINDING_CW:
581 cso->LIS4 |= S4_CULLMODE_CW;
582 break;
583 case PIPE_WINDING_CCW:
584 cso->LIS4 |= S4_CULLMODE_CCW;
585 break;
586 case PIPE_WINDING_BOTH:
587 cso->LIS4 |= S4_CULLMODE_BOTH;
588 break;
589 }
590
591 {
592 int line_width = CLAMP((int)(rasterizer->line_width * 2), 1, 0xf);
593
594 cso->LIS4 |= line_width << S4_LINE_WIDTH_SHIFT;
595
596 if (rasterizer->line_smooth)
597 cso->LIS4 |= S4_LINE_ANTIALIAS_ENABLE;
598 }
599
600 {
601 int point_size = CLAMP((int) rasterizer->point_size, 1, 0xff);
602
603 cso->LIS4 |= point_size << S4_POINT_WIDTH_SHIFT;
604 }
605
606 if (rasterizer->flatshade) {
607 cso->LIS4 |= (S4_FLATSHADE_ALPHA |
608 S4_FLATSHADE_COLOR |
609 S4_FLATSHADE_SPECULAR);
610 }
611
612 cso->LIS7 = fui( rasterizer->offset_units );
613
614
615 return cso;
616 }
617
618 static void i915_bind_rasterizer_state( struct pipe_context *pipe,
619 void *setup )
620 {
621 struct i915_context *i915 = i915_context(pipe);
622
623 i915->rasterizer = (struct i915_rasterizer_state *)setup;
624
625 /* pass-through to draw module */
626 draw_set_rasterizer_state(i915->draw, i915->rasterizer->templ);
627
628 i915->dirty |= I915_NEW_RASTERIZER;
629 }
630
631 static void i915_delete_rasterizer_state(struct pipe_context *pipe,
632 void *setup)
633 {
634 FREE(setup);
635 }
636
637 static void i915_set_vertex_buffer( struct pipe_context *pipe,
638 unsigned index,
639 const struct pipe_vertex_buffer *buffer )
640 {
641 struct i915_context *i915 = i915_context(pipe);
642 i915->vertex_buffer[index] = *buffer;
643 /* pass-through to draw module */
644 draw_set_vertex_buffer(i915->draw, index, buffer);
645 }
646
647 static void i915_set_vertex_element( struct pipe_context *pipe,
648 unsigned index,
649 const struct pipe_vertex_element *element)
650 {
651 struct i915_context *i915 = i915_context(pipe);
652 /* pass-through to draw module */
653 draw_set_vertex_element(i915->draw, index, element);
654 }
655
656
657
658 void
659 i915_init_state_functions( struct i915_context *i915 )
660 {
661 i915->pipe.create_blend_state = i915_create_blend_state;
662 i915->pipe.bind_blend_state = i915_bind_blend_state;
663 i915->pipe.delete_blend_state = i915_delete_blend_state;
664
665 i915->pipe.create_sampler_state = i915_create_sampler_state;
666 i915->pipe.bind_sampler_state = i915_bind_sampler_state;
667 i915->pipe.delete_sampler_state = i915_delete_sampler_state;
668
669 i915->pipe.create_depth_stencil_alpha_state = i915_create_depth_stencil_state;
670 i915->pipe.bind_depth_stencil_alpha_state = i915_bind_depth_stencil_state;
671 i915->pipe.delete_depth_stencil_alpha_state = i915_delete_depth_stencil_state;
672
673 i915->pipe.create_rasterizer_state = i915_create_rasterizer_state;
674 i915->pipe.bind_rasterizer_state = i915_bind_rasterizer_state;
675 i915->pipe.delete_rasterizer_state = i915_delete_rasterizer_state;
676 i915->pipe.create_fs_state = i915_create_fs_state;
677 i915->pipe.bind_fs_state = i915_bind_fs_state;
678 i915->pipe.delete_fs_state = i915_delete_fs_state;
679 i915->pipe.create_vs_state = i915_create_vs_state;
680 i915->pipe.bind_vs_state = i915_bind_vs_state;
681 i915->pipe.delete_vs_state = i915_delete_vs_state;
682
683 i915->pipe.set_blend_color = i915_set_blend_color;
684 i915->pipe.set_clip_state = i915_set_clip_state;
685 i915->pipe.set_constant_buffer = i915_set_constant_buffer;
686 i915->pipe.set_framebuffer_state = i915_set_framebuffer_state;
687
688 i915->pipe.set_polygon_stipple = i915_set_polygon_stipple;
689 i915->pipe.set_scissor_state = i915_set_scissor_state;
690 i915->pipe.set_sampler_texture = i915_set_sampler_texture;
691 i915->pipe.set_viewport_state = i915_set_viewport_state;
692 i915->pipe.set_vertex_buffer = i915_set_vertex_buffer;
693 i915->pipe.set_vertex_element = i915_set_vertex_element;
694 }