nv40: fix typo in one of the previous commits
[mesa.git] / src / gallium / drivers / i915simple / i915_state.c
1 /**************************************************************************
2 *
3 * Copyright 2007 Tungsten Graphics, Inc., Cedar Park, Texas.
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 **************************************************************************/
27
28 /* Authors: Keith Whitwell <keith@tungstengraphics.com>
29 */
30
31
32 #include "draw/draw_context.h"
33 #include "pipe/p_winsys.h"
34 #include "pipe/p_util.h"
35 #include "pipe/p_inlines.h"
36
37 #include "i915_context.h"
38 #include "i915_reg.h"
39 #include "i915_state.h"
40 #include "i915_state_inlines.h"
41 #include "i915_fpc.h"
42
43
44 /* The i915 (and related graphics cores) do not support GL_CLAMP. The
45 * Intel drivers for "other operating systems" implement GL_CLAMP as
46 * GL_CLAMP_TO_EDGE, so the same is done here.
47 */
48 static unsigned
49 translate_wrap_mode(unsigned wrap)
50 {
51 switch (wrap) {
52 case PIPE_TEX_WRAP_REPEAT:
53 return TEXCOORDMODE_WRAP;
54 case PIPE_TEX_WRAP_CLAMP:
55 return TEXCOORDMODE_CLAMP_EDGE; /* not quite correct */
56 case PIPE_TEX_WRAP_CLAMP_TO_EDGE:
57 return TEXCOORDMODE_CLAMP_EDGE;
58 case PIPE_TEX_WRAP_CLAMP_TO_BORDER:
59 return TEXCOORDMODE_CLAMP_BORDER;
60 // case PIPE_TEX_WRAP_MIRRORED_REPEAT:
61 // return TEXCOORDMODE_MIRROR;
62 default:
63 return TEXCOORDMODE_WRAP;
64 }
65 }
66
67 static unsigned translate_img_filter( unsigned filter )
68 {
69 switch (filter) {
70 case PIPE_TEX_FILTER_NEAREST:
71 return FILTER_NEAREST;
72 case PIPE_TEX_FILTER_LINEAR:
73 return FILTER_LINEAR;
74 case PIPE_TEX_FILTER_ANISO:
75 return FILTER_ANISOTROPIC;
76 default:
77 assert(0);
78 return FILTER_NEAREST;
79 }
80 }
81
82 static unsigned translate_mip_filter( unsigned filter )
83 {
84 switch (filter) {
85 case PIPE_TEX_MIPFILTER_NONE:
86 return MIPFILTER_NONE;
87 case PIPE_TEX_MIPFILTER_NEAREST:
88 return MIPFILTER_NEAREST;
89 case PIPE_TEX_MIPFILTER_LINEAR:
90 return MIPFILTER_LINEAR;
91 default:
92 assert(0);
93 return MIPFILTER_NONE;
94 }
95 }
96
97
98 /* None of this state is actually used for anything yet.
99 */
100 static void *
101 i915_create_blend_state(struct pipe_context *pipe,
102 const struct pipe_blend_state *blend)
103 {
104 struct i915_blend_state *cso_data = CALLOC_STRUCT( i915_blend_state );
105
106 {
107 unsigned eqRGB = blend->rgb_func;
108 unsigned srcRGB = blend->rgb_src_factor;
109 unsigned dstRGB = blend->rgb_dst_factor;
110
111 unsigned eqA = blend->alpha_func;
112 unsigned srcA = blend->alpha_src_factor;
113 unsigned dstA = blend->alpha_dst_factor;
114
115 /* Special handling for MIN/MAX filter modes handled at
116 * state_tracker level.
117 */
118
119 if (srcA != srcRGB ||
120 dstA != dstRGB ||
121 eqA != eqRGB) {
122
123 cso_data->iab = (_3DSTATE_INDEPENDENT_ALPHA_BLEND_CMD |
124 IAB_MODIFY_ENABLE |
125 IAB_ENABLE |
126 IAB_MODIFY_FUNC |
127 IAB_MODIFY_SRC_FACTOR |
128 IAB_MODIFY_DST_FACTOR |
129 SRC_ABLND_FACT(i915_translate_blend_factor(srcA)) |
130 DST_ABLND_FACT(i915_translate_blend_factor(dstA)) |
131 (i915_translate_blend_func(eqA) << IAB_FUNC_SHIFT));
132 }
133 else {
134 cso_data->iab = (_3DSTATE_INDEPENDENT_ALPHA_BLEND_CMD |
135 IAB_MODIFY_ENABLE |
136 0);
137 }
138 }
139
140 cso_data->modes4 |= (_3DSTATE_MODES_4_CMD |
141 ENABLE_LOGIC_OP_FUNC |
142 LOGIC_OP_FUNC(i915_translate_logic_op(blend->logicop_func)));
143
144 if (blend->logicop_enable)
145 cso_data->LIS5 |= S5_LOGICOP_ENABLE;
146
147 if (blend->dither)
148 cso_data->LIS5 |= S5_COLOR_DITHER_ENABLE;
149
150 if ((blend->colormask & PIPE_MASK_R) == 0)
151 cso_data->LIS5 |= S5_WRITEDISABLE_RED;
152
153 if ((blend->colormask & PIPE_MASK_G) == 0)
154 cso_data->LIS5 |= S5_WRITEDISABLE_GREEN;
155
156 if ((blend->colormask & PIPE_MASK_B) == 0)
157 cso_data->LIS5 |= S5_WRITEDISABLE_BLUE;
158
159 if ((blend->colormask & PIPE_MASK_A) == 0)
160 cso_data->LIS5 |= S5_WRITEDISABLE_ALPHA;
161
162 if (blend->blend_enable) {
163 unsigned funcRGB = blend->rgb_func;
164 unsigned srcRGB = blend->rgb_src_factor;
165 unsigned dstRGB = blend->rgb_dst_factor;
166
167 cso_data->LIS6 |= (S6_CBUF_BLEND_ENABLE |
168 SRC_BLND_FACT(i915_translate_blend_factor(srcRGB)) |
169 DST_BLND_FACT(i915_translate_blend_factor(dstRGB)) |
170 (i915_translate_blend_func(funcRGB) << S6_CBUF_BLEND_FUNC_SHIFT));
171 }
172
173 return cso_data;
174 }
175
176 static void i915_bind_blend_state(struct pipe_context *pipe,
177 void *blend)
178 {
179 struct i915_context *i915 = i915_context(pipe);
180
181 i915->blend = (struct i915_blend_state*)blend;
182
183 i915->dirty |= I915_NEW_BLEND;
184 }
185
186
187 static void i915_delete_blend_state(struct pipe_context *pipe, void *blend)
188 {
189 FREE(blend);
190 }
191
192 static void i915_set_blend_color( struct pipe_context *pipe,
193 const struct pipe_blend_color *blend_color )
194 {
195 struct i915_context *i915 = i915_context(pipe);
196
197 i915->blend_color = *blend_color;
198
199 i915->dirty |= I915_NEW_BLEND;
200 }
201
202 static void *
203 i915_create_sampler_state(struct pipe_context *pipe,
204 const struct pipe_sampler_state *sampler)
205 {
206 struct i915_sampler_state *cso = CALLOC_STRUCT( i915_sampler_state );
207 const unsigned ws = sampler->wrap_s;
208 const unsigned wt = sampler->wrap_t;
209 const unsigned wr = sampler->wrap_r;
210 unsigned minFilt, magFilt;
211 unsigned mipFilt;
212
213 cso->templ = sampler;
214
215 mipFilt = translate_mip_filter(sampler->min_mip_filter);
216 minFilt = translate_img_filter( sampler->min_img_filter );
217 magFilt = translate_img_filter( sampler->mag_img_filter );
218
219 if (sampler->max_anisotropy > 2.0) {
220 cso->state[0] |= SS2_MAX_ANISO_4;
221 }
222
223 {
224 int b = (int) (sampler->lod_bias * 16.0);
225 b = CLAMP(b, -256, 255);
226 cso->state[0] |= ((b << SS2_LOD_BIAS_SHIFT) & SS2_LOD_BIAS_MASK);
227 }
228
229 /* Shadow:
230 */
231 if (sampler->compare_mode == PIPE_TEX_COMPARE_R_TO_TEXTURE)
232 {
233 cso->state[0] |= (SS2_SHADOW_ENABLE |
234 i915_translate_compare_func(sampler->compare_func));
235
236 minFilt = FILTER_4X4_FLAT;
237 magFilt = FILTER_4X4_FLAT;
238 }
239
240 cso->state[0] |= ((minFilt << SS2_MIN_FILTER_SHIFT) |
241 (mipFilt << SS2_MIP_FILTER_SHIFT) |
242 (magFilt << SS2_MAG_FILTER_SHIFT));
243
244 cso->state[1] |=
245 ((translate_wrap_mode(ws) << SS3_TCX_ADDR_MODE_SHIFT) |
246 (translate_wrap_mode(wt) << SS3_TCY_ADDR_MODE_SHIFT) |
247 (translate_wrap_mode(wr) << SS3_TCZ_ADDR_MODE_SHIFT));
248
249 if (sampler->normalized_coords)
250 cso->state[1] |= SS3_NORMALIZED_COORDS;
251
252 if (0) /* XXX not tested yet */
253 {
254 int minlod = (int) (16.0 * sampler->min_lod);
255 minlod = CLAMP(minlod, 0, 16 * 11);
256 cso->state[1] |= (minlod << SS3_MIN_LOD_SHIFT);
257 }
258
259 {
260 ubyte r = float_to_ubyte(sampler->border_color[0]);
261 ubyte g = float_to_ubyte(sampler->border_color[1]);
262 ubyte b = float_to_ubyte(sampler->border_color[2]);
263 ubyte a = float_to_ubyte(sampler->border_color[3]);
264 cso->state[2] = I915PACKCOLOR8888(r, g, b, a);
265 }
266 return cso;
267 }
268
269 static void i915_bind_sampler_states(struct pipe_context *pipe,
270 unsigned num, void **sampler)
271 {
272 struct i915_context *i915 = i915_context(pipe);
273 unsigned i;
274
275 assert(num <= PIPE_MAX_SAMPLERS);
276
277 /* Check for no-op */
278 if (num == i915->num_samplers &&
279 !memcmp(i915->sampler, sampler, num * sizeof(void *)))
280 return;
281
282 for (i = 0; i < num; ++i)
283 i915->sampler[i] = sampler[i];
284 for (i = num; i < PIPE_MAX_SAMPLERS; ++i)
285 i915->sampler[i] = NULL;
286
287 i915->num_samplers = num;
288
289 i915->dirty |= I915_NEW_SAMPLER;
290 }
291
292 static void i915_delete_sampler_state(struct pipe_context *pipe,
293 void *sampler)
294 {
295 FREE(sampler);
296 }
297
298
299 /** XXX move someday? Or consolidate all these simple state setters
300 * into one file.
301 */
302
303 static void *
304 i915_create_depth_stencil_state(struct pipe_context *pipe,
305 const struct pipe_depth_stencil_alpha_state *depth_stencil)
306 {
307 struct i915_depth_stencil_state *cso = CALLOC_STRUCT( i915_depth_stencil_state );
308
309 {
310 int testmask = depth_stencil->stencil[0].value_mask & 0xff;
311 int writemask = depth_stencil->stencil[0].write_mask & 0xff;
312
313 cso->stencil_modes4 |= (_3DSTATE_MODES_4_CMD |
314 ENABLE_STENCIL_TEST_MASK |
315 STENCIL_TEST_MASK(testmask) |
316 ENABLE_STENCIL_WRITE_MASK |
317 STENCIL_WRITE_MASK(writemask));
318 }
319
320 if (depth_stencil->stencil[0].enabled) {
321 int test = i915_translate_compare_func(depth_stencil->stencil[0].func);
322 int fop = i915_translate_stencil_op(depth_stencil->stencil[0].fail_op);
323 int dfop = i915_translate_stencil_op(depth_stencil->stencil[0].zfail_op);
324 int dpop = i915_translate_stencil_op(depth_stencil->stencil[0].zpass_op);
325 int ref = depth_stencil->stencil[0].ref_value & 0xff;
326
327 cso->stencil_LIS5 |= (S5_STENCIL_TEST_ENABLE |
328 S5_STENCIL_WRITE_ENABLE |
329 (ref << S5_STENCIL_REF_SHIFT) |
330 (test << S5_STENCIL_TEST_FUNC_SHIFT) |
331 (fop << S5_STENCIL_FAIL_SHIFT) |
332 (dfop << S5_STENCIL_PASS_Z_FAIL_SHIFT) |
333 (dpop << S5_STENCIL_PASS_Z_PASS_SHIFT));
334 }
335
336 if (depth_stencil->stencil[1].enabled) {
337 int test = i915_translate_compare_func(depth_stencil->stencil[1].func);
338 int fop = i915_translate_stencil_op(depth_stencil->stencil[1].fail_op);
339 int dfop = i915_translate_stencil_op(depth_stencil->stencil[1].zfail_op);
340 int dpop = i915_translate_stencil_op(depth_stencil->stencil[1].zpass_op);
341 int ref = depth_stencil->stencil[1].ref_value & 0xff;
342 int tmask = depth_stencil->stencil[1].value_mask & 0xff;
343 int wmask = depth_stencil->stencil[1].write_mask & 0xff;
344
345 cso->bfo[0] = (_3DSTATE_BACKFACE_STENCIL_OPS |
346 BFO_ENABLE_STENCIL_FUNCS |
347 BFO_ENABLE_STENCIL_TWO_SIDE |
348 BFO_ENABLE_STENCIL_REF |
349 BFO_STENCIL_TWO_SIDE |
350 (ref << BFO_STENCIL_REF_SHIFT) |
351 (test << BFO_STENCIL_TEST_SHIFT) |
352 (fop << BFO_STENCIL_FAIL_SHIFT) |
353 (dfop << BFO_STENCIL_PASS_Z_FAIL_SHIFT) |
354 (dpop << BFO_STENCIL_PASS_Z_PASS_SHIFT));
355
356 cso->bfo[1] = (_3DSTATE_BACKFACE_STENCIL_MASKS |
357 BFM_ENABLE_STENCIL_TEST_MASK |
358 BFM_ENABLE_STENCIL_WRITE_MASK |
359 (tmask << BFM_STENCIL_TEST_MASK_SHIFT) |
360 (wmask << BFM_STENCIL_WRITE_MASK_SHIFT));
361 }
362 else {
363 /* This actually disables two-side stencil: The bit set is a
364 * modify-enable bit to indicate we are changing the two-side
365 * setting. Then there is a symbolic zero to show that we are
366 * setting the flag to zero/off.
367 */
368 cso->bfo[0] = (_3DSTATE_BACKFACE_STENCIL_OPS |
369 BFO_ENABLE_STENCIL_TWO_SIDE |
370 0);
371 cso->bfo[1] = 0;
372 }
373
374 if (depth_stencil->depth.enabled) {
375 int func = i915_translate_compare_func(depth_stencil->depth.func);
376
377 cso->depth_LIS6 |= (S6_DEPTH_TEST_ENABLE |
378 (func << S6_DEPTH_TEST_FUNC_SHIFT));
379
380 if (depth_stencil->depth.writemask)
381 cso->depth_LIS6 |= S6_DEPTH_WRITE_ENABLE;
382 }
383
384 if (depth_stencil->alpha.enabled) {
385 int test = i915_translate_compare_func(depth_stencil->alpha.func);
386 ubyte refByte = float_to_ubyte(depth_stencil->alpha.ref);
387
388 cso->depth_LIS6 |= (S6_ALPHA_TEST_ENABLE |
389 (test << S6_ALPHA_TEST_FUNC_SHIFT) |
390 (((unsigned) refByte) << S6_ALPHA_REF_SHIFT));
391 }
392
393 return cso;
394 }
395
396 static void i915_bind_depth_stencil_state(struct pipe_context *pipe,
397 void *depth_stencil)
398 {
399 struct i915_context *i915 = i915_context(pipe);
400
401 i915->depth_stencil = (const struct i915_depth_stencil_state *)depth_stencil;
402
403 i915->dirty |= I915_NEW_DEPTH_STENCIL;
404 }
405
406 static void i915_delete_depth_stencil_state(struct pipe_context *pipe,
407 void *depth_stencil)
408 {
409 FREE(depth_stencil);
410 }
411
412
413 static void i915_set_scissor_state( struct pipe_context *pipe,
414 const struct pipe_scissor_state *scissor )
415 {
416 struct i915_context *i915 = i915_context(pipe);
417
418 memcpy( &i915->scissor, scissor, sizeof(*scissor) );
419 i915->dirty |= I915_NEW_SCISSOR;
420 }
421
422
423 static void i915_set_polygon_stipple( struct pipe_context *pipe,
424 const struct pipe_poly_stipple *stipple )
425 {
426 }
427
428
429
430 static void *
431 i915_create_fs_state(struct pipe_context *pipe,
432 const struct pipe_shader_state *templ)
433 {
434 struct i915_context *i915 = i915_context(pipe);
435 struct i915_fragment_shader *ifs = CALLOC_STRUCT(i915_fragment_shader);
436 if (!ifs)
437 return NULL;
438
439 ifs->state = *templ;
440
441 tgsi_scan_shader(templ->tokens, &ifs->info);
442
443 /* The shader's compiled to i915 instructions here */
444 i915_translate_fragment_program(i915, ifs);
445
446 return ifs;
447 }
448
449 static void
450 i915_bind_fs_state(struct pipe_context *pipe, void *shader)
451 {
452 struct i915_context *i915 = i915_context(pipe);
453
454 i915->fs = (struct i915_fragment_shader*) shader;
455
456 i915->dirty |= I915_NEW_FS;
457 }
458
459 static
460 void i915_delete_fs_state(struct pipe_context *pipe, void *shader)
461 {
462 struct i915_fragment_shader *ifs = (struct i915_fragment_shader *) shader;
463
464 if (ifs->program)
465 FREE(ifs->program);
466 ifs->program_len = 0;
467
468 FREE(ifs);
469 }
470
471
472 static void *
473 i915_create_vs_state(struct pipe_context *pipe,
474 const struct pipe_shader_state *templ)
475 {
476 struct i915_context *i915 = i915_context(pipe);
477
478 /* just pass-through to draw module */
479 return draw_create_vertex_shader(i915->draw, templ);
480 }
481
482 static void i915_bind_vs_state(struct pipe_context *pipe, void *shader)
483 {
484 struct i915_context *i915 = i915_context(pipe);
485
486 /* just pass-through to draw module */
487 draw_bind_vertex_shader(i915->draw, (struct draw_vertex_shader *) shader);
488
489 i915->dirty |= I915_NEW_VS;
490 }
491
492 static void i915_delete_vs_state(struct pipe_context *pipe, void *shader)
493 {
494 struct i915_context *i915 = i915_context(pipe);
495
496 /* just pass-through to draw module */
497 draw_delete_vertex_shader(i915->draw, (struct draw_vertex_shader *) shader);
498 }
499
500 static void i915_set_constant_buffer(struct pipe_context *pipe,
501 uint shader, uint index,
502 const struct pipe_constant_buffer *buf)
503 {
504 struct i915_context *i915 = i915_context(pipe);
505 struct pipe_winsys *ws = pipe->winsys;
506
507 assert(shader < PIPE_SHADER_TYPES);
508 assert(index == 0);
509
510 /* Make a copy of shader constants.
511 * During fragment program translation we may add additional
512 * constants to the array.
513 *
514 * We want to consider the situation where some user constants
515 * (ex: a material color) may change frequently but the shader program
516 * stays the same. In that case we should only be updating the first
517 * N constants, leaving any extras from shader translation alone.
518 */
519 if (buf) {
520 void *mapped;
521 if (buf->size &&
522 (mapped = ws->buffer_map(ws, buf->buffer,
523 PIPE_BUFFER_USAGE_CPU_READ))) {
524 memcpy(i915->current.constants[shader], mapped, buf->size);
525 ws->buffer_unmap(ws, buf->buffer);
526 i915->current.num_user_constants[shader]
527 = buf->size / (4 * sizeof(float));
528 }
529 else {
530 i915->current.num_user_constants[shader] = 0;
531 }
532 }
533
534 i915->dirty |= I915_NEW_CONSTANTS;
535 }
536
537
538 static void i915_set_sampler_textures(struct pipe_context *pipe,
539 unsigned num,
540 struct pipe_texture **texture)
541 {
542 struct i915_context *i915 = i915_context(pipe);
543 uint i;
544
545 assert(num <= PIPE_MAX_SAMPLERS);
546
547 /* Check for no-op */
548 if (num == i915->num_textures &&
549 !memcmp(i915->texture, texture, num * sizeof(struct pipe_texture *)))
550 return;
551
552 /* Fixes wrong texture in texobj with VBUF */
553 draw_flush(i915->draw);
554
555 for (i = 0; i < num; i++)
556 pipe_texture_reference((struct pipe_texture **) &i915->texture[i],
557 texture[i]);
558
559 for (i = num; i < i915->num_textures; i++)
560 pipe_texture_reference((struct pipe_texture **) &i915->texture[i],
561 NULL);
562
563 i915->num_textures = num;
564
565 i915->dirty |= I915_NEW_TEXTURE;
566 }
567
568
569
570 static void i915_set_framebuffer_state(struct pipe_context *pipe,
571 const struct pipe_framebuffer_state *fb)
572 {
573 struct i915_context *i915 = i915_context(pipe);
574
575 i915->framebuffer = *fb; /* struct copy */
576
577 i915->dirty |= I915_NEW_FRAMEBUFFER;
578 }
579
580
581
582 static void i915_set_clip_state( struct pipe_context *pipe,
583 const struct pipe_clip_state *clip )
584 {
585 struct i915_context *i915 = i915_context(pipe);
586
587 draw_set_clip_state(i915->draw, clip);
588
589 i915->dirty |= I915_NEW_CLIP;
590 }
591
592
593
594 /* Called when driver state tracker notices changes to the viewport
595 * matrix:
596 */
597 static void i915_set_viewport_state( struct pipe_context *pipe,
598 const struct pipe_viewport_state *viewport )
599 {
600 struct i915_context *i915 = i915_context(pipe);
601
602 i915->viewport = *viewport; /* struct copy */
603
604 /* pass the viewport info to the draw module */
605 draw_set_viewport_state(i915->draw, &i915->viewport);
606
607 i915->dirty |= I915_NEW_VIEWPORT;
608 }
609
610
611 static void *
612 i915_create_rasterizer_state(struct pipe_context *pipe,
613 const struct pipe_rasterizer_state *rasterizer)
614 {
615 struct i915_rasterizer_state *cso = CALLOC_STRUCT( i915_rasterizer_state );
616
617 cso->templ = rasterizer;
618 cso->color_interp = rasterizer->flatshade ? INTERP_CONSTANT : INTERP_LINEAR;
619 cso->light_twoside = rasterizer->light_twoside;
620 cso->ds[0].u = _3DSTATE_DEPTH_OFFSET_SCALE;
621 cso->ds[1].f = rasterizer->offset_scale;
622 if (rasterizer->poly_stipple_enable) {
623 cso->st |= ST1_ENABLE;
624 }
625
626 if (rasterizer->scissor)
627 cso->sc[0] = _3DSTATE_SCISSOR_ENABLE_CMD | ENABLE_SCISSOR_RECT;
628 else
629 cso->sc[0] = _3DSTATE_SCISSOR_ENABLE_CMD | DISABLE_SCISSOR_RECT;
630
631 switch (rasterizer->cull_mode) {
632 case PIPE_WINDING_NONE:
633 cso->LIS4 |= S4_CULLMODE_NONE;
634 break;
635 case PIPE_WINDING_CW:
636 cso->LIS4 |= S4_CULLMODE_CW;
637 break;
638 case PIPE_WINDING_CCW:
639 cso->LIS4 |= S4_CULLMODE_CCW;
640 break;
641 case PIPE_WINDING_BOTH:
642 cso->LIS4 |= S4_CULLMODE_BOTH;
643 break;
644 }
645
646 {
647 int line_width = CLAMP((int)(rasterizer->line_width * 2), 1, 0xf);
648
649 cso->LIS4 |= line_width << S4_LINE_WIDTH_SHIFT;
650
651 if (rasterizer->line_smooth)
652 cso->LIS4 |= S4_LINE_ANTIALIAS_ENABLE;
653 }
654
655 {
656 int point_size = CLAMP((int) rasterizer->point_size, 1, 0xff);
657
658 cso->LIS4 |= point_size << S4_POINT_WIDTH_SHIFT;
659 }
660
661 if (rasterizer->flatshade) {
662 cso->LIS4 |= (S4_FLATSHADE_ALPHA |
663 S4_FLATSHADE_COLOR |
664 S4_FLATSHADE_SPECULAR);
665 }
666
667 cso->LIS7 = fui( rasterizer->offset_units );
668
669
670 return cso;
671 }
672
673 static void i915_bind_rasterizer_state( struct pipe_context *pipe,
674 void *raster )
675 {
676 struct i915_context *i915 = i915_context(pipe);
677
678 i915->rasterizer = (struct i915_rasterizer_state *)raster;
679
680 /* pass-through to draw module */
681 draw_set_rasterizer_state(i915->draw,
682 (i915->rasterizer ? i915->rasterizer->templ : NULL));
683
684 i915->dirty |= I915_NEW_RASTERIZER;
685 }
686
687 static void i915_delete_rasterizer_state(struct pipe_context *pipe,
688 void *raster)
689 {
690 FREE(raster);
691 }
692
693 static void i915_set_vertex_buffers(struct pipe_context *pipe,
694 unsigned count,
695 const struct pipe_vertex_buffer *buffers)
696 {
697 struct i915_context *i915 = i915_context(pipe);
698
699 memcpy(i915->vertex_buffer, buffers, count * sizeof(buffers[0]));
700 i915->num_vertex_buffers = count;
701
702 /* pass-through to draw module */
703 draw_set_vertex_buffers(i915->draw, count, buffers);
704 }
705
706 static void i915_set_vertex_elements(struct pipe_context *pipe,
707 unsigned count,
708 const struct pipe_vertex_element *elements)
709 {
710 struct i915_context *i915 = i915_context(pipe);
711 i915->num_vertex_elements = count;
712 /* pass-through to draw module */
713 draw_set_vertex_elements(i915->draw, count, elements);
714 }
715
716
717
718 void
719 i915_init_state_functions( struct i915_context *i915 )
720 {
721 i915->pipe.create_blend_state = i915_create_blend_state;
722 i915->pipe.bind_blend_state = i915_bind_blend_state;
723 i915->pipe.delete_blend_state = i915_delete_blend_state;
724
725 i915->pipe.create_sampler_state = i915_create_sampler_state;
726 i915->pipe.bind_sampler_states = i915_bind_sampler_states;
727 i915->pipe.delete_sampler_state = i915_delete_sampler_state;
728
729 i915->pipe.create_depth_stencil_alpha_state = i915_create_depth_stencil_state;
730 i915->pipe.bind_depth_stencil_alpha_state = i915_bind_depth_stencil_state;
731 i915->pipe.delete_depth_stencil_alpha_state = i915_delete_depth_stencil_state;
732
733 i915->pipe.create_rasterizer_state = i915_create_rasterizer_state;
734 i915->pipe.bind_rasterizer_state = i915_bind_rasterizer_state;
735 i915->pipe.delete_rasterizer_state = i915_delete_rasterizer_state;
736 i915->pipe.create_fs_state = i915_create_fs_state;
737 i915->pipe.bind_fs_state = i915_bind_fs_state;
738 i915->pipe.delete_fs_state = i915_delete_fs_state;
739 i915->pipe.create_vs_state = i915_create_vs_state;
740 i915->pipe.bind_vs_state = i915_bind_vs_state;
741 i915->pipe.delete_vs_state = i915_delete_vs_state;
742
743 i915->pipe.set_blend_color = i915_set_blend_color;
744 i915->pipe.set_clip_state = i915_set_clip_state;
745 i915->pipe.set_constant_buffer = i915_set_constant_buffer;
746 i915->pipe.set_framebuffer_state = i915_set_framebuffer_state;
747
748 i915->pipe.set_polygon_stipple = i915_set_polygon_stipple;
749 i915->pipe.set_scissor_state = i915_set_scissor_state;
750 i915->pipe.set_sampler_textures = i915_set_sampler_textures;
751 i915->pipe.set_viewport_state = i915_set_viewport_state;
752 i915->pipe.set_vertex_buffers = i915_set_vertex_buffers;
753 i915->pipe.set_vertex_elements = i915_set_vertex_elements;
754 }