i965g: more work on compiling
[mesa.git] / src / gallium / drivers / i965 / brw_cc.c
1 /*
2 Copyright (C) Intel Corp. 2006. All Rights Reserved.
3 Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
4 develop this 3D driver.
5
6 Permission is hereby granted, free of charge, to any person obtaining
7 a copy of this software and associated documentation files (the
8 "Software"), to deal in the Software without restriction, including
9 without limitation the rights to use, copy, modify, merge, publish,
10 distribute, sublicense, and/or sell copies of the Software, and to
11 permit persons to whom the Software is furnished to do so, subject to
12 the following conditions:
13
14 The above copyright notice and this permission notice (including the
15 next paragraph) shall be included in all copies or substantial
16 portions of the Software.
17
18 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
19 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
21 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
22 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
23 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
24 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25
26 **********************************************************************/
27 /*
28 * Authors:
29 * Keith Whitwell <keith@tungstengraphics.com>
30 */
31
32
33 #include "brw_context.h"
34 #include "brw_state.h"
35 #include "brw_defines.h"
36
37
38 struct sane_viewport {
39 float top;
40 float left;
41 float width;
42 float height;
43 float near;
44 float far;
45 };
46
47 static void calc_sane_viewport( const struct pipe_viewport_state *vp,
48 struct sane_viewport *svp )
49 {
50 /* XXX fix me, obviously.
51 */
52 svp->top = 0;
53 svp->left = 0;
54 svp->width = 250;
55 svp->height = 250;
56 svp->near = 0;
57 svp->far = 1;
58 }
59
60 static void prepare_cc_vp( struct brw_context *brw )
61 {
62 struct brw_cc_viewport ccv;
63 struct sane_viewport svp;
64
65 memset(&ccv, 0, sizeof(ccv));
66
67 /* PIPE_NEW_VIEWPORT */
68 calc_sane_viewport( &brw->curr.vp, &svp );
69
70 ccv.min_depth = svp.near;
71 ccv.max_depth = svp.far;
72
73 brw->sws->bo_unreference(brw->cc.vp_bo);
74 brw->cc.vp_bo = brw_cache_data( &brw->cache, BRW_CC_VP, &ccv, NULL, 0 );
75 }
76
77 const struct brw_tracked_state brw_cc_vp = {
78 .dirty = {
79 .mesa = PIPE_NEW_VIEWPORT,
80 .brw = BRW_NEW_CONTEXT,
81 .cache = 0
82 },
83 .prepare = prepare_cc_vp
84 };
85
86 struct brw_cc_unit_key {
87 struct brw_cc0 cc0;
88 struct brw_cc1 cc1;
89 struct brw_cc2 cc2;
90 struct brw_cc3 cc3;
91 struct brw_cc5 cc5;
92 struct brw_cc6 cc6;
93 struct brw_cc7 cc7;
94 };
95
96 /* A long-winded way to OR two unsigned integers together:
97 */
98 static INLINE struct brw_cc3
99 combine_cc3( struct brw_cc3 a, struct brw_cc3 b )
100 {
101 union { struct brw_cc3 cc3; unsigned i; } ca, cb;
102 ca.cc3 = a;
103 cb.cc3 = b;
104 ca.i |= cb.i;
105 return ca.cc3;
106 }
107
108 static void
109 cc_unit_populate_key(const struct brw_context *brw,
110 struct brw_cc_unit_key *key)
111 {
112 key->cc0 = brw->curr.zstencil->cc0;
113 key->cc1 = brw->curr.zstencil->cc1;
114 key->cc2 = brw->curr.zstencil->cc2;
115 key->cc3 = combine_cc3( brw->curr.zstencil->cc3, brw->curr.blend->cc3 );
116 key->cc5 = brw->curr.blend->cc5;
117 key->cc6 = brw->curr.blend->cc6;
118 key->cc7 = brw->curr.blend->cc7;
119 }
120
121 /**
122 * Creates the state cache entry for the given CC unit key.
123 */
124 static struct brw_winsys_buffer *
125 cc_unit_create_from_key(struct brw_context *brw, struct brw_cc_unit_key *key)
126 {
127 struct brw_cc_unit_state cc;
128 struct brw_winsys_buffer *bo;
129
130 memset(&cc, 0, sizeof(cc));
131
132 cc.cc0 = key->cc0;
133 cc.cc1 = key->cc1;
134 cc.cc2 = key->cc2;
135 cc.cc3 = key->cc3;
136
137 /* CACHE_NEW_CC_VP */
138 cc.cc4.cc_viewport_state_offset = brw->cc.vp_bo->offset >> 5; /* reloc */
139
140 cc.cc5 = key->cc5;
141 cc.cc6 = key->cc6;
142 cc.cc7 = key->cc7;
143
144 bo = brw_upload_cache(&brw->cache, BRW_CC_UNIT,
145 key, sizeof(*key),
146 &brw->cc.vp_bo, 1,
147 &cc, sizeof(cc),
148 NULL, NULL);
149
150 /* Emit CC viewport relocation */
151 brw->sws->bo_emit_reloc(bo,
152 I915_GEM_DOMAIN_INSTRUCTION,
153 0,
154 0,
155 offsetof(struct brw_cc_unit_state, cc4),
156 brw->cc.vp_bo);
157
158 return bo;
159 }
160
161 static void prepare_cc_unit( struct brw_context *brw )
162 {
163 struct brw_cc_unit_key key;
164
165 cc_unit_populate_key(brw, &key);
166
167 brw->sws->bo_unreference(brw->cc.state_bo);
168 brw->cc.state_bo = brw_search_cache(&brw->cache, BRW_CC_UNIT,
169 &key, sizeof(key),
170 &brw->cc.vp_bo, 1,
171 NULL);
172
173 if (brw->cc.state_bo == NULL)
174 brw->cc.state_bo = cc_unit_create_from_key(brw, &key);
175 }
176
177 const struct brw_tracked_state brw_cc_unit = {
178 .dirty = {
179 .mesa = PIPE_NEW_DEPTH_STENCIL_ALPHA | PIPE_NEW_BLEND,
180 .brw = 0,
181 .cache = CACHE_NEW_CC_VP
182 },
183 .prepare = prepare_cc_unit,
184 };
185
186
187