src/gallium/drivers/i965/brw_cc.c

   1 /*
   2  Copyright (C) Intel Corp.  2006.  All Rights Reserved.
   3  Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
   4  develop this 3D driver.
   5
   6  Permission is hereby granted, free of charge, to any person obtaining
   7  a copy of this software and associated documentation files (the
   8  "Software"), to deal in the Software without restriction, including
   9  without limitation the rights to use, copy, modify, merge, publish,
  10  distribute, sublicense, and/or sell copies of the Software, and to
  11  permit persons to whom the Software is furnished to do so, subject to
  12  the following conditions:
  13
  14  The above copyright notice and this permission notice (including the
  15  next paragraph) shall be included in all copies or substantial
  16  portions of the Software.
  17
  18  THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  19  EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  20  MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
  21  IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
  22  LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
  23  OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
  24  WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25
  26  **********************************************************************/
  27  /*
  28   * Authors:
  29   *   Keith Whitwell <keith@tungstengraphics.com>
  30   */
  31
  32
  33 #include "brw_context.h"
  34 #include "brw_state.h"
  35 #include "brw_defines.h"
  36
  37
  38 struct sane_viewport {
  39    float top;
  40    float left;
  41    float width;
  42    float height;
  43    float near;
  44    float far;
  45 };
  46
  47 static void calc_sane_viewport( const struct pipe_viewport_state *vp,
  48                                 struct sane_viewport *svp )
  49 {
  50    /* XXX fix me, obviously.
  51     */
  52    svp->top = 0;
  53    svp->left = 0;
  54    svp->width = 250;
  55    svp->height = 250;
  56    svp->near = 0;
  57    svp->far = 1;
  58 }
  59
  60 static enum pipe_error prepare_cc_vp( struct brw_context *brw )
  61 {
  62    struct brw_cc_viewport ccv;
  63    struct sane_viewport svp;
  64    enum pipe_error ret;
  65
  66    memset(&ccv, 0, sizeof(ccv));
  67
  68    /* PIPE_NEW_VIEWPORT */
  69    calc_sane_viewport( &brw->curr.viewport, &svp );
  70
  71    ccv.min_depth = svp.near;
  72    ccv.max_depth = svp.far;
  73
  74    ret = brw_cache_data( &brw->cache, BRW_CC_VP, &ccv, NULL, 0,
  75                          &brw->cc.vp_bo );
  76    if (ret)
  77       return ret;
  78
  79    return PIPE_OK;
  80 }
  81
  82 const struct brw_tracked_state brw_cc_vp = {
  83    .dirty = {
  84       .mesa = PIPE_NEW_VIEWPORT,
  85       .brw = BRW_NEW_CONTEXT,
  86       .cache = 0
  87    },
  88    .prepare = prepare_cc_vp
  89 };
  90
  91 struct brw_cc_unit_key {
  92    struct brw_cc0 cc0;
  93    struct brw_cc1 cc1;
  94    struct brw_cc2 cc2;
  95    struct brw_cc3 cc3;
  96    struct brw_cc5 cc5;
  97    struct brw_cc6 cc6;
  98    struct brw_cc7 cc7;
  99 };
 100
 101 /* A long-winded way to OR two unsigned integers together:
 102  */
 103 static INLINE struct brw_cc3
 104 combine_cc3( struct brw_cc3 a, struct brw_cc3 b )
 105 {
 106    union { struct brw_cc3 cc3; unsigned i; } ca, cb;
 107    ca.cc3 = a;
 108    cb.cc3 = b;
 109    ca.i |= cb.i;
 110    return ca.cc3;
 111 }
 112
 113 static void
 114 cc_unit_populate_key(const struct brw_context *brw,
 115                      struct brw_cc_unit_key *key)
 116 {
 117    key->cc0 = brw->curr.zstencil->cc0;
 118    key->cc1 = brw->curr.zstencil->cc1;
 119    key->cc2 = brw->curr.zstencil->cc2;
 120    key->cc3 = combine_cc3( brw->curr.zstencil->cc3, brw->curr.blend->cc3 );
 121    key->cc5 = brw->curr.blend->cc5;
 122    key->cc6 = brw->curr.blend->cc6;
 123    key->cc7 = brw->curr.zstencil->cc7;
 124 }
 125
 126 /**
 127  * Creates the state cache entry for the given CC unit key.
 128  */
 129 static enum pipe_error
 130 cc_unit_create_from_key(struct brw_context *brw,
 131                         struct brw_cc_unit_key *key,
 132                         struct brw_winsys_reloc *reloc,
 133                         struct brw_winsys_buffer **bo_out)
 134 {
 135    struct brw_cc_unit_state cc;
 136    enum pipe_error ret;
 137
 138    memset(&cc, 0, sizeof(cc));
 139
 140    cc.cc0 = key->cc0;
 141    cc.cc1 = key->cc1;
 142    cc.cc2 = key->cc2;
 143    cc.cc3 = key->cc3;
 144
 145    cc.cc4.cc_viewport_state_offset = 0;
 146
 147    cc.cc5 = key->cc5;
 148    cc.cc6 = key->cc6;
 149    cc.cc7 = key->cc7;
 150
 151    ret = brw_upload_cache(&brw->cache, BRW_CC_UNIT,
 152                           key, sizeof(*key),
 153                           reloc, 1,
 154                           &cc, sizeof(cc),
 155                           NULL, NULL,
 156                           bo_out);
 157    if (ret)
 158       return ret;
 159
 160    return PIPE_OK;
 161 }
 162
 163 static int prepare_cc_unit( struct brw_context *brw )
 164 {
 165    struct brw_cc_unit_key key;
 166    struct brw_winsys_reloc reloc[1];
 167    enum pipe_error ret;
 168
 169    cc_unit_populate_key(brw, &key);
 170
 171    /* CACHE_NEW_CC_VP */
 172    make_reloc(&reloc[0],
 173               BRW_USAGE_STATE,
 174               0,
 175               offsetof(struct brw_cc_unit_state, cc4),
 176               brw->cc.vp_bo);
 177
 178    if (brw_search_cache(&brw->cache, BRW_CC_UNIT,
 179                         &key, sizeof(key),
 180                         reloc, 1,
 181                         NULL,
 182                         &brw->cc.state_bo))
 183       return PIPE_OK;
 184
 185    ret = cc_unit_create_from_key(brw, &key,
 186                                  reloc,
 187                                  &brw->cc.state_bo);
 188    if (ret)
 189       return ret;
 190
 191    return PIPE_OK;
 192 }
 193
 194 const struct brw_tracked_state brw_cc_unit = {
 195    .dirty = {
 196       .mesa = PIPE_NEW_DEPTH_STENCIL_ALPHA | PIPE_NEW_BLEND,
 197       .brw = 0,
 198       .cache = CACHE_NEW_CC_VP
 199    },
 200    .prepare = prepare_cc_unit,
 201 };
 202
 203
 204