src/gallium/drivers/i965/brw_cc.c

   1 /*
   2  Copyright (C) Intel Corp.  2006.  All Rights Reserved.
   3  Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
   4  develop this 3D driver.
   5
   6  Permission is hereby granted, free of charge, to any person obtaining
   7  a copy of this software and associated documentation files (the
   8  "Software"), to deal in the Software without restriction, including
   9  without limitation the rights to use, copy, modify, merge, publish,
  10  distribute, sublicense, and/or sell copies of the Software, and to
  11  permit persons to whom the Software is furnished to do so, subject to
  12  the following conditions:
  13
  14  The above copyright notice and this permission notice (including the
  15  next paragraph) shall be included in all copies or substantial
  16  portions of the Software.
  17
  18  THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  19  EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  20  MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
  21  IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
  22  LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
  23  OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
  24  WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25
  26  **********************************************************************/
  27  /*
  28   * Authors:
  29   *   Keith Whitwell <keith@tungstengraphics.com>
  30   */
  31
  32
  33 #include "brw_context.h"
  34 #include "brw_state.h"
  35 #include "brw_defines.h"
  36
  37
  38 static enum pipe_error prepare_cc_vp( struct brw_context *brw )
  39 {
  40    return brw_cache_data( &brw->cache,
  41                          BRW_CC_VP,
  42                          &brw->curr.ccv,
  43                          NULL, 0,
  44                          &brw->cc.reloc[CC_RELOC_VP].bo );
  45 }
  46
  47 const struct brw_tracked_state brw_cc_vp = {
  48    .dirty = {
  49       .mesa = PIPE_NEW_VIEWPORT,
  50       .brw = BRW_NEW_CONTEXT,
  51       .cache = 0
  52    },
  53    .prepare = prepare_cc_vp
  54 };
  55
  56
  57 /* A long-winded way to OR two unsigned integers together:
  58  */
  59 static INLINE struct brw_cc3
  60 combine_cc3( struct brw_cc3 a, struct brw_cc3 b )
  61 {
  62    union { struct brw_cc3 cc3; unsigned i; } ca, cb;
  63    ca.cc3 = a;
  64    cb.cc3 = b;
  65    ca.i |= cb.i;
  66    return ca.cc3;
  67 }
  68
  69
  70 static int prepare_cc_unit( struct brw_context *brw )
  71 {
  72    brw->cc.cc.cc0 = brw->curr.zstencil->cc0;
  73    brw->cc.cc.cc1 = brw->curr.zstencil->cc1;
  74    brw->cc.cc.cc2 = brw->curr.zstencil->cc2;
  75    brw->cc.cc.cc3 = combine_cc3( brw->curr.zstencil->cc3, brw->curr.blend->cc3 );
  76
  77    brw->cc.cc.cc5 = brw->curr.blend->cc5;
  78    brw->cc.cc.cc6 = brw->curr.blend->cc6;
  79    brw->cc.cc.cc7 = brw->curr.zstencil->cc7;
  80
  81    return brw_cache_data_sz(&brw->cache, BRW_CC_UNIT,
  82                            &brw->cc.cc, sizeof(brw->cc.cc),
  83                            brw->cc.reloc, 1,
  84                            &brw->cc.state_bo);
  85 }
  86
  87 const struct brw_tracked_state brw_cc_unit = {
  88    .dirty = {
  89       .mesa = PIPE_NEW_DEPTH_STENCIL_ALPHA | PIPE_NEW_BLEND,
  90       .brw = 0,
  91       .cache = CACHE_NEW_CC_VP
  92    },
  93    .prepare = prepare_cc_unit,
  94 };
  95
  96
  97 void brw_hw_cc_init( struct brw_context *brw )
  98 {
  99    make_reloc(&brw->cc.reloc[0],
 100               BRW_USAGE_STATE,
 101               0,
 102               offsetof(struct brw_cc_unit_state, cc4),
 103               NULL);
 104 }
 105
 106
 107 void brw_hw_cc_cleanup( struct brw_context *brw )
 108 {
 109    bo_reference(&brw->cc.state_bo, NULL);
 110    bo_reference(&brw->cc.reloc[0].bo, NULL);
 111 }