src/gallium/drivers/i965/brw_clip.c

   1 /*
   2  Copyright (C) Intel Corp.  2006.  All Rights Reserved.
   3  Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
   4  develop this 3D driver.
   5
   6  Permission is hereby granted, free of charge, to any person obtaining
   7  a copy of this software and associated documentation files (the
   8  "Software"), to deal in the Software without restriction, including
   9  without limitation the rights to use, copy, modify, merge, publish,
  10  distribute, sublicense, and/or sell copies of the Software, and to
  11  permit persons to whom the Software is furnished to do so, subject to
  12  the following conditions:
  13
  14  The above copyright notice and this permission notice (including the
  15  next paragraph) shall be included in all copies or substantial
  16  portions of the Software.
  17
  18  THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  19  EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  20  MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
  21  IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
  22  LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
  23  OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
  24  WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25
  26  **********************************************************************/
  27  /*
  28   * Authors:
  29   *   Keith Whitwell <keith@tungstengraphics.com>
  30   */
  31
  32 #include "pipe/p_state.h"
  33
  34 #include "util/u_math.h"
  35
  36 #include "brw_screen.h"
  37 #include "brw_batchbuffer.h"
  38 #include "brw_defines.h"
  39 #include "brw_context.h"
  40 #include "brw_eu.h"
  41 #include "brw_util.h"
  42 #include "brw_state.h"
  43 #include "brw_pipe_rast.h"
  44 #include "brw_clip.h"
  45
  46
  47 #define FRONT_UNFILLED_BIT  0x1
  48 #define BACK_UNFILLED_BIT   0x2
  49
  50
  51 static enum pipe_error
  52 compile_clip_prog( struct brw_context *brw,
  53                    struct brw_clip_prog_key *key,
  54                    struct brw_winsys_buffer **bo_out )
  55 {
  56    enum pipe_error ret;
  57    struct brw_clip_compile c;
  58    const GLuint *program;
  59    GLuint program_size;
  60    GLuint delta;
  61    GLuint i;
  62
  63    memset(&c, 0, sizeof(c));
  64
  65    /* Begin the compilation:
  66     */
  67    brw_init_compile(brw, &c.func);
  68
  69    c.func.single_program_flow = 1;
  70
  71    c.chipset = brw->chipset;
  72    c.key = *key;
  73    c.need_ff_sync = c.chipset.is_igdng;
  74
  75    /* Need to locate the two positions present in vertex + header.
  76     * These are currently hardcoded:
  77     */
  78    c.header_position_offset = ATTR_SIZE;
  79
  80    if (c.chipset.is_igdng)
  81        delta = 3 * REG_SIZE;
  82    else
  83        delta = REG_SIZE;
  84
  85    /* XXX: c.offset is now pretty redundant:
  86     */
  87    for (i = 0; i < c.key.nr_attrs; i++) {
  88       c.offset[i] = delta;
  89       delta += ATTR_SIZE;
  90    }
  91
  92    /* XXX: c.nr_attrs is very redundant:
  93     */
  94    c.nr_attrs = c.key.nr_attrs;
  95
  96    if (BRW_IS_IGDNG(brw))
  97        c.nr_regs = (c.nr_attrs + 1) / 2 + 3;  /* are vertices packed, or reg-aligned? */
  98    else
  99        c.nr_regs = (c.nr_attrs + 1) / 2 + 1;  /* are vertices packed, or reg-aligned? */
 100
 101    c.nr_bytes = c.nr_regs * REG_SIZE;
 102
 103    c.prog_data.clip_mode = c.key.clip_mode; /* XXX */
 104
 105    /* For some reason the thread is spawned with only 4 channels
 106     * unmasked.
 107     */
 108    brw_set_mask_control(&c.func, BRW_MASK_DISABLE);
 109
 110
 111    /* Would ideally have the option of producing a program which could
 112     * do all three:
 113     */
 114    switch (key->primitive) {
 115    case PIPE_PRIM_TRIANGLES:
 116       if (key->do_unfilled)
 117          brw_emit_unfilled_clip( &c );
 118       else
 119          brw_emit_tri_clip( &c );
 120       break;
 121    case PIPE_PRIM_LINES:
 122       brw_emit_line_clip( &c );
 123       break;
 124    case PIPE_PRIM_POINTS:
 125       brw_emit_point_clip( &c );
 126       break;
 127    default:
 128       assert(0);
 129       return PIPE_ERROR_BAD_INPUT;
 130    }
 131
 132
 133
 134    /* get the program
 135     */
 136    ret = brw_get_program(&c.func, &program, &program_size);
 137    if (ret)
 138       return ret;
 139
 140    /* Upload
 141     */
 142    ret = brw_upload_cache( &brw->cache,
 143                            BRW_CLIP_PROG,
 144                            &c.key, sizeof(c.key),
 145                            NULL, 0,
 146                            program, program_size,
 147                            &c.prog_data,
 148                            &brw->clip.prog_data,
 149                            bo_out );
 150    if (ret)
 151       return ret;
 152
 153    return PIPE_OK;
 154 }
 155
 156 /* Calculate interpolants for triangle and line rasterization.
 157  */
 158 static enum pipe_error
 159 upload_clip_prog(struct brw_context *brw)
 160 {
 161    enum pipe_error ret;
 162    struct brw_clip_prog_key key;
 163
 164    /* Populate the key, starting from the almost-complete version from
 165     * the rast state.
 166     */
 167
 168    /* PIPE_NEW_RAST */
 169    memcpy(&key, &brw->curr.rast->clip_key, sizeof key);
 170
 171    /* BRW_NEW_REDUCED_PRIMITIVE */
 172    key.primitive = brw->reduced_primitive;
 173
 174    /* PIPE_NEW_VS */
 175    key.nr_attrs = brw->curr.vertex_shader->info.file_max[TGSI_FILE_OUTPUT] + 1;
 176
 177    /* PIPE_NEW_CLIP */
 178    key.nr_userclip = brw->curr.ucp.nr;
 179
 180    /* Already cached?
 181     */
 182    if (brw_search_cache(&brw->cache, BRW_CLIP_PROG,
 183                         &key, sizeof(key),
 184                         NULL, 0,
 185                         &brw->clip.prog_data,
 186                         &brw->clip.prog_bo))
 187       return PIPE_OK;
 188
 189    /* Compile new program:
 190     */
 191    ret = compile_clip_prog( brw, &key, &brw->clip.prog_bo );
 192    if (ret)
 193       return ret;
 194
 195    return PIPE_OK;
 196 }
 197
 198
 199 const struct brw_tracked_state brw_clip_prog = {
 200    .dirty = {
 201       .mesa  = (PIPE_NEW_RAST |
 202                 PIPE_NEW_CLIP),
 203       .brw   = (BRW_NEW_REDUCED_PRIMITIVE),
 204       .cache = CACHE_NEW_VS_PROG
 205    },
 206    .prepare = upload_clip_prog
 207 };