src/gallium/drivers/i965/brw_clip.c

   1 /*
   2  Copyright (C) Intel Corp.  2006.  All Rights Reserved.
   3  Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
   4  develop this 3D driver.
   5
   6  Permission is hereby granted, free of charge, to any person obtaining
   7  a copy of this software and associated documentation files (the
   8  "Software"), to deal in the Software without restriction, including
   9  without limitation the rights to use, copy, modify, merge, publish,
  10  distribute, sublicense, and/or sell copies of the Software, and to
  11  permit persons to whom the Software is furnished to do so, subject to
  12  the following conditions:
  13
  14  The above copyright notice and this permission notice (including the
  15  next paragraph) shall be included in all copies or substantial
  16  portions of the Software.
  17
  18  THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  19  EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  20  MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
  21  IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
  22  LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
  23  OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
  24  WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25
  26  **********************************************************************/
  27  /*
  28   * Authors:
  29   *   Keith Whitwell <keith@tungstengraphics.com>
  30   */
  31
  32 #include "pipe/p_state.h"
  33
  34 #include "util/u_math.h"
  35
  36 #include "brw_screen.h"
  37 #include "brw_batchbuffer.h"
  38 #include "brw_defines.h"
  39 #include "brw_context.h"
  40 #include "brw_eu.h"
  41 #include "brw_util.h"
  42 #include "brw_state.h"
  43 #include "brw_pipe_rast.h"
  44 #include "brw_clip.h"
  45
  46
  47 #define FRONT_UNFILLED_BIT  0x1
  48 #define BACK_UNFILLED_BIT   0x2
  49
  50
  51 static void compile_clip_prog( struct brw_context *brw,
  52                              struct brw_clip_prog_key *key )
  53 {
  54    struct brw_clip_compile c;
  55    const GLuint *program;
  56    GLuint program_size;
  57    GLuint delta;
  58    GLuint i;
  59
  60    memset(&c, 0, sizeof(c));
  61
  62    /* Begin the compilation:
  63     */
  64    brw_init_compile(brw, &c.func);
  65
  66    c.func.single_program_flow = 1;
  67
  68    c.chipset = brw->chipset;
  69    c.key = *key;
  70    c.need_ff_sync = c.chipset.is_igdng;
  71
  72    /* Need to locate the two positions present in vertex + header.
  73     * These are currently hardcoded:
  74     */
  75    c.header_position_offset = ATTR_SIZE;
  76
  77    if (c.chipset.is_igdng)
  78        delta = 3 * REG_SIZE;
  79    else
  80        delta = REG_SIZE;
  81
  82    /* XXX: c.offset is now pretty redundant:
  83     */
  84    for (i = 0; i < c.key.nr_attrs; i++) {
  85       c.offset[i] = delta;
  86       delta += ATTR_SIZE;
  87    }
  88
  89    /* XXX: c.nr_attrs is very redundant:
  90     */
  91    c.nr_attrs = c.key.nr_attrs;
  92
  93    if (BRW_IS_IGDNG(brw))
  94        c.nr_regs = (c.nr_attrs + 1) / 2 + 3;  /* are vertices packed, or reg-aligned? */
  95    else
  96        c.nr_regs = (c.nr_attrs + 1) / 2 + 1;  /* are vertices packed, or reg-aligned? */
  97
  98    c.nr_bytes = c.nr_regs * REG_SIZE;
  99
 100    c.prog_data.clip_mode = c.key.clip_mode; /* XXX */
 101
 102    /* For some reason the thread is spawned with only 4 channels
 103     * unmasked.
 104     */
 105    brw_set_mask_control(&c.func, BRW_MASK_DISABLE);
 106
 107
 108    /* Would ideally have the option of producing a program which could
 109     * do all three:
 110     */
 111    switch (key->primitive) {
 112    case PIPE_PRIM_TRIANGLES:
 113       if (key->do_unfilled)
 114          brw_emit_unfilled_clip( &c );
 115       else
 116          brw_emit_tri_clip( &c );
 117       break;
 118    case PIPE_PRIM_LINES:
 119       brw_emit_line_clip( &c );
 120       break;
 121    case PIPE_PRIM_POINTS:
 122       brw_emit_point_clip( &c );
 123       break;
 124    default:
 125       assert(0);
 126       return;
 127    }
 128
 129
 130
 131    /* get the program
 132     */
 133    program = brw_get_program(&c.func, &program_size);
 134
 135    /* Upload
 136     */
 137    brw->sws->bo_unreference(brw->clip.prog_bo);
 138    brw->clip.prog_bo = brw_upload_cache( &brw->cache,
 139                                          BRW_CLIP_PROG,
 140                                          &c.key, sizeof(c.key),
 141                                          NULL, 0,
 142                                          program, program_size,
 143                                          &c.prog_data,
 144                                          &brw->clip.prog_data );
 145 }
 146
 147 /* Calculate interpolants for triangle and line rasterization.
 148  */
 149 static void upload_clip_prog(struct brw_context *brw)
 150 {
 151    struct brw_clip_prog_key key;
 152
 153    /* Populate the key, starting from the almost-complete version from
 154     * the rast state.
 155     */
 156
 157    /* PIPE_NEW_RAST */
 158    memcpy(&key, &brw->curr.rast->clip_key, sizeof key);
 159
 160    /* BRW_NEW_REDUCED_PRIMITIVE */
 161    key.primitive = brw->reduced_primitive;
 162
 163    /* PIPE_NEW_VS */
 164    key.nr_attrs = brw->curr.vertex_shader->info.file_max[TGSI_FILE_OUTPUT] + 1;
 165
 166    /* PIPE_NEW_CLIP */
 167    key.nr_userclip = brw->curr.ucp.nr;
 168
 169    brw->sws->bo_unreference(brw->clip.prog_bo);
 170    brw->clip.prog_bo = brw_search_cache(&brw->cache, BRW_CLIP_PROG,
 171                                         &key, sizeof(key),
 172                                         NULL, 0,
 173                                         &brw->clip.prog_data);
 174    if (brw->clip.prog_bo == NULL)
 175       compile_clip_prog( brw, &key );
 176 }
 177
 178
 179 const struct brw_tracked_state brw_clip_prog = {
 180    .dirty = {
 181       .mesa  = (PIPE_NEW_RAST |
 182                 PIPE_NEW_CLIP),
 183       .brw   = (BRW_NEW_REDUCED_PRIMITIVE),
 184       .cache = CACHE_NEW_VS_PROG
 185    },
 186    .prepare = upload_clip_prog
 187 };