096c8cf12b2b893f9880361df5c3c09eed65cece
[mesa.git] / src / gallium / drivers / i965 / brw_context.h
1 /*
2 Copyright (C) Intel Corp. 2006. All Rights Reserved.
3 Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
4 develop this 3D driver.
5
6 Permission is hereby granted, free of charge, to any person obtaining
7 a copy of this software and associated documentation files (the
8 "Software"), to deal in the Software without restriction, including
9 without limitation the rights to use, copy, modify, merge, publish,
10 distribute, sublicense, and/or sell copies of the Software, and to
11 permit persons to whom the Software is furnished to do so, subject to
12 the following conditions:
13
14 The above copyright notice and this permission notice (including the
15 next paragraph) shall be included in all copies or substantial
16 portions of the Software.
17
18 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
19 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
21 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
22 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
23 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
24 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25
26 **********************************************************************/
27 /*
28 * Authors:
29 * Keith Whitwell <keith@tungstengraphics.com>
30 */
31
32
33 #ifndef BRWCONTEXT_INC
34 #define BRWCONTEXT_INC
35
36 #include "brw_structs.h"
37 #include "brw_winsys.h"
38 #include "brw_reg.h"
39 #include "pipe/p_state.h"
40 #include "pipe/p_context.h"
41 #include "tgsi/tgsi_scan.h"
42
43
44 /* Glossary:
45 *
46 * URB - uniform resource buffer. A mid-sized buffer which is
47 * partitioned between the fixed function units and used for passing
48 * values (vertices, primitives, constants) between them.
49 *
50 * CURBE - constant URB entry. An urb region (entry) used to hold
51 * constant values which the fixed function units can be instructed to
52 * preload into the GRF when spawning a thread.
53 *
54 * VUE - vertex URB entry. An urb entry holding a vertex and usually
55 * a vertex header. The header contains control information and
56 * things like primitive type, Begin/end flags and clip codes.
57 *
58 * PUE - primitive URB entry. An urb entry produced by the setup (SF)
59 * unit holding rasterization and interpolation parameters.
60 *
61 * GRF - general register file. One of several register files
62 * addressable by programmed threads. The inputs (r0, payload, curbe,
63 * urb) of the thread are preloaded to this area before the thread is
64 * spawned. The registers are individually 8 dwords wide and suitable
65 * for general usage. Registers holding thread input values are not
66 * special and may be overwritten.
67 *
68 * MRF - message register file. Threads communicate (and terminate)
69 * by sending messages. Message parameters are placed in contiguous
70 * MRF registers. All program output is via these messages. URB
71 * entries are populated by sending a message to the shared URB
72 * function containing the new data, together with a control word,
73 * often an unmodified copy of R0.
74 *
75 * R0 - GRF register 0. Typically holds control information used when
76 * sending messages to other threads.
77 *
78 * EU or GEN4 EU: The name of the programmable subsystem of the
79 * i965 hardware. Threads are executed by the EU, the registers
80 * described above are part of the EU architecture.
81 *
82 * Fixed function units:
83 *
84 * CS - Command streamer. Notional first unit, little software
85 * interaction. Holds the URB entries used for constant data, ie the
86 * CURBEs.
87 *
88 * VF/VS - Vertex Fetch / Vertex Shader. The fixed function part of
89 * this unit is responsible for pulling vertices out of vertex buffers
90 * in vram and injecting them into the processing pipe as VUEs. If
91 * enabled, it first passes them to a VS thread which is a good place
92 * for the driver to implement any active vertex shader.
93 *
94 * GS - Geometry Shader. This corresponds to a new DX10 concept. If
95 * enabled, incoming strips etc are passed to GS threads in individual
96 * line/triangle/point units. The GS thread may perform arbitary
97 * computation and emit whatever primtives with whatever vertices it
98 * chooses. This makes GS an excellent place to implement GL's
99 * unfilled polygon modes, though of course it is capable of much
100 * more. Additionally, GS is used to translate away primitives not
101 * handled by latter units, including Quads and Lineloops.
102 *
103 * CS - Clipper. Mesa's clipping algorithms are imported to run on
104 * this unit. The fixed function part performs cliptesting against
105 * the 6 fixed clipplanes and makes decisions on whether or not the
106 * incoming primitive needs to be passed to a thread for clipping.
107 * User clip planes are handled via cooperation with the VS thread.
108 *
109 * SF - Strips Fans or Setup: Triangles are prepared for
110 * rasterization. Interpolation coefficients are calculated.
111 * Flatshading and two-side lighting usually performed here.
112 *
113 * WM - Windower. Interpolation of vertex attributes performed here.
114 * Fragment shader implemented here. SIMD aspects of EU taken full
115 * advantage of, as pixels are processed in blocks of 16.
116 *
117 * CC - Color Calculator. No EU threads associated with this unit.
118 * Handles blending and (presumably) depth and stencil testing.
119 */
120
121 #define BRW_MAX_CURBE (32*16)
122
123 struct brw_context;
124
125 struct brw_depth_stencil_state {
126 /* Precalculated hardware state:
127 */
128 struct brw_cc0 cc0;
129 struct brw_cc1 cc1;
130 struct brw_cc2 cc2;
131 struct brw_cc3 cc3;
132 struct brw_cc7 cc7;
133
134 unsigned iz_lookup;
135 };
136
137
138 struct brw_blend_state {
139 /* Precalculated hardware state:
140 */
141 struct brw_cc2 cc2;
142 struct brw_cc3 cc3;
143 struct brw_cc5 cc5;
144 struct brw_cc6 cc6;
145
146 struct brw_surf_ss0 ss0;
147 };
148
149
150 struct brw_rasterizer_state;
151
152 struct brw_immediate_data {
153 unsigned nr;
154 float (*data)[4];
155 };
156
157 struct brw_vertex_shader {
158 const struct tgsi_token *tokens;
159 struct brw_winsys_buffer *const_buffer; /** Program constant buffer/surface */
160
161 struct tgsi_shader_info info;
162 struct brw_immediate_data immediates;
163
164 GLuint has_flow_control:1;
165 GLuint use_const_buffer:1;
166
167 /* Offsets of special vertex shader outputs required for clipping.
168 */
169 GLuint output_hpos:6; /* not always zero? */
170 GLuint output_color0:6;
171 GLuint output_color1:6;
172 GLuint output_bfc0:6;
173 GLuint output_bfc1:6;
174 GLuint output_edgeflag:6;
175
176 unsigned id;
177 };
178
179 struct brw_fs_signature {
180 GLuint nr_inputs;
181 struct {
182 GLuint interp:3; /* TGSI_INTERPOLATE_x */
183 GLuint semantic:5; /* TGSI_SEMANTIC_x */
184 GLuint semantic_index:24;
185 } input[PIPE_MAX_SHADER_INPUTS];
186 };
187
188 #define brw_fs_signature_size(s) (offsetof(struct brw_fs_signature, input) + \
189 ((s)->nr_inputs * sizeof (s)->input[0]))
190
191
192 struct brw_fragment_shader {
193 const struct tgsi_token *tokens;
194 struct tgsi_shader_info info;
195
196 struct brw_fs_signature signature;
197 struct brw_immediate_data immediates;
198
199 unsigned iz_lookup;
200 //unsigned wm_lookup;
201
202 unsigned uses_depth:1;
203 unsigned has_flow_control:1;
204
205 unsigned id;
206 struct brw_winsys_buffer *const_buffer; /** Program constant buffer/surface */
207 GLboolean use_const_buffer;
208 };
209
210
211 struct brw_sampler {
212 float border_color[4];
213 struct brw_ss0 ss0;
214 struct brw_ss1 ss1;
215 struct brw_ss3 ss3;
216 };
217
218
219
220 #define PIPE_NEW_DEPTH_STENCIL_ALPHA 0x1
221 #define PIPE_NEW_RAST 0x2
222 #define PIPE_NEW_BLEND 0x4
223 #define PIPE_NEW_VIEWPORT 0x8
224 #define PIPE_NEW_SAMPLERS 0x10
225 #define PIPE_NEW_VERTEX_BUFFER 0x20
226 #define PIPE_NEW_VERTEX_ELEMENT 0x40
227 #define PIPE_NEW_FRAGMENT_SHADER 0x80
228 #define PIPE_NEW_VERTEX_SHADER 0x100
229 #define PIPE_NEW_FRAGMENT_CONSTANTS 0x200
230 #define PIPE_NEW_VERTEX_CONSTANTS 0x400
231 #define PIPE_NEW_CLIP 0x800
232 #define PIPE_NEW_INDEX_BUFFER 0x1000
233 #define PIPE_NEW_INDEX_RANGE 0x2000
234 #define PIPE_NEW_BLEND_COLOR 0x4000
235 #define PIPE_NEW_POLYGON_STIPPLE 0x8000
236 #define PIPE_NEW_FRAMEBUFFER_DIMENSIONS 0x10000
237 #define PIPE_NEW_DEPTH_BUFFER 0x20000
238 #define PIPE_NEW_COLOR_BUFFERS 0x40000
239 #define PIPE_NEW_QUERY 0x80000
240 #define PIPE_NEW_SCISSOR 0x100000
241 #define PIPE_NEW_BOUND_TEXTURES 0x200000
242 #define PIPE_NEW_NR_CBUFS 0x400000
243 #define PIPE_NEW_FRAGMENT_SIGNATURE 0x800000
244
245
246
247 #define BRW_NEW_URB_FENCE 0x1
248 #define BRW_NEW_FRAGMENT_PROGRAM 0x2
249 #define BRW_NEW_VERTEX_PROGRAM 0x4
250 #define BRW_NEW_INPUT_DIMENSIONS 0x8
251 #define BRW_NEW_CURBE_OFFSETS 0x10
252 #define BRW_NEW_REDUCED_PRIMITIVE 0x20
253 #define BRW_NEW_PRIMITIVE 0x40
254 #define BRW_NEW_CONTEXT 0x80
255 #define BRW_NEW_WM_INPUT_DIMENSIONS 0x100
256 #define BRW_NEW_PSP 0x800
257 #define BRW_NEW_WM_SURFACES 0x1000
258 #define BRW_NEW_xxx 0x2000 /* was FENCE */
259 #define BRW_NEW_INDICES 0x4000
260 #define BRW_NEW_VERTICES 0x8000
261 /**
262 * Used for any batch entry with a relocated pointer that will be used
263 * by any 3D rendering. Need to re-emit these fresh in each
264 * batchbuffer as the referenced buffers may be relocated in the
265 * meantime.
266 */
267 #define BRW_NEW_BATCH 0x10000
268 #define BRW_NEW_NR_WM_SURFACES 0x40000
269 #define BRW_NEW_NR_VS_SURFACES 0x80000
270 #define BRW_NEW_INDEX_BUFFER 0x100000
271
272 struct brw_state_flags {
273 /** State update flags signalled by mesa internals */
274 GLuint mesa;
275 /**
276 * State update flags signalled as the result of brw_tracked_state updates
277 */
278 GLuint brw;
279 /** State update flags signalled by brw_state_cache.c searches */
280 GLuint cache;
281 };
282
283
284
285 /* Data about a particular attempt to compile a program. Note that
286 * there can be many of these, each in a different GL state
287 * corresponding to a different brw_wm_prog_key struct, with different
288 * compiled programs:
289 */
290 struct brw_wm_prog_data {
291 GLuint curb_read_length;
292 GLuint urb_read_length;
293
294 GLuint first_curbe_grf;
295 GLuint total_grf;
296 GLuint total_scratch;
297
298 GLuint nr_params; /**< number of float params/constants */
299 GLboolean error;
300
301 /* Pointer to tracked values (only valid once
302 * _mesa_load_state_parameters has been called at runtime).
303 */
304 const GLfloat *param[BRW_MAX_CURBE];
305 };
306
307 struct brw_sf_prog_data {
308 GLuint urb_read_length;
309 GLuint total_grf;
310
311 /* Each vertex may have upto 12 attributes, 4 components each,
312 * except WPOS which requires only 2. (11*4 + 2) == 44 ==> 11
313 * rows.
314 *
315 * Actually we use 4 for each, so call it 12 rows.
316 */
317 GLuint urb_entry_size;
318 };
319
320
321 struct brw_clip_prog_data;
322
323 struct brw_gs_prog_data {
324 GLuint urb_read_length;
325 GLuint total_grf;
326 };
327
328 struct brw_vs_prog_data {
329 GLuint curb_read_length;
330 GLuint urb_read_length;
331 GLuint total_grf;
332
333 GLuint nr_outputs;
334 GLuint nr_inputs;
335
336 GLuint nr_params; /**< number of TGSI_FILE_CONSTANT's */
337
338 GLuint output_edgeflag;
339
340 GLboolean writes_psiz;
341
342 /* Used for calculating urb partitions:
343 */
344 GLuint urb_entry_size;
345 };
346
347
348 /* Size == 0 if output either not written, or always [0,0,0,1]
349 */
350 struct brw_vs_ouput_sizes {
351 GLubyte output_size[PIPE_MAX_SHADER_OUTPUTS];
352 };
353
354
355 /** Number of texture sampler units */
356 #define BRW_MAX_TEX_UNIT 16
357
358 /**
359 * Size of our surface binding table for the WM.
360 * This contains pointers to the drawing surfaces and current texture
361 * objects and shader constant buffers (+2).
362 */
363 #define BRW_WM_MAX_SURF (PIPE_MAX_COLOR_BUFS + BRW_MAX_TEX_UNIT + 1)
364
365 /**
366 * Helpers to convert drawing buffers, textures and constant buffers
367 * to surface binding table indexes, for WM.
368 */
369 #define SURF_INDEX_DRAW(d) (d)
370 #define SURF_INDEX_FRAG_CONST_BUFFER (PIPE_MAX_COLOR_BUFS)
371 #define SURF_INDEX_TEXTURE(t) (PIPE_MAX_COLOR_BUFS + 1 + (t))
372
373 /**
374 * Size of surface binding table for the VS.
375 * Only one constant buffer for now.
376 */
377 #define BRW_VS_MAX_SURF 1
378
379 /**
380 * Only a VS constant buffer
381 */
382 #define SURF_INDEX_VERT_CONST_BUFFER 0
383
384
385 /* Bit of a hack to align these with the winsys buffer_data_type enum.
386 */
387 enum brw_cache_id {
388 BRW_CC_VP = BRW_DATA_GS_CC_VP,
389 BRW_CC_UNIT = BRW_DATA_GS_CC_UNIT,
390 BRW_WM_PROG = BRW_DATA_GS_WM_PROG,
391 BRW_SAMPLER_DEFAULT_COLOR = BRW_DATA_GS_SAMPLER_DEFAULT_COLOR,
392 BRW_SAMPLER = BRW_DATA_GS_SAMPLER,
393 BRW_WM_UNIT = BRW_DATA_GS_WM_UNIT,
394 BRW_SF_PROG = BRW_DATA_GS_SF_PROG,
395 BRW_SF_VP = BRW_DATA_GS_SF_VP,
396 BRW_SF_UNIT = BRW_DATA_GS_SF_UNIT,
397 BRW_VS_UNIT = BRW_DATA_GS_VS_UNIT,
398 BRW_VS_PROG = BRW_DATA_GS_VS_PROG,
399 BRW_GS_UNIT = BRW_DATA_GS_GS_UNIT,
400 BRW_GS_PROG = BRW_DATA_GS_GS_PROG,
401 BRW_CLIP_VP = BRW_DATA_GS_CLIP_VP,
402 BRW_CLIP_UNIT = BRW_DATA_GS_CLIP_UNIT,
403 BRW_CLIP_PROG = BRW_DATA_GS_CLIP_PROG,
404 BRW_SS_SURFACE = BRW_DATA_SS_SURFACE,
405 BRW_SS_SURF_BIND = BRW_DATA_SS_SURF_BIND,
406
407 BRW_MAX_CACHE
408 };
409
410 struct brw_cache_item {
411 /**
412 * Effectively part of the key, cache_id identifies what kind of state
413 * buffer is involved, and also which brw->state.dirty.cache flag should
414 * be set when this cache item is chosen.
415 */
416 enum brw_cache_id cache_id;
417 /** 32-bit hash of the key data */
418 GLuint hash;
419 GLuint key_size; /* for variable-sized keys */
420 const void *key;
421 struct brw_winsys_reloc *relocs;
422 GLuint nr_relocs;
423
424 struct brw_winsys_buffer *bo;
425 GLuint data_size;
426
427 struct brw_cache_item *next;
428 };
429
430
431
432 struct brw_cache {
433 struct brw_context *brw;
434 struct brw_winsys_screen *sws;
435
436 struct brw_cache_item **items;
437 GLuint size, n_items;
438
439 enum brw_buffer_type buffer_type;
440
441 GLuint key_size[BRW_MAX_CACHE]; /* for fixed-size keys */
442 GLuint aux_size[BRW_MAX_CACHE];
443 char *name[BRW_MAX_CACHE];
444
445
446 /* Record of the last BOs chosen for each cache_id. Used to set
447 * brw->state.dirty.cache when a new cache item is chosen.
448 */
449 struct brw_winsys_buffer *last_bo[BRW_MAX_CACHE];
450 };
451
452
453 struct brw_tracked_state {
454 struct brw_state_flags dirty;
455 int (*prepare)( struct brw_context *brw );
456 int (*emit)( struct brw_context *brw );
457 };
458
459 /* Flags for brw->state.cache.
460 */
461 #define CACHE_NEW_CC_VP (1<<BRW_CC_VP)
462 #define CACHE_NEW_CC_UNIT (1<<BRW_CC_UNIT)
463 #define CACHE_NEW_WM_PROG (1<<BRW_WM_PROG)
464 #define CACHE_NEW_SAMPLER_DEFAULT_COLOR (1<<BRW_SAMPLER_DEFAULT_COLOR)
465 #define CACHE_NEW_SAMPLER (1<<BRW_SAMPLER)
466 #define CACHE_NEW_WM_UNIT (1<<BRW_WM_UNIT)
467 #define CACHE_NEW_SF_PROG (1<<BRW_SF_PROG)
468 #define CACHE_NEW_SF_VP (1<<BRW_SF_VP)
469 #define CACHE_NEW_SF_UNIT (1<<BRW_SF_UNIT)
470 #define CACHE_NEW_VS_UNIT (1<<BRW_VS_UNIT)
471 #define CACHE_NEW_VS_PROG (1<<BRW_VS_PROG)
472 #define CACHE_NEW_GS_UNIT (1<<BRW_GS_UNIT)
473 #define CACHE_NEW_GS_PROG (1<<BRW_GS_PROG)
474 #define CACHE_NEW_CLIP_VP (1<<BRW_CLIP_VP)
475 #define CACHE_NEW_CLIP_UNIT (1<<BRW_CLIP_UNIT)
476 #define CACHE_NEW_CLIP_PROG (1<<BRW_CLIP_PROG)
477 #define CACHE_NEW_SURFACE (1<<BRW_SS_SURFACE)
478 #define CACHE_NEW_SURF_BIND (1<<BRW_SS_SURF_BIND)
479
480 struct brw_cached_batch_item {
481 struct header *header;
482 GLuint sz;
483 struct brw_cached_batch_item *next;
484 };
485
486
487
488 /* Protect against a future where VERT_ATTRIB_MAX > 32. Wouldn't life
489 * be easier if C allowed arrays of packed elements?
490 */
491 #define VS_INPUT_BITMASK_DWORDS ((PIPE_MAX_SHADER_INPUTS+31)/32)
492
493
494
495
496 struct brw_vertex_info {
497 GLuint sizes[VS_INPUT_BITMASK_DWORDS * 2]; /* sizes:2[VERT_ATTRIB_MAX] */
498 };
499
500
501 struct brw_query_object {
502 /** Doubly linked list of active query objects in the context. */
503 struct brw_query_object *prev, *next;
504
505 /** Last query BO associated with this query. */
506 struct brw_winsys_buffer *bo;
507 /** First index in bo with query data for this object. */
508 int first_index;
509 /** Last index in bo with query data for this object. */
510 int last_index;
511
512 /* Total count of pixels from previous BOs */
513 uint64_t result;
514 };
515
516 #define CC_RELOC_VP 0
517
518
519 /**
520 * brw_context is derived from pipe_context
521 */
522 struct brw_context
523 {
524 struct pipe_context base;
525 struct brw_chipset chipset;
526
527 struct brw_winsys_screen *sws;
528
529 struct brw_batchbuffer *batch;
530
531 GLuint primitive;
532 GLuint reduced_primitive;
533
534 /* Active state from the state tracker:
535 */
536 struct {
537 struct brw_vertex_shader *vertex_shader;
538 struct brw_fragment_shader *fragment_shader;
539 const struct brw_blend_state *blend;
540 const struct brw_rasterizer_state *rast;
541 const struct brw_depth_stencil_state *zstencil;
542
543 const struct brw_sampler *sampler[PIPE_MAX_SAMPLERS];
544 unsigned num_samplers;
545
546 struct pipe_texture *texture[PIPE_MAX_SAMPLERS];
547 struct pipe_vertex_buffer vertex_buffer[PIPE_MAX_ATTRIBS];
548 struct pipe_vertex_element vertex_element[PIPE_MAX_ATTRIBS];
549 unsigned num_vertex_elements;
550 unsigned num_textures;
551 unsigned num_vertex_buffers;
552
553 struct pipe_scissor_state scissor;
554 struct pipe_viewport_state viewport;
555 struct pipe_framebuffer_state fb;
556 struct pipe_clip_state ucp;
557 struct pipe_buffer *vertex_constants;
558 struct pipe_buffer *fragment_constants;
559
560 struct brw_blend_constant_color bcc;
561 struct brw_polygon_stipple bps;
562 struct brw_cc_viewport ccv;
563
564 /**
565 * Index buffer for this draw_prims call.
566 *
567 * Updates are signaled by PIPE_NEW_INDEX_BUFFER.
568 */
569 struct pipe_buffer *index_buffer;
570 unsigned index_size;
571
572 /* Updates are signalled by PIPE_NEW_INDEX_RANGE:
573 */
574 unsigned min_index;
575 unsigned max_index;
576
577 } curr;
578
579 struct {
580 struct brw_state_flags dirty;
581
582 /**
583 * List of buffers accumulated in brw_validate_state to receive
584 * dri_bo_check_aperture treatment before exec, so we can know if we
585 * should flush the batch and try again before emitting primitives.
586 *
587 * This can be a fixed number as we only have a limited number of
588 * objects referenced from the batchbuffer in a primitive emit,
589 * consisting of the vertex buffers, pipelined state pointers,
590 * the CURBE, the depth buffer, and a query BO.
591 */
592 struct brw_winsys_buffer *validated_bos[PIPE_MAX_SHADER_INPUTS + 16];
593 int validated_bo_count;
594 } state;
595
596 struct brw_cache cache; /** non-surface items */
597 struct brw_cache surface_cache; /* surface items */
598 struct brw_cached_batch_item *cached_batch_items;
599
600 struct {
601 struct u_upload_mgr *upload_vertex;
602 struct u_upload_mgr *upload_index;
603
604 /* Information on uploaded vertex buffers:
605 */
606 struct {
607 unsigned stride; /* in bytes between successive vertices */
608 unsigned offset; /* in bytes, of first vertex in bo */
609 unsigned vertex_count; /* count of valid vertices which may be accessed */
610 struct brw_winsys_buffer *bo;
611 } vb[PIPE_MAX_ATTRIBS];
612
613 unsigned nr_vb; /* currently the same as curr.num_vertex_buffers */
614 } vb;
615
616 struct {
617 /* Updates to these fields are signaled by BRW_NEW_INDEX_BUFFER. */
618 struct brw_winsys_buffer *bo;
619 unsigned int offset;
620 unsigned int size;
621 /* Offset to index buffer index to use in CMD_3D_PRIM so that we can
622 * avoid re-uploading the IB packet over and over if we're actually
623 * referencing the same index buffer.
624 */
625 unsigned int start_vertex_offset;
626 } ib;
627
628
629 /* BRW_NEW_URB_ALLOCATIONS:
630 */
631 struct {
632 GLuint vsize; /* vertex size plus header in urb registers */
633 GLuint csize; /* constant buffer size in urb registers */
634 GLuint sfsize; /* setup data size in urb registers */
635
636 GLboolean constrained;
637
638 GLuint nr_vs_entries;
639 GLuint nr_gs_entries;
640 GLuint nr_clip_entries;
641 GLuint nr_sf_entries;
642 GLuint nr_cs_entries;
643
644 GLuint vs_start;
645 GLuint gs_start;
646 GLuint clip_start;
647 GLuint sf_start;
648 GLuint cs_start;
649 } urb;
650
651
652 /* BRW_NEW_CURBE_OFFSETS:
653 */
654 struct {
655 GLuint wm_start; /**< pos of first wm const in CURBE buffer */
656 GLuint wm_size; /**< number of float[4] consts, multiple of 16 */
657 GLuint clip_start;
658 GLuint clip_size;
659 GLuint vs_start;
660 GLuint vs_size;
661 GLuint total_size;
662
663 struct brw_winsys_buffer *curbe_bo;
664 /** Offset within curbe_bo of space for current curbe entry */
665 GLuint curbe_offset;
666 /** Offset within curbe_bo of space for next curbe entry */
667 GLuint curbe_next_offset;
668
669 GLfloat *last_buf;
670 GLuint last_bufsz;
671 /**
672 * Whether we should create a new bo instead of reusing the old one
673 * (if we just dispatch the batch pointing at the old one.
674 */
675 GLboolean need_new_bo;
676 } curbe;
677
678 struct {
679 struct brw_vs_prog_data *prog_data;
680
681 struct brw_winsys_buffer *prog_bo;
682 struct brw_winsys_buffer *state_bo;
683
684 /** Binding table of pointers to surf_bo entries */
685 struct brw_winsys_buffer *bind_bo;
686 struct brw_winsys_buffer *surf_bo[BRW_VS_MAX_SURF];
687 GLuint nr_surfaces;
688 } vs;
689
690 struct {
691 struct brw_gs_prog_data *prog_data;
692
693 GLboolean prog_active;
694 struct brw_winsys_buffer *prog_bo;
695 struct brw_winsys_buffer *state_bo;
696 } gs;
697
698 struct {
699 struct brw_clip_prog_data *prog_data;
700
701 struct brw_winsys_buffer *prog_bo;
702 struct brw_winsys_buffer *state_bo;
703 struct brw_winsys_buffer *vp_bo;
704 } clip;
705
706
707 struct {
708 struct brw_sf_prog_data *prog_data;
709
710 struct brw_winsys_buffer *prog_bo;
711 struct brw_winsys_buffer *state_bo;
712 struct brw_winsys_buffer *vp_bo;
713 } sf;
714
715 struct {
716 struct brw_wm_prog_data *prog_data;
717 struct brw_wm_compile *compile_data;
718
719 /** Input sizes, calculated from active vertex program.
720 * One bit per fragment program input attribute.
721 */
722 //GLbitfield input_size_masks[4];
723
724 /** Array of surface default colors (texture border color) */
725 struct brw_winsys_buffer *sdc_bo[BRW_MAX_TEX_UNIT];
726
727 GLuint render_surf;
728 GLuint nr_surfaces;
729
730 GLuint max_threads;
731 struct brw_winsys_buffer *scratch_bo;
732
733 GLuint sampler_count;
734 struct brw_winsys_buffer *sampler_bo;
735
736 /** Binding table of pointers to surf_bo entries */
737 struct brw_winsys_buffer *bind_bo;
738 struct brw_winsys_buffer *surf_bo[BRW_WM_MAX_SURF];
739
740 struct brw_winsys_buffer *prog_bo;
741 struct brw_winsys_buffer *state_bo;
742 } wm;
743
744
745 struct {
746 struct brw_winsys_buffer *state_bo;
747
748 struct brw_cc_unit_state cc;
749 struct brw_winsys_reloc reloc[1];
750 } cc;
751
752 struct {
753 struct brw_query_object active_head;
754 struct brw_winsys_buffer *bo;
755 int index;
756 GLboolean active;
757 int stats_wm;
758 } query;
759
760 struct {
761 unsigned always_emit_state:1;
762 unsigned always_flush_batch:1;
763 unsigned force_swtnl:1;
764 unsigned no_swtnl:1;
765 } flags;
766
767 /* Used to give every program string a unique id
768 */
769 GLuint program_id;
770 };
771
772
773
774 /*======================================================================
775 * brw_queryobj.c
776 */
777 void brw_init_query(struct brw_context *brw);
778 enum pipe_error brw_prepare_query_begin(struct brw_context *brw);
779 void brw_emit_query_begin(struct brw_context *brw);
780 void brw_emit_query_end(struct brw_context *brw);
781
782 /*======================================================================
783 * brw_state_dump.c
784 */
785 void brw_debug_batch(struct brw_context *intel);
786
787
788 /*======================================================================
789 * brw_pipe_*.c
790 */
791 void brw_pipe_blend_init( struct brw_context *brw );
792 void brw_pipe_depth_stencil_init( struct brw_context *brw );
793 void brw_pipe_framebuffer_init( struct brw_context *brw );
794 void brw_pipe_flush_init( struct brw_context *brw );
795 void brw_pipe_misc_init( struct brw_context *brw );
796 void brw_pipe_query_init( struct brw_context *brw );
797 void brw_pipe_rast_init( struct brw_context *brw );
798 void brw_pipe_sampler_init( struct brw_context *brw );
799 void brw_pipe_shader_init( struct brw_context *brw );
800 void brw_pipe_vertex_init( struct brw_context *brw );
801 void brw_pipe_clear_init( struct brw_context *brw );
802
803
804 void brw_pipe_blend_cleanup( struct brw_context *brw );
805 void brw_pipe_depth_stencil_cleanup( struct brw_context *brw );
806 void brw_pipe_framebuffer_cleanup( struct brw_context *brw );
807 void brw_pipe_flush_cleanup( struct brw_context *brw );
808 void brw_pipe_misc_cleanup( struct brw_context *brw );
809 void brw_pipe_query_cleanup( struct brw_context *brw );
810 void brw_pipe_rast_cleanup( struct brw_context *brw );
811 void brw_pipe_sampler_cleanup( struct brw_context *brw );
812 void brw_pipe_shader_cleanup( struct brw_context *brw );
813 void brw_pipe_vertex_cleanup( struct brw_context *brw );
814 void brw_pipe_clear_cleanup( struct brw_context *brw );
815
816 void brw_hw_cc_init( struct brw_context *brw );
817 void brw_hw_cc_cleanup( struct brw_context *brw );
818
819
820
821 void brw_context_flush( struct brw_context *brw );
822
823
824 /* brw_urb.c
825 */
826 int brw_upload_urb_fence(struct brw_context *brw);
827
828 /* brw_curbe.c
829 */
830 int brw_upload_cs_urb_state(struct brw_context *brw);
831
832 /* brw_disasm.c */
833 int brw_disasm_insn (FILE *file, const struct brw_instruction *inst);
834 int brw_disasm (FILE *file,
835 const struct brw_instruction *inst,
836 unsigned count);
837
838 /*======================================================================
839 * Inline conversion functions. These are better-typed than the
840 * macros used previously:
841 */
842 static INLINE struct brw_context *
843 brw_context( struct pipe_context *ctx )
844 {
845 return (struct brw_context *)ctx;
846 }
847
848
849 #define BRW_IS_965(brw) ((brw)->chipset.is_965)
850 #define BRW_IS_IGDNG(brw) ((brw)->chipset.is_igdng)
851 #define BRW_IS_G4X(brw) ((brw)->chipset.is_g4x)
852
853
854 #endif
855