src/gallium/drivers/i965/brw_context.h

   1 /*
   2  Copyright (C) Intel Corp.  2006.  All Rights Reserved.
   3  Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
   4  develop this 3D driver.
   5
   6  Permission is hereby granted, free of charge, to any person obtaining
   7  a copy of this software and associated documentation files (the
   8  "Software"), to deal in the Software without restriction, including
   9  without limitation the rights to use, copy, modify, merge, publish,
  10  distribute, sublicense, and/or sell copies of the Software, and to
  11  permit persons to whom the Software is furnished to do so, subject to
  12  the following conditions:
  13
  14  The above copyright notice and this permission notice (including the
  15  next paragraph) shall be included in all copies or substantial
  16  portions of the Software.
  17
  18  THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  19  EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  20  MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
  21  IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
  22  LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
  23  OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
  24  WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25
  26  **********************************************************************/
  27  /*
  28   * Authors:
  29   *   Keith Whitwell <keith@tungstengraphics.com>
  30   */
  31
  32
  33 #ifndef BRWCONTEXT_INC
  34 #define BRWCONTEXT_INC
  35
  36 #include "brw_structs.h"
  37 #include "brw_winsys.h"
  38 #include "brw_reg.h"
  39 #include "pipe/p_state.h"
  40 #include "pipe/p_context.h"
  41 #include "tgsi/tgsi_scan.h"
  42
  43
  44 /* Glossary:
  45  *
  46  * URB - uniform resource buffer.  A mid-sized buffer which is
  47  * partitioned between the fixed function units and used for passing
  48  * values (vertices, primitives, constants) between them.
  49  *
  50  * CURBE - constant URB entry.  An urb region (entry) used to hold
  51  * constant values which the fixed function units can be instructed to
  52  * preload into the GRF when spawning a thread.
  53  *
  54  * VUE - vertex URB entry.  An urb entry holding a vertex and usually
  55  * a vertex header.  The header contains control information and
  56  * things like primitive type, Begin/end flags and clip codes.
  57  *
  58  * PUE - primitive URB entry.  An urb entry produced by the setup (SF)
  59  * unit holding rasterization and interpolation parameters.
  60  *
  61  * GRF - general register file.  One of several register files
  62  * addressable by programmed threads.  The inputs (r0, payload, curbe,
  63  * urb) of the thread are preloaded to this area before the thread is
  64  * spawned.  The registers are individually 8 dwords wide and suitable
  65  * for general usage.  Registers holding thread input values are not
  66  * special and may be overwritten.
  67  *
  68  * MRF - message register file.  Threads communicate (and terminate)
  69  * by sending messages.  Message parameters are placed in contiguous
  70  * MRF registers.  All program output is via these messages.  URB
  71  * entries are populated by sending a message to the shared URB
  72  * function containing the new data, together with a control word,
  73  * often an unmodified copy of R0.
  74  *
  75  * R0 - GRF register 0.  Typically holds control information used when
  76  * sending messages to other threads.
  77  *
  78  * EU or GEN4 EU: The name of the programmable subsystem of the
  79  * i965 hardware.  Threads are executed by the EU, the registers
  80  * described above are part of the EU architecture.
  81  *
  82  * Fixed function units:
  83  *
  84  * CS - Command streamer.  Notional first unit, little software
  85  * interaction.  Holds the URB entries used for constant data, ie the
  86  * CURBEs.
  87  *
  88  * VF/VS - Vertex Fetch / Vertex Shader.  The fixed function part of
  89  * this unit is responsible for pulling vertices out of vertex buffers
  90  * in vram and injecting them into the processing pipe as VUEs.  If
  91  * enabled, it first passes them to a VS thread which is a good place
  92  * for the driver to implement any active vertex shader.
  93  *
  94  * GS - Geometry Shader.  This corresponds to a new DX10 concept.  If
  95  * enabled, incoming strips etc are passed to GS threads in individual
  96  * line/triangle/point units.  The GS thread may perform arbitary
  97  * computation and emit whatever primtives with whatever vertices it
  98  * chooses.  This makes GS an excellent place to implement GL's
  99  * unfilled polygon modes, though of course it is capable of much
 100  * more.  Additionally, GS is used to translate away primitives not
 101  * handled by latter units, including Quads and Lineloops.
 102  *
 103  * CS - Clipper.  Mesa's clipping algorithms are imported to run on
 104  * this unit.  The fixed function part performs cliptesting against
 105  * the 6 fixed clipplanes and makes descisions on whether or not the
 106  * incoming primitive needs to be passed to a thread for clipping.
 107  * User clip planes are handled via cooperation with the VS thread.
 108  *
 109  * SF - Strips Fans or Setup: Triangles are prepared for
 110  * rasterization.  Interpolation coefficients are calculated.
 111  * Flatshading and two-side lighting usually performed here.
 112  *
 113  * WM - Windower.  Interpolation of vertex attributes performed here.
 114  * Fragment shader implemented here.  SIMD aspects of EU taken full
 115  * advantage of, as pixels are processed in blocks of 16.
 116  *
 117  * CC - Color Calculator.  No EU threads associated with this unit.
 118  * Handles blending and (presumably) depth and stencil testing.
 119  */
 120
 121 #define BRW_MAX_CURBE                    (32*16)
 122
 123 struct brw_context;
 124
 125 struct brw_depth_stencil_state {
 126    //struct pipe_depth_stencil_alpha_state templ; /* for draw module */
 127
 128    /* Precalculated hardware state:
 129     */
 130    struct brw_cc0 cc0;
 131    struct brw_cc1 cc1;
 132    struct brw_cc2 cc2;
 133    struct brw_cc3 cc3;
 134    struct brw_cc7 cc7;
 135 };
 136
 137
 138 struct brw_blend_state {
 139    //struct pipe_depth_stencil_alpha_state templ; /* for draw module */
 140
 141    /* Precalculated hardware state:
 142     */
 143    struct brw_cc2 cc2;
 144    struct brw_cc3 cc3;
 145    struct brw_cc5 cc5;
 146    struct brw_cc6 cc6;
 147 };
 148
 149
 150 struct brw_rasterizer_state;
 151
 152
 153 struct brw_vertex_shader {
 154    const struct tgsi_token *tokens;
 155    struct tgsi_shader_info info;
 156
 157    struct brw_winsys_buffer *const_buffer;    /** Program constant buffer/surface */
 158    GLboolean use_const_buffer;
 159 };
 160
 161
 162 struct brw_fragment_shader {
 163    const struct tgsi_token *tokens;
 164    struct tgsi_shader_info info;
 165
 166    GLboolean isGLSL;
 167
 168    struct brw_winsys_buffer *const_buffer;    /** Program constant buffer/surface */
 169    GLboolean use_const_buffer;
 170 };
 171
 172
 173
 174 #define PIPE_NEW_DEPTH_STENCIL_ALPHA    0x1
 175 #define PIPE_NEW_RAST                   0x2
 176 #define PIPE_NEW_BLEND                  0x4
 177 #define PIPE_NEW_VIEWPORT               0x8
 178 #define PIPE_NEW_SAMPLERS               0x10
 179 #define PIPE_NEW_VERTEX_BUFFER          0x20
 180 #define PIPE_NEW_VERTEX_ELEMENT         0x40
 181 #define PIPE_NEW_FRAGMENT_SHADER        0x80
 182 #define PIPE_NEW_VERTEX_SHADER          0x100
 183 #define PIPE_NEW_FRAGMENT_CONSTANTS     0x200
 184 #define PIPE_NEW_VERTEX_CONSTANTS       0x400
 185 #define PIPE_NEW_CLIP                   0x800
 186 #define PIPE_NEW_INDEX_BUFFER           0x1000
 187 #define PIPE_NEW_INDEX_RANGE            0x2000
 188 #define PIPE_NEW_BLEND_COLOR            0x4000
 189 #define PIPE_NEW_POLYGON_STIPPLE        0x8000
 190 #define PIPE_NEW_FRAMEBUFFER_DIMENSIONS 0x10000
 191 #define PIPE_NEW_DEPTH_BUFFER           0x20000
 192 #define PIPE_NEW_COLOR_BUFFERS          0x40000
 193 #define PIPE_NEW_QUERY                  0x80000
 194 #define PIPE_NEW_SCISSOR                0x100000
 195
 196
 197
 198 #define BRW_NEW_URB_FENCE               0x1
 199 #define BRW_NEW_FRAGMENT_PROGRAM        0x2
 200 #define BRW_NEW_VERTEX_PROGRAM          0x4
 201 #define BRW_NEW_INPUT_DIMENSIONS        0x8
 202 #define BRW_NEW_CURBE_OFFSETS           0x10
 203 #define BRW_NEW_REDUCED_PRIMITIVE       0x20
 204 #define BRW_NEW_PRIMITIVE               0x40
 205 #define BRW_NEW_CONTEXT                 0x80
 206 #define BRW_NEW_WM_INPUT_DIMENSIONS     0x100
 207 #define BRW_NEW_PSP                     0x800
 208 #define BRW_NEW_WM_SURFACES             0x1000
 209 #define BRW_NEW_xxx                     0x2000 /* was FENCE */
 210 #define BRW_NEW_INDICES                 0x4000
 211 #define BRW_NEW_VERTICES                0x8000
 212 /**
 213  * Used for any batch entry with a relocated pointer that will be used
 214  * by any 3D rendering.  Need to re-emit these fresh in each
 215  * batchbuffer as the referenced buffers may be relocated in the
 216  * meantime.
 217  */
 218 #define BRW_NEW_BATCH                   0x10000
 219 #define BRW_NEW_NR_WM_SURFACES          0x40000
 220 #define BRW_NEW_NR_VS_SURFACES          0x80000
 221 #define BRW_NEW_INDEX_BUFFER            0x100000
 222
 223 struct brw_state_flags {
 224    /** State update flags signalled by mesa internals */
 225    GLuint mesa;
 226    /**
 227     * State update flags signalled as the result of brw_tracked_state updates
 228     */
 229    GLuint brw;
 230    /** State update flags signalled by brw_state_cache.c searches */
 231    GLuint cache;
 232 };
 233
 234
 235
 236 /* Data about a particular attempt to compile a program.  Note that
 237  * there can be many of these, each in a different GL state
 238  * corresponding to a different brw_wm_prog_key struct, with different
 239  * compiled programs:
 240  */
 241 struct brw_wm_prog_data {
 242    GLuint curb_read_length;
 243    GLuint urb_read_length;
 244
 245    GLuint first_curbe_grf;
 246    GLuint total_grf;
 247    GLuint total_scratch;
 248
 249    GLuint nr_params;       /**< number of float params/constants */
 250    GLboolean error;
 251
 252    /* Pointer to tracked values (only valid once
 253     * _mesa_load_state_parameters has been called at runtime).
 254     */
 255    const GLfloat *param[BRW_MAX_CURBE];
 256 };
 257
 258 struct brw_sf_prog_data {
 259    GLuint urb_read_length;
 260    GLuint total_grf;
 261
 262    /* Each vertex may have upto 12 attributes, 4 components each,
 263     * except WPOS which requires only 2.  (11*4 + 2) == 44 ==> 11
 264     * rows.
 265     *
 266     * Actually we use 4 for each, so call it 12 rows.
 267     */
 268    GLuint urb_entry_size;
 269 };
 270
 271
 272 struct brw_clip_prog_data;
 273
 274 struct brw_gs_prog_data {
 275    GLuint urb_read_length;
 276    GLuint total_grf;
 277 };
 278
 279 struct brw_vs_prog_data {
 280    GLuint curb_read_length;
 281    GLuint urb_read_length;
 282    GLuint total_grf;
 283    GLuint nr_outputs_written;
 284    GLuint nr_params;       /**< number of float params/constants */
 285
 286    GLuint inputs_read;
 287
 288    /* Used for calculating urb partitions:
 289     */
 290    GLuint urb_entry_size;
 291 };
 292
 293
 294 /* Size == 0 if output either not written, or always [0,0,0,1]
 295  */
 296 struct brw_vs_ouput_sizes {
 297    GLubyte output_size[PIPE_MAX_SHADER_OUTPUTS];
 298 };
 299
 300
 301 /** Number of texture sampler units */
 302 #define BRW_MAX_TEX_UNIT 16
 303
 304 /**
 305  * Size of our surface binding table for the WM.
 306  * This contains pointers to the drawing surfaces and current texture
 307  * objects and shader constant buffers (+2).
 308  */
 309 #define BRW_WM_MAX_SURF (PIPE_MAX_COLOR_BUFS + BRW_MAX_TEX_UNIT + 1)
 310
 311 /**
 312  * Helpers to convert drawing buffers, textures and constant buffers
 313  * to surface binding table indexes, for WM.
 314  */
 315 #define SURF_INDEX_DRAW(d)           (d)
 316 #define SURF_INDEX_FRAG_CONST_BUFFER (PIPE_MAX_COLOR_BUFS)
 317 #define SURF_INDEX_TEXTURE(t)        (PIPE_MAX_COLOR_BUFS + 1 + (t))
 318
 319 /**
 320  * Size of surface binding table for the VS.
 321  * Only one constant buffer for now.
 322  */
 323 #define BRW_VS_MAX_SURF 1
 324
 325 /**
 326  * Only a VS constant buffer
 327  */
 328 #define SURF_INDEX_VERT_CONST_BUFFER 0
 329
 330
 331 enum brw_cache_id {
 332    BRW_CC_VP,
 333    BRW_CC_UNIT,
 334    BRW_WM_PROG,
 335    BRW_SAMPLER_DEFAULT_COLOR,
 336    BRW_SAMPLER,
 337    BRW_WM_UNIT,
 338    BRW_SF_PROG,
 339    BRW_SF_VP,
 340    BRW_SF_UNIT,
 341    BRW_VS_UNIT,
 342    BRW_VS_PROG,
 343    BRW_GS_UNIT,
 344    BRW_GS_PROG,
 345    BRW_CLIP_VP,
 346    BRW_CLIP_UNIT,
 347    BRW_CLIP_PROG,
 348    BRW_SS_SURFACE,
 349    BRW_SS_SURF_BIND,
 350
 351    BRW_MAX_CACHE
 352 };
 353
 354 struct brw_cache_item {
 355    /**
 356     * Effectively part of the key, cache_id identifies what kind of state
 357     * buffer is involved, and also which brw->state.dirty.cache flag should
 358     * be set when this cache item is chosen.
 359     */
 360    enum brw_cache_id cache_id;
 361    /** 32-bit hash of the key data */
 362    GLuint hash;
 363    GLuint key_size;             /* for variable-sized keys */
 364    const void *key;
 365    struct brw_winsys_buffer **reloc_bufs;
 366    GLuint nr_reloc_bufs;
 367
 368    struct brw_winsys_buffer *bo;
 369    GLuint data_size;
 370
 371    struct brw_cache_item *next;
 372 };
 373
 374
 375
 376 struct brw_cache {
 377    struct brw_context *brw;
 378    struct brw_winsys_screen *sws;
 379
 380    struct brw_cache_item **items;
 381    GLuint size, n_items;
 382
 383    GLuint key_size[BRW_MAX_CACHE];              /* for fixed-size keys */
 384    GLuint aux_size[BRW_MAX_CACHE];
 385    char *name[BRW_MAX_CACHE];
 386
 387
 388    /* Record of the last BOs chosen for each cache_id.  Used to set
 389     * brw->state.dirty.cache when a new cache item is chosen.
 390     */
 391    struct brw_winsys_buffer *last_bo[BRW_MAX_CACHE];
 392 };
 393
 394
 395 struct brw_tracked_state {
 396    struct brw_state_flags dirty;
 397    int (*prepare)( struct brw_context *brw );
 398    int (*emit)( struct brw_context *brw );
 399 };
 400
 401 /* Flags for brw->state.cache.
 402  */
 403 #define CACHE_NEW_CC_VP                  (1<<BRW_CC_VP)
 404 #define CACHE_NEW_CC_UNIT                (1<<BRW_CC_UNIT)
 405 #define CACHE_NEW_WM_PROG                (1<<BRW_WM_PROG)
 406 #define CACHE_NEW_SAMPLER_DEFAULT_COLOR  (1<<BRW_SAMPLER_DEFAULT_COLOR)
 407 #define CACHE_NEW_SAMPLER                (1<<BRW_SAMPLER)
 408 #define CACHE_NEW_WM_UNIT                (1<<BRW_WM_UNIT)
 409 #define CACHE_NEW_SF_PROG                (1<<BRW_SF_PROG)
 410 #define CACHE_NEW_SF_VP                  (1<<BRW_SF_VP)
 411 #define CACHE_NEW_SF_UNIT                (1<<BRW_SF_UNIT)
 412 #define CACHE_NEW_VS_UNIT                (1<<BRW_VS_UNIT)
 413 #define CACHE_NEW_VS_PROG                (1<<BRW_VS_PROG)
 414 #define CACHE_NEW_GS_UNIT                (1<<BRW_GS_UNIT)
 415 #define CACHE_NEW_GS_PROG                (1<<BRW_GS_PROG)
 416 #define CACHE_NEW_CLIP_VP                (1<<BRW_CLIP_VP)
 417 #define CACHE_NEW_CLIP_UNIT              (1<<BRW_CLIP_UNIT)
 418 #define CACHE_NEW_CLIP_PROG              (1<<BRW_CLIP_PROG)
 419 #define CACHE_NEW_SURFACE                (1<<BRW_SS_SURFACE)
 420 #define CACHE_NEW_SURF_BIND              (1<<BRW_SS_SURF_BIND)
 421
 422 struct brw_cached_batch_item {
 423    struct header *header;
 424    GLuint sz;
 425    struct brw_cached_batch_item *next;
 426 };
 427
 428
 429
 430 /* Protect against a future where VERT_ATTRIB_MAX > 32.  Wouldn't life
 431  * be easier if C allowed arrays of packed elements?
 432  */
 433 #define VS_INPUT_BITMASK_DWORDS  ((PIPE_MAX_SHADER_INPUTS+31)/32)
 434
 435
 436
 437
 438 struct brw_vertex_info {
 439    GLuint sizes[VS_INPUT_BITMASK_DWORDS * 2]; /* sizes:2[VERT_ATTRIB_MAX] */
 440 };
 441
 442
 443 struct brw_query_object {
 444    /** Doubly linked list of active query objects in the context. */
 445    struct brw_query_object *prev, *next;
 446
 447    /** Last query BO associated with this query. */
 448    struct brw_winsys_buffer *bo;
 449    /** First index in bo with query data for this object. */
 450    int first_index;
 451    /** Last index in bo with query data for this object. */
 452    int last_index;
 453
 454    /* Total count of pixels from previous BOs */
 455    uint64_t result;
 456 };
 457
 458
 459 /**
 460  * brw_context is derived from pipe_context
 461  */
 462 struct brw_context
 463 {
 464    struct pipe_context base;
 465    struct brw_chipset chipset;
 466
 467    struct brw_screen *brw_screen;
 468    struct brw_winsys_screen *sws;
 469
 470    struct brw_batchbuffer *batch;
 471
 472    GLuint primitive;
 473    GLuint reduced_primitive;
 474
 475    /* Active state from the state tracker:
 476     */
 477    struct {
 478       const struct brw_vertex_shader *vertex_shader;
 479       const struct brw_fragment_shader *fragment_shader;
 480       const struct brw_blend_state *blend;
 481       const struct brw_rasterizer_state *rast;
 482       const struct brw_depth_stencil_state *zstencil;
 483
 484       const struct pipe_texture *texture[PIPE_MAX_SAMPLERS];
 485       const struct pipe_sampler *sampler[PIPE_MAX_SAMPLERS];
 486       unsigned num_textures;
 487       unsigned num_samplers;
 488
 489
 490       struct pipe_vertex_element vertex_element[PIPE_MAX_ATTRIBS];
 491       struct pipe_vertex_buffer vertex_buffer[PIPE_MAX_ATTRIBS];
 492       unsigned num_vertex_elements;
 493       unsigned num_vertex_buffers;
 494
 495       struct pipe_scissor_state scissor;
 496       struct pipe_framebuffer_state fb;
 497       struct pipe_viewport_state vp;
 498       struct pipe_clip_state ucp;
 499       struct pipe_buffer *vertex_constants;
 500       struct pipe_buffer *fragment_constants;
 501
 502       struct pipe_viewport_state viewport;
 503       struct brw_blend_constant_color bcc;
 504       struct brw_polygon_stipple bps;
 505
 506
 507
 508       /**
 509        * Index buffer for this draw_prims call.
 510        *
 511        * Updates are signaled by PIPE_NEW_INDEX_BUFFER.
 512        */
 513       struct pipe_buffer *index_buffer;
 514       unsigned index_size;
 515
 516       /* Updates are signalled by PIPE_NEW_INDEX_RANGE:
 517        */
 518       unsigned min_index;
 519       unsigned max_index;
 520
 521    } curr;
 522
 523    struct {
 524       struct brw_state_flags dirty;
 525
 526       /**
 527        * List of buffers accumulated in brw_validate_state to receive
 528        * dri_bo_check_aperture treatment before exec, so we can know if we
 529        * should flush the batch and try again before emitting primitives.
 530        *
 531        * This can be a fixed number as we only have a limited number of
 532        * objects referenced from the batchbuffer in a primitive emit,
 533        * consisting of the vertex buffers, pipelined state pointers,
 534        * the CURBE, the depth buffer, and a query BO.
 535        */
 536       struct brw_winsys_buffer *validated_bos[PIPE_MAX_SHADER_INPUTS + 16];
 537       int validated_bo_count;
 538    } state;
 539
 540    struct brw_cache cache;  /** non-surface items */
 541    struct brw_cache surface_cache;  /* surface items */
 542    struct brw_cached_batch_item *cached_batch_items;
 543
 544    struct {
 545       struct u_upload_mgr *upload_vertex;
 546       struct u_upload_mgr *upload_index;
 547
 548       /* Information on uploaded vertex buffers:
 549        */
 550       struct {
 551          unsigned stride;       /* in bytes between successive vertices */
 552          unsigned offset;       /* in bytes, of first vertex in bo */
 553          unsigned vertex_count; /* count of valid vertices which may be accessed */
 554          struct brw_winsys_buffer *bo;
 555       } vb[PIPE_MAX_ATTRIBS];
 556
 557       struct {
 558       } ve[PIPE_MAX_ATTRIBS];
 559
 560       unsigned nr_vb;           /* currently the same as curr.num_vertex_buffers */
 561       unsigned nr_ve;           /* currently the same as curr.num_vertex_elements */
 562    } vb;
 563
 564    struct {
 565       /* Updates to these fields are signaled by BRW_NEW_INDEX_BUFFER. */
 566       struct brw_winsys_buffer *bo;
 567       unsigned int offset;
 568       unsigned int size;
 569       /* Offset to index buffer index to use in CMD_3D_PRIM so that we can
 570        * avoid re-uploading the IB packet over and over if we're actually
 571        * referencing the same index buffer.
 572        */
 573       unsigned int start_vertex_offset;
 574    } ib;
 575
 576
 577    /* BRW_NEW_URB_ALLOCATIONS:
 578     */
 579    struct {
 580       GLuint vsize;             /* vertex size plus header in urb registers */
 581       GLuint csize;             /* constant buffer size in urb registers */
 582       GLuint sfsize;            /* setup data size in urb registers */
 583
 584       GLboolean constrained;
 585
 586       GLuint nr_vs_entries;
 587       GLuint nr_gs_entries;
 588       GLuint nr_clip_entries;
 589       GLuint nr_sf_entries;
 590       GLuint nr_cs_entries;
 591
 592       GLuint vs_start;
 593       GLuint gs_start;
 594       GLuint clip_start;
 595       GLuint sf_start;
 596       GLuint cs_start;
 597    } urb;
 598
 599
 600    /* BRW_NEW_CURBE_OFFSETS:
 601     */
 602    struct {
 603       GLuint wm_start;  /**< pos of first wm const in CURBE buffer */
 604       GLuint wm_size;   /**< number of float[4] consts, multiple of 16 */
 605       GLuint clip_start;
 606       GLuint clip_size;
 607       GLuint vs_start;
 608       GLuint vs_size;
 609       GLuint total_size;
 610
 611       struct brw_winsys_buffer *curbe_bo;
 612       /** Offset within curbe_bo of space for current curbe entry */
 613       GLuint curbe_offset;
 614       /** Offset within curbe_bo of space for next curbe entry */
 615       GLuint curbe_next_offset;
 616
 617       GLfloat *last_buf;
 618       GLuint last_bufsz;
 619       /**
 620        *  Whether we should create a new bo instead of reusing the old one
 621        * (if we just dispatch the batch pointing at the old one.
 622        */
 623       GLboolean need_new_bo;
 624    } curbe;
 625
 626    struct {
 627       struct brw_vs_prog_data *prog_data;
 628
 629       struct brw_winsys_buffer *prog_bo;
 630       struct brw_winsys_buffer *state_bo;
 631
 632       /** Binding table of pointers to surf_bo entries */
 633       struct brw_winsys_buffer *bind_bo;
 634       struct brw_winsys_buffer *surf_bo[BRW_VS_MAX_SURF];
 635       GLuint nr_surfaces;
 636    } vs;
 637
 638    struct {
 639       struct brw_gs_prog_data *prog_data;
 640
 641       GLboolean prog_active;
 642       struct brw_winsys_buffer *prog_bo;
 643       struct brw_winsys_buffer *state_bo;
 644    } gs;
 645
 646    struct {
 647       struct brw_clip_prog_data *prog_data;
 648
 649       struct brw_winsys_buffer *prog_bo;
 650       struct brw_winsys_buffer *state_bo;
 651       struct brw_winsys_buffer *vp_bo;
 652    } clip;
 653
 654
 655    struct {
 656       struct brw_sf_prog_data *prog_data;
 657
 658       struct brw_winsys_buffer *prog_bo;
 659       struct brw_winsys_buffer *state_bo;
 660       struct brw_winsys_buffer *vp_bo;
 661    } sf;
 662
 663    struct {
 664       struct brw_wm_prog_data *prog_data;
 665       struct brw_wm_compile *compile_data;
 666
 667       /** Input sizes, calculated from active vertex program.
 668        * One bit per fragment program input attribute.
 669        */
 670       //GLbitfield input_size_masks[4];
 671
 672       /** Array of surface default colors (texture border color) */
 673       struct brw_winsys_buffer *sdc_bo[BRW_MAX_TEX_UNIT];
 674
 675       GLuint render_surf;
 676       GLuint nr_surfaces;
 677
 678       GLuint max_threads;
 679       struct brw_winsys_buffer *scratch_bo;
 680
 681       GLuint sampler_count;
 682       struct brw_winsys_buffer *sampler_bo;
 683
 684       /** Binding table of pointers to surf_bo entries */
 685       struct brw_winsys_buffer *bind_bo;
 686       struct brw_winsys_buffer *surf_bo[PIPE_MAX_COLOR_BUFS];
 687
 688       struct brw_winsys_buffer *prog_bo;
 689       struct brw_winsys_buffer *state_bo;
 690    } wm;
 691
 692
 693    struct {
 694       struct brw_winsys_buffer *prog_bo;
 695       struct brw_winsys_buffer *state_bo;
 696       struct brw_winsys_buffer *vp_bo;
 697    } cc;
 698
 699    struct {
 700       struct brw_query_object active_head;
 701       struct brw_winsys_buffer *bo;
 702       int index;
 703       GLboolean active;
 704       int stats_wm;
 705    } query;
 706
 707    struct {
 708       unsigned always_emit_state:1;
 709       unsigned always_flush_batch:1;
 710       unsigned force_swtnl:1;
 711       unsigned no_swtnl:1;
 712    } flags;
 713
 714    /* Used to give every program string a unique id
 715     */
 716    GLuint program_id;
 717 };
 718
 719
 720
 721 /*======================================================================
 722  * brw_queryobj.c
 723  */
 724 void brw_init_query(struct brw_context *brw);
 725 void brw_prepare_query_begin(struct brw_context *brw);
 726 void brw_emit_query_begin(struct brw_context *brw);
 727 void brw_emit_query_end(struct brw_context *brw);
 728
 729 /*======================================================================
 730  * brw_state_dump.c
 731  */
 732 void brw_debug_batch(struct brw_context *intel);
 733
 734
 735 /*======================================================================
 736  * brw_pipe_*.c
 737  */
 738 void brw_pipe_blend_init( struct brw_context *brw );
 739 void brw_pipe_depth_stencil_init( struct brw_context *brw );
 740 void brw_pipe_framebuffer_init( struct brw_context *brw );
 741 void brw_pipe_flush_init( struct brw_context *brw );
 742 void brw_pipe_misc_init( struct brw_context *brw );
 743 void brw_pipe_query_init( struct brw_context *brw );
 744 void brw_pipe_rast_init( struct brw_context *brw );
 745 void brw_pipe_sampler_init( struct brw_context *brw );
 746 void brw_pipe_shader_init( struct brw_context *brw );
 747 void brw_pipe_vertex_init( struct brw_context *brw );
 748
 749 void brw_pipe_blend_cleanup( struct brw_context *brw );
 750 void brw_pipe_depth_stencil_cleanup( struct brw_context *brw );
 751 void brw_pipe_framebuffer_cleanup( struct brw_context *brw );
 752 void brw_pipe_flush_cleanup( struct brw_context *brw );
 753 void brw_pipe_misc_cleanup( struct brw_context *brw );
 754 void brw_pipe_query_cleanup( struct brw_context *brw );
 755 void brw_pipe_rast_cleanup( struct brw_context *brw );
 756 void brw_pipe_sampler_cleanup( struct brw_context *brw );
 757 void brw_pipe_shader_cleanup( struct brw_context *brw );
 758 void brw_pipe_vertex_cleanup( struct brw_context *brw );
 759
 760
 761 /* brw_urb.c
 762  */
 763 int brw_upload_urb_fence(struct brw_context *brw);
 764
 765 /* brw_curbe.c
 766  */
 767 int brw_upload_cs_urb_state(struct brw_context *brw);
 768
 769 /* brw_disasm.c */
 770 int brw_disasm (FILE *file, struct brw_instruction *inst);
 771
 772 /*======================================================================
 773  * Inline conversion functions.  These are better-typed than the
 774  * macros used previously:
 775  */
 776 static INLINE struct brw_context *
 777 brw_context( struct pipe_context *ctx )
 778 {
 779    return (struct brw_context *)ctx;
 780 }
 781
 782
 783 #define BRW_IS_965(brw)    ((brw)->chipset.is_965)
 784 #define BRW_IS_IGDNG(brw)  ((brw)->chipset.is_igdng)
 785 #define BRW_IS_G4X(brw)    ((brw)->chipset.is_g4x)
 786
 787
 788 #endif
 789