i965g: handle special vs outputs specially
[mesa.git] / src / gallium / drivers / i965 / brw_context.h
1 /*
2 Copyright (C) Intel Corp. 2006. All Rights Reserved.
3 Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
4 develop this 3D driver.
5
6 Permission is hereby granted, free of charge, to any person obtaining
7 a copy of this software and associated documentation files (the
8 "Software"), to deal in the Software without restriction, including
9 without limitation the rights to use, copy, modify, merge, publish,
10 distribute, sublicense, and/or sell copies of the Software, and to
11 permit persons to whom the Software is furnished to do so, subject to
12 the following conditions:
13
14 The above copyright notice and this permission notice (including the
15 next paragraph) shall be included in all copies or substantial
16 portions of the Software.
17
18 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
19 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
21 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
22 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
23 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
24 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25
26 **********************************************************************/
27 /*
28 * Authors:
29 * Keith Whitwell <keith@tungstengraphics.com>
30 */
31
32
33 #ifndef BRWCONTEXT_INC
34 #define BRWCONTEXT_INC
35
36 #include "brw_structs.h"
37 #include "brw_winsys.h"
38 #include "brw_reg.h"
39 #include "pipe/p_state.h"
40 #include "pipe/p_context.h"
41 #include "tgsi/tgsi_scan.h"
42
43
44 /* Glossary:
45 *
46 * URB - uniform resource buffer. A mid-sized buffer which is
47 * partitioned between the fixed function units and used for passing
48 * values (vertices, primitives, constants) between them.
49 *
50 * CURBE - constant URB entry. An urb region (entry) used to hold
51 * constant values which the fixed function units can be instructed to
52 * preload into the GRF when spawning a thread.
53 *
54 * VUE - vertex URB entry. An urb entry holding a vertex and usually
55 * a vertex header. The header contains control information and
56 * things like primitive type, Begin/end flags and clip codes.
57 *
58 * PUE - primitive URB entry. An urb entry produced by the setup (SF)
59 * unit holding rasterization and interpolation parameters.
60 *
61 * GRF - general register file. One of several register files
62 * addressable by programmed threads. The inputs (r0, payload, curbe,
63 * urb) of the thread are preloaded to this area before the thread is
64 * spawned. The registers are individually 8 dwords wide and suitable
65 * for general usage. Registers holding thread input values are not
66 * special and may be overwritten.
67 *
68 * MRF - message register file. Threads communicate (and terminate)
69 * by sending messages. Message parameters are placed in contiguous
70 * MRF registers. All program output is via these messages. URB
71 * entries are populated by sending a message to the shared URB
72 * function containing the new data, together with a control word,
73 * often an unmodified copy of R0.
74 *
75 * R0 - GRF register 0. Typically holds control information used when
76 * sending messages to other threads.
77 *
78 * EU or GEN4 EU: The name of the programmable subsystem of the
79 * i965 hardware. Threads are executed by the EU, the registers
80 * described above are part of the EU architecture.
81 *
82 * Fixed function units:
83 *
84 * CS - Command streamer. Notional first unit, little software
85 * interaction. Holds the URB entries used for constant data, ie the
86 * CURBEs.
87 *
88 * VF/VS - Vertex Fetch / Vertex Shader. The fixed function part of
89 * this unit is responsible for pulling vertices out of vertex buffers
90 * in vram and injecting them into the processing pipe as VUEs. If
91 * enabled, it first passes them to a VS thread which is a good place
92 * for the driver to implement any active vertex shader.
93 *
94 * GS - Geometry Shader. This corresponds to a new DX10 concept. If
95 * enabled, incoming strips etc are passed to GS threads in individual
96 * line/triangle/point units. The GS thread may perform arbitary
97 * computation and emit whatever primtives with whatever vertices it
98 * chooses. This makes GS an excellent place to implement GL's
99 * unfilled polygon modes, though of course it is capable of much
100 * more. Additionally, GS is used to translate away primitives not
101 * handled by latter units, including Quads and Lineloops.
102 *
103 * CS - Clipper. Mesa's clipping algorithms are imported to run on
104 * this unit. The fixed function part performs cliptesting against
105 * the 6 fixed clipplanes and makes decisions on whether or not the
106 * incoming primitive needs to be passed to a thread for clipping.
107 * User clip planes are handled via cooperation with the VS thread.
108 *
109 * SF - Strips Fans or Setup: Triangles are prepared for
110 * rasterization. Interpolation coefficients are calculated.
111 * Flatshading and two-side lighting usually performed here.
112 *
113 * WM - Windower. Interpolation of vertex attributes performed here.
114 * Fragment shader implemented here. SIMD aspects of EU taken full
115 * advantage of, as pixels are processed in blocks of 16.
116 *
117 * CC - Color Calculator. No EU threads associated with this unit.
118 * Handles blending and (presumably) depth and stencil testing.
119 */
120
121 #define BRW_MAX_CURBE (32*16)
122
123 struct brw_context;
124
125 struct brw_depth_stencil_state {
126 /* Precalculated hardware state:
127 */
128 struct brw_cc0 cc0;
129 struct brw_cc1 cc1;
130 struct brw_cc2 cc2;
131 struct brw_cc3 cc3;
132 struct brw_cc7 cc7;
133
134 unsigned iz_lookup;
135 };
136
137
138 struct brw_blend_state {
139 /* Precalculated hardware state:
140 */
141 struct brw_cc2 cc2;
142 struct brw_cc3 cc3;
143 struct brw_cc5 cc5;
144 struct brw_cc6 cc6;
145
146 struct brw_surf_ss0 ss0;
147 };
148
149
150 struct brw_rasterizer_state;
151
152
153 struct brw_vertex_shader {
154 const struct tgsi_token *tokens;
155 struct brw_winsys_buffer *const_buffer; /** Program constant buffer/surface */
156
157 struct tgsi_shader_info info;
158
159 GLuint has_flow_control:1;
160 GLuint use_const_buffer:1;
161
162 /* Offsets of special vertex shader outputs required for clipping.
163 */
164 GLuint output_hpos:6; /* not always zero? */
165 GLuint output_color0:6;
166 GLuint output_color1:6;
167 GLuint output_bfc0:6;
168 GLuint output_bfc1:6;
169 GLuint output_edgeflag:6;
170
171 unsigned id;
172 };
173
174 struct brw_fs_signature {
175 GLuint nr_inputs;
176 struct {
177 GLuint semantic:5;
178 GLuint semantic_index:27;
179 } input[PIPE_MAX_SHADER_INPUTS];
180 };
181
182 #define brw_fs_signature_size(s) (offsetof(struct brw_fs_signature, input) + \
183 ((s)->nr_inputs * sizeof (s)->input[0]))
184
185
186 struct brw_fragment_shader {
187 const struct tgsi_token *tokens;
188 struct tgsi_shader_info info;
189
190 struct brw_fs_signature signature;
191
192 unsigned iz_lookup;
193 //unsigned wm_lookup;
194
195 unsigned uses_depth:1;
196 unsigned has_flow_control:1;
197
198 unsigned id;
199 struct brw_winsys_buffer *const_buffer; /** Program constant buffer/surface */
200 GLboolean use_const_buffer;
201 };
202
203
204 struct brw_sampler {
205 float border_color[4];
206 struct brw_ss0 ss0;
207 struct brw_ss1 ss1;
208 struct brw_ss3 ss3;
209 };
210
211
212
213 #define PIPE_NEW_DEPTH_STENCIL_ALPHA 0x1
214 #define PIPE_NEW_RAST 0x2
215 #define PIPE_NEW_BLEND 0x4
216 #define PIPE_NEW_VIEWPORT 0x8
217 #define PIPE_NEW_SAMPLERS 0x10
218 #define PIPE_NEW_VERTEX_BUFFER 0x20
219 #define PIPE_NEW_VERTEX_ELEMENT 0x40
220 #define PIPE_NEW_FRAGMENT_SHADER 0x80
221 #define PIPE_NEW_VERTEX_SHADER 0x100
222 #define PIPE_NEW_FRAGMENT_CONSTANTS 0x200
223 #define PIPE_NEW_VERTEX_CONSTANTS 0x400
224 #define PIPE_NEW_CLIP 0x800
225 #define PIPE_NEW_INDEX_BUFFER 0x1000
226 #define PIPE_NEW_INDEX_RANGE 0x2000
227 #define PIPE_NEW_BLEND_COLOR 0x4000
228 #define PIPE_NEW_POLYGON_STIPPLE 0x8000
229 #define PIPE_NEW_FRAMEBUFFER_DIMENSIONS 0x10000
230 #define PIPE_NEW_DEPTH_BUFFER 0x20000
231 #define PIPE_NEW_COLOR_BUFFERS 0x40000
232 #define PIPE_NEW_QUERY 0x80000
233 #define PIPE_NEW_SCISSOR 0x100000
234 #define PIPE_NEW_BOUND_TEXTURES 0x200000
235 #define PIPE_NEW_NR_CBUFS 0x400000
236
237
238
239 #define BRW_NEW_URB_FENCE 0x1
240 #define BRW_NEW_FRAGMENT_PROGRAM 0x2
241 #define BRW_NEW_VERTEX_PROGRAM 0x4
242 #define BRW_NEW_INPUT_DIMENSIONS 0x8
243 #define BRW_NEW_CURBE_OFFSETS 0x10
244 #define BRW_NEW_REDUCED_PRIMITIVE 0x20
245 #define BRW_NEW_PRIMITIVE 0x40
246 #define BRW_NEW_CONTEXT 0x80
247 #define BRW_NEW_WM_INPUT_DIMENSIONS 0x100
248 #define BRW_NEW_PSP 0x800
249 #define BRW_NEW_WM_SURFACES 0x1000
250 #define BRW_NEW_xxx 0x2000 /* was FENCE */
251 #define BRW_NEW_INDICES 0x4000
252 #define BRW_NEW_VERTICES 0x8000
253 /**
254 * Used for any batch entry with a relocated pointer that will be used
255 * by any 3D rendering. Need to re-emit these fresh in each
256 * batchbuffer as the referenced buffers may be relocated in the
257 * meantime.
258 */
259 #define BRW_NEW_BATCH 0x10000
260 #define BRW_NEW_NR_WM_SURFACES 0x40000
261 #define BRW_NEW_NR_VS_SURFACES 0x80000
262 #define BRW_NEW_INDEX_BUFFER 0x100000
263
264 struct brw_state_flags {
265 /** State update flags signalled by mesa internals */
266 GLuint mesa;
267 /**
268 * State update flags signalled as the result of brw_tracked_state updates
269 */
270 GLuint brw;
271 /** State update flags signalled by brw_state_cache.c searches */
272 GLuint cache;
273 };
274
275
276
277 /* Data about a particular attempt to compile a program. Note that
278 * there can be many of these, each in a different GL state
279 * corresponding to a different brw_wm_prog_key struct, with different
280 * compiled programs:
281 */
282 struct brw_wm_prog_data {
283 GLuint curb_read_length;
284 GLuint urb_read_length;
285
286 GLuint first_curbe_grf;
287 GLuint total_grf;
288 GLuint total_scratch;
289
290 GLuint nr_params; /**< number of float params/constants */
291 GLboolean error;
292
293 /* Pointer to tracked values (only valid once
294 * _mesa_load_state_parameters has been called at runtime).
295 */
296 const GLfloat *param[BRW_MAX_CURBE];
297 };
298
299 struct brw_sf_prog_data {
300 GLuint urb_read_length;
301 GLuint total_grf;
302
303 /* Each vertex may have upto 12 attributes, 4 components each,
304 * except WPOS which requires only 2. (11*4 + 2) == 44 ==> 11
305 * rows.
306 *
307 * Actually we use 4 for each, so call it 12 rows.
308 */
309 GLuint urb_entry_size;
310 };
311
312
313 struct brw_clip_prog_data;
314
315 struct brw_gs_prog_data {
316 GLuint urb_read_length;
317 GLuint total_grf;
318 };
319
320 struct brw_vs_prog_data {
321 GLuint curb_read_length;
322 GLuint urb_read_length;
323 GLuint total_grf;
324
325 GLuint nr_outputs;
326 GLuint nr_inputs;
327
328 GLuint nr_params; /**< number of TGSI_FILE_CONSTANT's */
329
330 GLuint output_edgeflag;
331
332 GLboolean writes_psiz;
333
334 /* Used for calculating urb partitions:
335 */
336 GLuint urb_entry_size;
337 };
338
339
340 /* Size == 0 if output either not written, or always [0,0,0,1]
341 */
342 struct brw_vs_ouput_sizes {
343 GLubyte output_size[PIPE_MAX_SHADER_OUTPUTS];
344 };
345
346
347 /** Number of texture sampler units */
348 #define BRW_MAX_TEX_UNIT 16
349
350 /**
351 * Size of our surface binding table for the WM.
352 * This contains pointers to the drawing surfaces and current texture
353 * objects and shader constant buffers (+2).
354 */
355 #define BRW_WM_MAX_SURF (PIPE_MAX_COLOR_BUFS + BRW_MAX_TEX_UNIT + 1)
356
357 /**
358 * Helpers to convert drawing buffers, textures and constant buffers
359 * to surface binding table indexes, for WM.
360 */
361 #define SURF_INDEX_DRAW(d) (d)
362 #define SURF_INDEX_FRAG_CONST_BUFFER (PIPE_MAX_COLOR_BUFS)
363 #define SURF_INDEX_TEXTURE(t) (PIPE_MAX_COLOR_BUFS + 1 + (t))
364
365 /**
366 * Size of surface binding table for the VS.
367 * Only one constant buffer for now.
368 */
369 #define BRW_VS_MAX_SURF 1
370
371 /**
372 * Only a VS constant buffer
373 */
374 #define SURF_INDEX_VERT_CONST_BUFFER 0
375
376
377 /* Bit of a hack to align these with the winsys buffer_data_type enum.
378 */
379 enum brw_cache_id {
380 BRW_CC_VP = BRW_DATA_GS_CC_VP,
381 BRW_CC_UNIT = BRW_DATA_GS_CC_UNIT,
382 BRW_WM_PROG = BRW_DATA_GS_WM_PROG,
383 BRW_SAMPLER_DEFAULT_COLOR = BRW_DATA_GS_SAMPLER_DEFAULT_COLOR,
384 BRW_SAMPLER = BRW_DATA_GS_SAMPLER,
385 BRW_WM_UNIT = BRW_DATA_GS_WM_UNIT,
386 BRW_SF_PROG = BRW_DATA_GS_SF_PROG,
387 BRW_SF_VP = BRW_DATA_GS_SF_VP,
388 BRW_SF_UNIT = BRW_DATA_GS_SF_UNIT,
389 BRW_VS_UNIT = BRW_DATA_GS_VS_UNIT,
390 BRW_VS_PROG = BRW_DATA_GS_VS_PROG,
391 BRW_GS_UNIT = BRW_DATA_GS_GS_UNIT,
392 BRW_GS_PROG = BRW_DATA_GS_GS_PROG,
393 BRW_CLIP_VP = BRW_DATA_GS_CLIP_VP,
394 BRW_CLIP_UNIT = BRW_DATA_GS_CLIP_UNIT,
395 BRW_CLIP_PROG = BRW_DATA_GS_CLIP_PROG,
396 BRW_SS_SURFACE = BRW_DATA_SS_SURFACE,
397 BRW_SS_SURF_BIND = BRW_DATA_SS_SURF_BIND,
398
399 BRW_MAX_CACHE
400 };
401
402 struct brw_cache_item {
403 /**
404 * Effectively part of the key, cache_id identifies what kind of state
405 * buffer is involved, and also which brw->state.dirty.cache flag should
406 * be set when this cache item is chosen.
407 */
408 enum brw_cache_id cache_id;
409 /** 32-bit hash of the key data */
410 GLuint hash;
411 GLuint key_size; /* for variable-sized keys */
412 const void *key;
413 struct brw_winsys_reloc *relocs;
414 GLuint nr_relocs;
415
416 struct brw_winsys_buffer *bo;
417 GLuint data_size;
418
419 struct brw_cache_item *next;
420 };
421
422
423
424 struct brw_cache {
425 struct brw_context *brw;
426 struct brw_winsys_screen *sws;
427
428 struct brw_cache_item **items;
429 GLuint size, n_items;
430
431 enum brw_buffer_type buffer_type;
432
433 GLuint key_size[BRW_MAX_CACHE]; /* for fixed-size keys */
434 GLuint aux_size[BRW_MAX_CACHE];
435 char *name[BRW_MAX_CACHE];
436
437
438 /* Record of the last BOs chosen for each cache_id. Used to set
439 * brw->state.dirty.cache when a new cache item is chosen.
440 */
441 struct brw_winsys_buffer *last_bo[BRW_MAX_CACHE];
442 };
443
444
445 struct brw_tracked_state {
446 struct brw_state_flags dirty;
447 int (*prepare)( struct brw_context *brw );
448 int (*emit)( struct brw_context *brw );
449 };
450
451 /* Flags for brw->state.cache.
452 */
453 #define CACHE_NEW_CC_VP (1<<BRW_CC_VP)
454 #define CACHE_NEW_CC_UNIT (1<<BRW_CC_UNIT)
455 #define CACHE_NEW_WM_PROG (1<<BRW_WM_PROG)
456 #define CACHE_NEW_SAMPLER_DEFAULT_COLOR (1<<BRW_SAMPLER_DEFAULT_COLOR)
457 #define CACHE_NEW_SAMPLER (1<<BRW_SAMPLER)
458 #define CACHE_NEW_WM_UNIT (1<<BRW_WM_UNIT)
459 #define CACHE_NEW_SF_PROG (1<<BRW_SF_PROG)
460 #define CACHE_NEW_SF_VP (1<<BRW_SF_VP)
461 #define CACHE_NEW_SF_UNIT (1<<BRW_SF_UNIT)
462 #define CACHE_NEW_VS_UNIT (1<<BRW_VS_UNIT)
463 #define CACHE_NEW_VS_PROG (1<<BRW_VS_PROG)
464 #define CACHE_NEW_GS_UNIT (1<<BRW_GS_UNIT)
465 #define CACHE_NEW_GS_PROG (1<<BRW_GS_PROG)
466 #define CACHE_NEW_CLIP_VP (1<<BRW_CLIP_VP)
467 #define CACHE_NEW_CLIP_UNIT (1<<BRW_CLIP_UNIT)
468 #define CACHE_NEW_CLIP_PROG (1<<BRW_CLIP_PROG)
469 #define CACHE_NEW_SURFACE (1<<BRW_SS_SURFACE)
470 #define CACHE_NEW_SURF_BIND (1<<BRW_SS_SURF_BIND)
471
472 struct brw_cached_batch_item {
473 struct header *header;
474 GLuint sz;
475 struct brw_cached_batch_item *next;
476 };
477
478
479
480 /* Protect against a future where VERT_ATTRIB_MAX > 32. Wouldn't life
481 * be easier if C allowed arrays of packed elements?
482 */
483 #define VS_INPUT_BITMASK_DWORDS ((PIPE_MAX_SHADER_INPUTS+31)/32)
484
485
486
487
488 struct brw_vertex_info {
489 GLuint sizes[VS_INPUT_BITMASK_DWORDS * 2]; /* sizes:2[VERT_ATTRIB_MAX] */
490 };
491
492
493 struct brw_query_object {
494 /** Doubly linked list of active query objects in the context. */
495 struct brw_query_object *prev, *next;
496
497 /** Last query BO associated with this query. */
498 struct brw_winsys_buffer *bo;
499 /** First index in bo with query data for this object. */
500 int first_index;
501 /** Last index in bo with query data for this object. */
502 int last_index;
503
504 /* Total count of pixels from previous BOs */
505 uint64_t result;
506 };
507
508 #define CC_RELOC_VP 0
509
510
511 /**
512 * brw_context is derived from pipe_context
513 */
514 struct brw_context
515 {
516 struct pipe_context base;
517 struct brw_chipset chipset;
518
519 struct brw_winsys_screen *sws;
520
521 struct brw_batchbuffer *batch;
522
523 GLuint primitive;
524 GLuint reduced_primitive;
525
526 /* Active state from the state tracker:
527 */
528 struct {
529 struct brw_vertex_shader *vertex_shader;
530 struct brw_fragment_shader *fragment_shader;
531 const struct brw_blend_state *blend;
532 const struct brw_rasterizer_state *rast;
533 const struct brw_depth_stencil_state *zstencil;
534
535 const struct brw_sampler *sampler[PIPE_MAX_SAMPLERS];
536 unsigned num_samplers;
537
538 struct pipe_texture *texture[PIPE_MAX_SAMPLERS];
539 struct pipe_vertex_buffer vertex_buffer[PIPE_MAX_ATTRIBS];
540 struct pipe_vertex_element vertex_element[PIPE_MAX_ATTRIBS];
541 unsigned num_vertex_elements;
542 unsigned num_textures;
543 unsigned num_vertex_buffers;
544
545 struct pipe_scissor_state scissor;
546 struct pipe_viewport_state viewport;
547 struct pipe_framebuffer_state fb;
548 struct pipe_clip_state ucp;
549 struct pipe_buffer *vertex_constants;
550 struct pipe_buffer *fragment_constants;
551
552 struct brw_blend_constant_color bcc;
553 struct brw_polygon_stipple bps;
554 struct brw_cc_viewport ccv;
555
556 /**
557 * Index buffer for this draw_prims call.
558 *
559 * Updates are signaled by PIPE_NEW_INDEX_BUFFER.
560 */
561 struct pipe_buffer *index_buffer;
562 unsigned index_size;
563
564 /* Updates are signalled by PIPE_NEW_INDEX_RANGE:
565 */
566 unsigned min_index;
567 unsigned max_index;
568
569 } curr;
570
571 struct {
572 struct brw_state_flags dirty;
573
574 /**
575 * List of buffers accumulated in brw_validate_state to receive
576 * dri_bo_check_aperture treatment before exec, so we can know if we
577 * should flush the batch and try again before emitting primitives.
578 *
579 * This can be a fixed number as we only have a limited number of
580 * objects referenced from the batchbuffer in a primitive emit,
581 * consisting of the vertex buffers, pipelined state pointers,
582 * the CURBE, the depth buffer, and a query BO.
583 */
584 struct brw_winsys_buffer *validated_bos[PIPE_MAX_SHADER_INPUTS + 16];
585 int validated_bo_count;
586 } state;
587
588 struct brw_cache cache; /** non-surface items */
589 struct brw_cache surface_cache; /* surface items */
590 struct brw_cached_batch_item *cached_batch_items;
591
592 struct {
593 struct u_upload_mgr *upload_vertex;
594 struct u_upload_mgr *upload_index;
595
596 /* Information on uploaded vertex buffers:
597 */
598 struct {
599 unsigned stride; /* in bytes between successive vertices */
600 unsigned offset; /* in bytes, of first vertex in bo */
601 unsigned vertex_count; /* count of valid vertices which may be accessed */
602 struct brw_winsys_buffer *bo;
603 } vb[PIPE_MAX_ATTRIBS];
604
605 unsigned nr_vb; /* currently the same as curr.num_vertex_buffers */
606 } vb;
607
608 struct {
609 /* Updates to these fields are signaled by BRW_NEW_INDEX_BUFFER. */
610 struct brw_winsys_buffer *bo;
611 unsigned int offset;
612 unsigned int size;
613 /* Offset to index buffer index to use in CMD_3D_PRIM so that we can
614 * avoid re-uploading the IB packet over and over if we're actually
615 * referencing the same index buffer.
616 */
617 unsigned int start_vertex_offset;
618 } ib;
619
620
621 /* BRW_NEW_URB_ALLOCATIONS:
622 */
623 struct {
624 GLuint vsize; /* vertex size plus header in urb registers */
625 GLuint csize; /* constant buffer size in urb registers */
626 GLuint sfsize; /* setup data size in urb registers */
627
628 GLboolean constrained;
629
630 GLuint nr_vs_entries;
631 GLuint nr_gs_entries;
632 GLuint nr_clip_entries;
633 GLuint nr_sf_entries;
634 GLuint nr_cs_entries;
635
636 GLuint vs_start;
637 GLuint gs_start;
638 GLuint clip_start;
639 GLuint sf_start;
640 GLuint cs_start;
641 } urb;
642
643
644 /* BRW_NEW_CURBE_OFFSETS:
645 */
646 struct {
647 GLuint wm_start; /**< pos of first wm const in CURBE buffer */
648 GLuint wm_size; /**< number of float[4] consts, multiple of 16 */
649 GLuint clip_start;
650 GLuint clip_size;
651 GLuint vs_start;
652 GLuint vs_size;
653 GLuint total_size;
654
655 struct brw_winsys_buffer *curbe_bo;
656 /** Offset within curbe_bo of space for current curbe entry */
657 GLuint curbe_offset;
658 /** Offset within curbe_bo of space for next curbe entry */
659 GLuint curbe_next_offset;
660
661 GLfloat *last_buf;
662 GLuint last_bufsz;
663 /**
664 * Whether we should create a new bo instead of reusing the old one
665 * (if we just dispatch the batch pointing at the old one.
666 */
667 GLboolean need_new_bo;
668 } curbe;
669
670 struct {
671 struct brw_vs_prog_data *prog_data;
672
673 struct brw_winsys_buffer *prog_bo;
674 struct brw_winsys_buffer *state_bo;
675
676 /** Binding table of pointers to surf_bo entries */
677 struct brw_winsys_buffer *bind_bo;
678 struct brw_winsys_buffer *surf_bo[BRW_VS_MAX_SURF];
679 GLuint nr_surfaces;
680 } vs;
681
682 struct {
683 struct brw_gs_prog_data *prog_data;
684
685 GLboolean prog_active;
686 struct brw_winsys_buffer *prog_bo;
687 struct brw_winsys_buffer *state_bo;
688 } gs;
689
690 struct {
691 struct brw_clip_prog_data *prog_data;
692
693 struct brw_winsys_buffer *prog_bo;
694 struct brw_winsys_buffer *state_bo;
695 struct brw_winsys_buffer *vp_bo;
696 } clip;
697
698
699 struct {
700 struct brw_sf_prog_data *prog_data;
701
702 struct brw_winsys_buffer *prog_bo;
703 struct brw_winsys_buffer *state_bo;
704 struct brw_winsys_buffer *vp_bo;
705 } sf;
706
707 struct {
708 struct brw_wm_prog_data *prog_data;
709 struct brw_wm_compile *compile_data;
710
711 /** Input sizes, calculated from active vertex program.
712 * One bit per fragment program input attribute.
713 */
714 //GLbitfield input_size_masks[4];
715
716 /** Array of surface default colors (texture border color) */
717 struct brw_winsys_buffer *sdc_bo[BRW_MAX_TEX_UNIT];
718
719 GLuint render_surf;
720 GLuint nr_surfaces;
721
722 GLuint max_threads;
723 struct brw_winsys_buffer *scratch_bo;
724
725 GLuint sampler_count;
726 struct brw_winsys_buffer *sampler_bo;
727
728 /** Binding table of pointers to surf_bo entries */
729 struct brw_winsys_buffer *bind_bo;
730 struct brw_winsys_buffer *surf_bo[BRW_WM_MAX_SURF];
731
732 struct brw_winsys_buffer *prog_bo;
733 struct brw_winsys_buffer *state_bo;
734 } wm;
735
736
737 struct {
738 struct brw_winsys_buffer *state_bo;
739
740 struct brw_cc_unit_state cc;
741 struct brw_winsys_reloc reloc[1];
742 } cc;
743
744 struct {
745 struct brw_query_object active_head;
746 struct brw_winsys_buffer *bo;
747 int index;
748 GLboolean active;
749 int stats_wm;
750 } query;
751
752 struct {
753 unsigned always_emit_state:1;
754 unsigned always_flush_batch:1;
755 unsigned force_swtnl:1;
756 unsigned no_swtnl:1;
757 } flags;
758
759 /* Used to give every program string a unique id
760 */
761 GLuint program_id;
762 };
763
764
765
766 /*======================================================================
767 * brw_queryobj.c
768 */
769 void brw_init_query(struct brw_context *brw);
770 enum pipe_error brw_prepare_query_begin(struct brw_context *brw);
771 void brw_emit_query_begin(struct brw_context *brw);
772 void brw_emit_query_end(struct brw_context *brw);
773
774 /*======================================================================
775 * brw_state_dump.c
776 */
777 void brw_debug_batch(struct brw_context *intel);
778
779
780 /*======================================================================
781 * brw_pipe_*.c
782 */
783 void brw_pipe_blend_init( struct brw_context *brw );
784 void brw_pipe_depth_stencil_init( struct brw_context *brw );
785 void brw_pipe_framebuffer_init( struct brw_context *brw );
786 void brw_pipe_flush_init( struct brw_context *brw );
787 void brw_pipe_misc_init( struct brw_context *brw );
788 void brw_pipe_query_init( struct brw_context *brw );
789 void brw_pipe_rast_init( struct brw_context *brw );
790 void brw_pipe_sampler_init( struct brw_context *brw );
791 void brw_pipe_shader_init( struct brw_context *brw );
792 void brw_pipe_vertex_init( struct brw_context *brw );
793 void brw_pipe_clear_init( struct brw_context *brw );
794
795
796 void brw_pipe_blend_cleanup( struct brw_context *brw );
797 void brw_pipe_depth_stencil_cleanup( struct brw_context *brw );
798 void brw_pipe_framebuffer_cleanup( struct brw_context *brw );
799 void brw_pipe_flush_cleanup( struct brw_context *brw );
800 void brw_pipe_misc_cleanup( struct brw_context *brw );
801 void brw_pipe_query_cleanup( struct brw_context *brw );
802 void brw_pipe_rast_cleanup( struct brw_context *brw );
803 void brw_pipe_sampler_cleanup( struct brw_context *brw );
804 void brw_pipe_shader_cleanup( struct brw_context *brw );
805 void brw_pipe_vertex_cleanup( struct brw_context *brw );
806 void brw_pipe_clear_cleanup( struct brw_context *brw );
807
808 void brw_hw_cc_init( struct brw_context *brw );
809 void brw_hw_cc_cleanup( struct brw_context *brw );
810
811
812
813 void brw_context_flush( struct brw_context *brw );
814
815
816 /* brw_urb.c
817 */
818 int brw_upload_urb_fence(struct brw_context *brw);
819
820 /* brw_curbe.c
821 */
822 int brw_upload_cs_urb_state(struct brw_context *brw);
823
824 /* brw_disasm.c */
825 int brw_disasm_insn (FILE *file, const struct brw_instruction *inst);
826 int brw_disasm (FILE *file,
827 const struct brw_instruction *inst,
828 unsigned count);
829
830 /*======================================================================
831 * Inline conversion functions. These are better-typed than the
832 * macros used previously:
833 */
834 static INLINE struct brw_context *
835 brw_context( struct pipe_context *ctx )
836 {
837 return (struct brw_context *)ctx;
838 }
839
840
841 #define BRW_IS_965(brw) ((brw)->chipset.is_965)
842 #define BRW_IS_IGDNG(brw) ((brw)->chipset.is_igdng)
843 #define BRW_IS_G4X(brw) ((brw)->chipset.is_g4x)
844
845
846 #endif
847