i965g: don't set up vs stack register for non-branching shaders
[mesa.git] / src / gallium / drivers / i965 / brw_context.h
1 /*
2 Copyright (C) Intel Corp. 2006. All Rights Reserved.
3 Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
4 develop this 3D driver.
5
6 Permission is hereby granted, free of charge, to any person obtaining
7 a copy of this software and associated documentation files (the
8 "Software"), to deal in the Software without restriction, including
9 without limitation the rights to use, copy, modify, merge, publish,
10 distribute, sublicense, and/or sell copies of the Software, and to
11 permit persons to whom the Software is furnished to do so, subject to
12 the following conditions:
13
14 The above copyright notice and this permission notice (including the
15 next paragraph) shall be included in all copies or substantial
16 portions of the Software.
17
18 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
19 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
21 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
22 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
23 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
24 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25
26 **********************************************************************/
27 /*
28 * Authors:
29 * Keith Whitwell <keith@tungstengraphics.com>
30 */
31
32
33 #ifndef BRWCONTEXT_INC
34 #define BRWCONTEXT_INC
35
36 #include "brw_structs.h"
37 #include "brw_winsys.h"
38 #include "brw_reg.h"
39 #include "pipe/p_state.h"
40 #include "pipe/p_context.h"
41 #include "tgsi/tgsi_scan.h"
42
43
44 /* Glossary:
45 *
46 * URB - uniform resource buffer. A mid-sized buffer which is
47 * partitioned between the fixed function units and used for passing
48 * values (vertices, primitives, constants) between them.
49 *
50 * CURBE - constant URB entry. An urb region (entry) used to hold
51 * constant values which the fixed function units can be instructed to
52 * preload into the GRF when spawning a thread.
53 *
54 * VUE - vertex URB entry. An urb entry holding a vertex and usually
55 * a vertex header. The header contains control information and
56 * things like primitive type, Begin/end flags and clip codes.
57 *
58 * PUE - primitive URB entry. An urb entry produced by the setup (SF)
59 * unit holding rasterization and interpolation parameters.
60 *
61 * GRF - general register file. One of several register files
62 * addressable by programmed threads. The inputs (r0, payload, curbe,
63 * urb) of the thread are preloaded to this area before the thread is
64 * spawned. The registers are individually 8 dwords wide and suitable
65 * for general usage. Registers holding thread input values are not
66 * special and may be overwritten.
67 *
68 * MRF - message register file. Threads communicate (and terminate)
69 * by sending messages. Message parameters are placed in contiguous
70 * MRF registers. All program output is via these messages. URB
71 * entries are populated by sending a message to the shared URB
72 * function containing the new data, together with a control word,
73 * often an unmodified copy of R0.
74 *
75 * R0 - GRF register 0. Typically holds control information used when
76 * sending messages to other threads.
77 *
78 * EU or GEN4 EU: The name of the programmable subsystem of the
79 * i965 hardware. Threads are executed by the EU, the registers
80 * described above are part of the EU architecture.
81 *
82 * Fixed function units:
83 *
84 * CS - Command streamer. Notional first unit, little software
85 * interaction. Holds the URB entries used for constant data, ie the
86 * CURBEs.
87 *
88 * VF/VS - Vertex Fetch / Vertex Shader. The fixed function part of
89 * this unit is responsible for pulling vertices out of vertex buffers
90 * in vram and injecting them into the processing pipe as VUEs. If
91 * enabled, it first passes them to a VS thread which is a good place
92 * for the driver to implement any active vertex shader.
93 *
94 * GS - Geometry Shader. This corresponds to a new DX10 concept. If
95 * enabled, incoming strips etc are passed to GS threads in individual
96 * line/triangle/point units. The GS thread may perform arbitary
97 * computation and emit whatever primtives with whatever vertices it
98 * chooses. This makes GS an excellent place to implement GL's
99 * unfilled polygon modes, though of course it is capable of much
100 * more. Additionally, GS is used to translate away primitives not
101 * handled by latter units, including Quads and Lineloops.
102 *
103 * CS - Clipper. Mesa's clipping algorithms are imported to run on
104 * this unit. The fixed function part performs cliptesting against
105 * the 6 fixed clipplanes and makes decisions on whether or not the
106 * incoming primitive needs to be passed to a thread for clipping.
107 * User clip planes are handled via cooperation with the VS thread.
108 *
109 * SF - Strips Fans or Setup: Triangles are prepared for
110 * rasterization. Interpolation coefficients are calculated.
111 * Flatshading and two-side lighting usually performed here.
112 *
113 * WM - Windower. Interpolation of vertex attributes performed here.
114 * Fragment shader implemented here. SIMD aspects of EU taken full
115 * advantage of, as pixels are processed in blocks of 16.
116 *
117 * CC - Color Calculator. No EU threads associated with this unit.
118 * Handles blending and (presumably) depth and stencil testing.
119 */
120
121 #define BRW_MAX_CURBE (32*16)
122
123 struct brw_context;
124
125 struct brw_depth_stencil_state {
126 /* Precalculated hardware state:
127 */
128 struct brw_cc0 cc0;
129 struct brw_cc1 cc1;
130 struct brw_cc2 cc2;
131 struct brw_cc3 cc3;
132 struct brw_cc7 cc7;
133
134 unsigned iz_lookup;
135 };
136
137
138 struct brw_blend_state {
139 /* Precalculated hardware state:
140 */
141 struct brw_cc2 cc2;
142 struct brw_cc3 cc3;
143 struct brw_cc5 cc5;
144 struct brw_cc6 cc6;
145
146 struct brw_surf_ss0 ss0;
147 };
148
149
150 struct brw_rasterizer_state;
151
152
153 struct brw_vertex_shader {
154 const struct tgsi_token *tokens;
155 struct tgsi_shader_info info;
156
157 unsigned has_flow_control:1;
158
159 unsigned id;
160 struct brw_winsys_buffer *const_buffer; /** Program constant buffer/surface */
161 GLboolean use_const_buffer;
162 };
163
164
165 struct brw_fragment_shader {
166 const struct tgsi_token *tokens;
167 struct tgsi_shader_info info;
168
169 unsigned iz_lookup;
170 //unsigned wm_lookup;
171
172 unsigned uses_depth:1;
173 unsigned has_flow_control:1;
174
175 unsigned id;
176 struct brw_winsys_buffer *const_buffer; /** Program constant buffer/surface */
177 GLboolean use_const_buffer;
178 };
179
180
181 struct brw_sampler {
182 float border_color[4];
183 struct brw_ss0 ss0;
184 struct brw_ss1 ss1;
185 struct brw_ss3 ss3;
186 };
187
188
189
190 #define PIPE_NEW_DEPTH_STENCIL_ALPHA 0x1
191 #define PIPE_NEW_RAST 0x2
192 #define PIPE_NEW_BLEND 0x4
193 #define PIPE_NEW_VIEWPORT 0x8
194 #define PIPE_NEW_SAMPLERS 0x10
195 #define PIPE_NEW_VERTEX_BUFFER 0x20
196 #define PIPE_NEW_VERTEX_ELEMENT 0x40
197 #define PIPE_NEW_FRAGMENT_SHADER 0x80
198 #define PIPE_NEW_VERTEX_SHADER 0x100
199 #define PIPE_NEW_FRAGMENT_CONSTANTS 0x200
200 #define PIPE_NEW_VERTEX_CONSTANTS 0x400
201 #define PIPE_NEW_CLIP 0x800
202 #define PIPE_NEW_INDEX_BUFFER 0x1000
203 #define PIPE_NEW_INDEX_RANGE 0x2000
204 #define PIPE_NEW_BLEND_COLOR 0x4000
205 #define PIPE_NEW_POLYGON_STIPPLE 0x8000
206 #define PIPE_NEW_FRAMEBUFFER_DIMENSIONS 0x10000
207 #define PIPE_NEW_DEPTH_BUFFER 0x20000
208 #define PIPE_NEW_COLOR_BUFFERS 0x40000
209 #define PIPE_NEW_QUERY 0x80000
210 #define PIPE_NEW_SCISSOR 0x100000
211 #define PIPE_NEW_BOUND_TEXTURES 0x200000
212
213
214
215 #define BRW_NEW_URB_FENCE 0x1
216 #define BRW_NEW_FRAGMENT_PROGRAM 0x2
217 #define BRW_NEW_VERTEX_PROGRAM 0x4
218 #define BRW_NEW_INPUT_DIMENSIONS 0x8
219 #define BRW_NEW_CURBE_OFFSETS 0x10
220 #define BRW_NEW_REDUCED_PRIMITIVE 0x20
221 #define BRW_NEW_PRIMITIVE 0x40
222 #define BRW_NEW_CONTEXT 0x80
223 #define BRW_NEW_WM_INPUT_DIMENSIONS 0x100
224 #define BRW_NEW_PSP 0x800
225 #define BRW_NEW_WM_SURFACES 0x1000
226 #define BRW_NEW_xxx 0x2000 /* was FENCE */
227 #define BRW_NEW_INDICES 0x4000
228 #define BRW_NEW_VERTICES 0x8000
229 /**
230 * Used for any batch entry with a relocated pointer that will be used
231 * by any 3D rendering. Need to re-emit these fresh in each
232 * batchbuffer as the referenced buffers may be relocated in the
233 * meantime.
234 */
235 #define BRW_NEW_BATCH 0x10000
236 #define BRW_NEW_NR_WM_SURFACES 0x40000
237 #define BRW_NEW_NR_VS_SURFACES 0x80000
238 #define BRW_NEW_INDEX_BUFFER 0x100000
239
240 struct brw_state_flags {
241 /** State update flags signalled by mesa internals */
242 GLuint mesa;
243 /**
244 * State update flags signalled as the result of brw_tracked_state updates
245 */
246 GLuint brw;
247 /** State update flags signalled by brw_state_cache.c searches */
248 GLuint cache;
249 };
250
251
252
253 /* Data about a particular attempt to compile a program. Note that
254 * there can be many of these, each in a different GL state
255 * corresponding to a different brw_wm_prog_key struct, with different
256 * compiled programs:
257 */
258 struct brw_wm_prog_data {
259 GLuint curb_read_length;
260 GLuint urb_read_length;
261
262 GLuint first_curbe_grf;
263 GLuint total_grf;
264 GLuint total_scratch;
265
266 GLuint nr_params; /**< number of float params/constants */
267 GLboolean error;
268
269 /* Pointer to tracked values (only valid once
270 * _mesa_load_state_parameters has been called at runtime).
271 */
272 const GLfloat *param[BRW_MAX_CURBE];
273 };
274
275 struct brw_sf_prog_data {
276 GLuint urb_read_length;
277 GLuint total_grf;
278
279 /* Each vertex may have upto 12 attributes, 4 components each,
280 * except WPOS which requires only 2. (11*4 + 2) == 44 ==> 11
281 * rows.
282 *
283 * Actually we use 4 for each, so call it 12 rows.
284 */
285 GLuint urb_entry_size;
286 };
287
288
289 struct brw_clip_prog_data;
290
291 struct brw_gs_prog_data {
292 GLuint urb_read_length;
293 GLuint total_grf;
294 };
295
296 struct brw_vs_prog_data {
297 GLuint curb_read_length;
298 GLuint urb_read_length;
299 GLuint total_grf;
300
301 GLuint nr_outputs;
302 GLuint nr_inputs;
303
304 GLuint nr_params; /**< number of TGSI_FILE_CONSTANT's */
305
306 GLboolean copy_edgeflag;
307 GLboolean writes_psiz;
308
309 /* Used for calculating urb partitions:
310 */
311 GLuint urb_entry_size;
312 };
313
314
315 /* Size == 0 if output either not written, or always [0,0,0,1]
316 */
317 struct brw_vs_ouput_sizes {
318 GLubyte output_size[PIPE_MAX_SHADER_OUTPUTS];
319 };
320
321
322 /** Number of texture sampler units */
323 #define BRW_MAX_TEX_UNIT 16
324
325 /**
326 * Size of our surface binding table for the WM.
327 * This contains pointers to the drawing surfaces and current texture
328 * objects and shader constant buffers (+2).
329 */
330 #define BRW_WM_MAX_SURF (PIPE_MAX_COLOR_BUFS + BRW_MAX_TEX_UNIT + 1)
331
332 /**
333 * Helpers to convert drawing buffers, textures and constant buffers
334 * to surface binding table indexes, for WM.
335 */
336 #define SURF_INDEX_DRAW(d) (d)
337 #define SURF_INDEX_FRAG_CONST_BUFFER (PIPE_MAX_COLOR_BUFS)
338 #define SURF_INDEX_TEXTURE(t) (PIPE_MAX_COLOR_BUFS + 1 + (t))
339
340 /**
341 * Size of surface binding table for the VS.
342 * Only one constant buffer for now.
343 */
344 #define BRW_VS_MAX_SURF 1
345
346 /**
347 * Only a VS constant buffer
348 */
349 #define SURF_INDEX_VERT_CONST_BUFFER 0
350
351
352 /* Bit of a hack to align these with the winsys buffer_data_type enum.
353 */
354 enum brw_cache_id {
355 BRW_CC_VP = BRW_DATA_GS_CC_VP,
356 BRW_CC_UNIT = BRW_DATA_GS_CC_UNIT,
357 BRW_WM_PROG = BRW_DATA_GS_WM_PROG,
358 BRW_SAMPLER_DEFAULT_COLOR = BRW_DATA_GS_SAMPLER_DEFAULT_COLOR,
359 BRW_SAMPLER = BRW_DATA_GS_SAMPLER,
360 BRW_WM_UNIT = BRW_DATA_GS_WM_UNIT,
361 BRW_SF_PROG = BRW_DATA_GS_SF_PROG,
362 BRW_SF_VP = BRW_DATA_GS_SF_VP,
363 BRW_SF_UNIT = BRW_DATA_GS_SF_UNIT,
364 BRW_VS_UNIT = BRW_DATA_GS_VS_UNIT,
365 BRW_VS_PROG = BRW_DATA_GS_VS_PROG,
366 BRW_GS_UNIT = BRW_DATA_GS_GS_UNIT,
367 BRW_GS_PROG = BRW_DATA_GS_GS_PROG,
368 BRW_CLIP_VP = BRW_DATA_GS_CLIP_VP,
369 BRW_CLIP_UNIT = BRW_DATA_GS_CLIP_UNIT,
370 BRW_CLIP_PROG = BRW_DATA_GS_CLIP_PROG,
371 BRW_SS_SURFACE = BRW_DATA_SS_SURFACE,
372 BRW_SS_SURF_BIND = BRW_DATA_SS_SURF_BIND,
373
374 BRW_MAX_CACHE
375 };
376
377 struct brw_cache_item {
378 /**
379 * Effectively part of the key, cache_id identifies what kind of state
380 * buffer is involved, and also which brw->state.dirty.cache flag should
381 * be set when this cache item is chosen.
382 */
383 enum brw_cache_id cache_id;
384 /** 32-bit hash of the key data */
385 GLuint hash;
386 GLuint key_size; /* for variable-sized keys */
387 const void *key;
388 struct brw_winsys_reloc *relocs;
389 GLuint nr_relocs;
390
391 struct brw_winsys_buffer *bo;
392 GLuint data_size;
393
394 struct brw_cache_item *next;
395 };
396
397
398
399 struct brw_cache {
400 struct brw_context *brw;
401 struct brw_winsys_screen *sws;
402
403 struct brw_cache_item **items;
404 GLuint size, n_items;
405
406 enum brw_buffer_type buffer_type;
407
408 GLuint key_size[BRW_MAX_CACHE]; /* for fixed-size keys */
409 GLuint aux_size[BRW_MAX_CACHE];
410 char *name[BRW_MAX_CACHE];
411
412
413 /* Record of the last BOs chosen for each cache_id. Used to set
414 * brw->state.dirty.cache when a new cache item is chosen.
415 */
416 struct brw_winsys_buffer *last_bo[BRW_MAX_CACHE];
417 };
418
419
420 struct brw_tracked_state {
421 struct brw_state_flags dirty;
422 int (*prepare)( struct brw_context *brw );
423 int (*emit)( struct brw_context *brw );
424 };
425
426 /* Flags for brw->state.cache.
427 */
428 #define CACHE_NEW_CC_VP (1<<BRW_CC_VP)
429 #define CACHE_NEW_CC_UNIT (1<<BRW_CC_UNIT)
430 #define CACHE_NEW_WM_PROG (1<<BRW_WM_PROG)
431 #define CACHE_NEW_SAMPLER_DEFAULT_COLOR (1<<BRW_SAMPLER_DEFAULT_COLOR)
432 #define CACHE_NEW_SAMPLER (1<<BRW_SAMPLER)
433 #define CACHE_NEW_WM_UNIT (1<<BRW_WM_UNIT)
434 #define CACHE_NEW_SF_PROG (1<<BRW_SF_PROG)
435 #define CACHE_NEW_SF_VP (1<<BRW_SF_VP)
436 #define CACHE_NEW_SF_UNIT (1<<BRW_SF_UNIT)
437 #define CACHE_NEW_VS_UNIT (1<<BRW_VS_UNIT)
438 #define CACHE_NEW_VS_PROG (1<<BRW_VS_PROG)
439 #define CACHE_NEW_GS_UNIT (1<<BRW_GS_UNIT)
440 #define CACHE_NEW_GS_PROG (1<<BRW_GS_PROG)
441 #define CACHE_NEW_CLIP_VP (1<<BRW_CLIP_VP)
442 #define CACHE_NEW_CLIP_UNIT (1<<BRW_CLIP_UNIT)
443 #define CACHE_NEW_CLIP_PROG (1<<BRW_CLIP_PROG)
444 #define CACHE_NEW_SURFACE (1<<BRW_SS_SURFACE)
445 #define CACHE_NEW_SURF_BIND (1<<BRW_SS_SURF_BIND)
446
447 struct brw_cached_batch_item {
448 struct header *header;
449 GLuint sz;
450 struct brw_cached_batch_item *next;
451 };
452
453
454
455 /* Protect against a future where VERT_ATTRIB_MAX > 32. Wouldn't life
456 * be easier if C allowed arrays of packed elements?
457 */
458 #define VS_INPUT_BITMASK_DWORDS ((PIPE_MAX_SHADER_INPUTS+31)/32)
459
460
461
462
463 struct brw_vertex_info {
464 GLuint sizes[VS_INPUT_BITMASK_DWORDS * 2]; /* sizes:2[VERT_ATTRIB_MAX] */
465 };
466
467
468 struct brw_query_object {
469 /** Doubly linked list of active query objects in the context. */
470 struct brw_query_object *prev, *next;
471
472 /** Last query BO associated with this query. */
473 struct brw_winsys_buffer *bo;
474 /** First index in bo with query data for this object. */
475 int first_index;
476 /** Last index in bo with query data for this object. */
477 int last_index;
478
479 /* Total count of pixels from previous BOs */
480 uint64_t result;
481 };
482
483
484 /**
485 * brw_context is derived from pipe_context
486 */
487 struct brw_context
488 {
489 struct pipe_context base;
490 struct brw_chipset chipset;
491
492 struct brw_winsys_screen *sws;
493
494 struct brw_batchbuffer *batch;
495
496 GLuint primitive;
497 GLuint reduced_primitive;
498
499 /* Active state from the state tracker:
500 */
501 struct {
502 struct brw_vertex_shader *vertex_shader;
503 struct brw_fragment_shader *fragment_shader;
504 const struct brw_blend_state *blend;
505 const struct brw_rasterizer_state *rast;
506 const struct brw_depth_stencil_state *zstencil;
507
508 const struct brw_sampler *sampler[PIPE_MAX_SAMPLERS];
509 unsigned num_samplers;
510
511 struct pipe_texture *texture[PIPE_MAX_SAMPLERS];
512 struct pipe_vertex_buffer vertex_buffer[PIPE_MAX_ATTRIBS];
513 struct pipe_vertex_element vertex_element[PIPE_MAX_ATTRIBS];
514 unsigned num_vertex_elements;
515 unsigned num_textures;
516 unsigned num_vertex_buffers;
517
518 struct pipe_scissor_state scissor;
519 struct pipe_viewport_state viewport;
520 struct pipe_framebuffer_state fb;
521 struct pipe_clip_state ucp;
522 struct pipe_buffer *vertex_constants;
523 struct pipe_buffer *fragment_constants;
524
525 struct brw_blend_constant_color bcc;
526 struct brw_polygon_stipple bps;
527
528 /**
529 * Index buffer for this draw_prims call.
530 *
531 * Updates are signaled by PIPE_NEW_INDEX_BUFFER.
532 */
533 struct pipe_buffer *index_buffer;
534 unsigned index_size;
535
536 /* Updates are signalled by PIPE_NEW_INDEX_RANGE:
537 */
538 unsigned min_index;
539 unsigned max_index;
540
541 } curr;
542
543 struct {
544 struct brw_state_flags dirty;
545
546 /**
547 * List of buffers accumulated in brw_validate_state to receive
548 * dri_bo_check_aperture treatment before exec, so we can know if we
549 * should flush the batch and try again before emitting primitives.
550 *
551 * This can be a fixed number as we only have a limited number of
552 * objects referenced from the batchbuffer in a primitive emit,
553 * consisting of the vertex buffers, pipelined state pointers,
554 * the CURBE, the depth buffer, and a query BO.
555 */
556 struct brw_winsys_buffer *validated_bos[PIPE_MAX_SHADER_INPUTS + 16];
557 int validated_bo_count;
558 } state;
559
560 struct brw_cache cache; /** non-surface items */
561 struct brw_cache surface_cache; /* surface items */
562 struct brw_cached_batch_item *cached_batch_items;
563
564 struct {
565 struct u_upload_mgr *upload_vertex;
566 struct u_upload_mgr *upload_index;
567
568 /* Information on uploaded vertex buffers:
569 */
570 struct {
571 unsigned stride; /* in bytes between successive vertices */
572 unsigned offset; /* in bytes, of first vertex in bo */
573 unsigned vertex_count; /* count of valid vertices which may be accessed */
574 struct brw_winsys_buffer *bo;
575 } vb[PIPE_MAX_ATTRIBS];
576
577 unsigned nr_vb; /* currently the same as curr.num_vertex_buffers */
578 } vb;
579
580 struct {
581 /* Updates to these fields are signaled by BRW_NEW_INDEX_BUFFER. */
582 struct brw_winsys_buffer *bo;
583 unsigned int offset;
584 unsigned int size;
585 /* Offset to index buffer index to use in CMD_3D_PRIM so that we can
586 * avoid re-uploading the IB packet over and over if we're actually
587 * referencing the same index buffer.
588 */
589 unsigned int start_vertex_offset;
590 } ib;
591
592
593 /* BRW_NEW_URB_ALLOCATIONS:
594 */
595 struct {
596 GLuint vsize; /* vertex size plus header in urb registers */
597 GLuint csize; /* constant buffer size in urb registers */
598 GLuint sfsize; /* setup data size in urb registers */
599
600 GLboolean constrained;
601
602 GLuint nr_vs_entries;
603 GLuint nr_gs_entries;
604 GLuint nr_clip_entries;
605 GLuint nr_sf_entries;
606 GLuint nr_cs_entries;
607
608 GLuint vs_start;
609 GLuint gs_start;
610 GLuint clip_start;
611 GLuint sf_start;
612 GLuint cs_start;
613 } urb;
614
615
616 /* BRW_NEW_CURBE_OFFSETS:
617 */
618 struct {
619 GLuint wm_start; /**< pos of first wm const in CURBE buffer */
620 GLuint wm_size; /**< number of float[4] consts, multiple of 16 */
621 GLuint clip_start;
622 GLuint clip_size;
623 GLuint vs_start;
624 GLuint vs_size;
625 GLuint total_size;
626
627 struct brw_winsys_buffer *curbe_bo;
628 /** Offset within curbe_bo of space for current curbe entry */
629 GLuint curbe_offset;
630 /** Offset within curbe_bo of space for next curbe entry */
631 GLuint curbe_next_offset;
632
633 GLfloat *last_buf;
634 GLuint last_bufsz;
635 /**
636 * Whether we should create a new bo instead of reusing the old one
637 * (if we just dispatch the batch pointing at the old one.
638 */
639 GLboolean need_new_bo;
640 } curbe;
641
642 struct {
643 struct brw_vs_prog_data *prog_data;
644
645 struct brw_winsys_buffer *prog_bo;
646 struct brw_winsys_buffer *state_bo;
647
648 /** Binding table of pointers to surf_bo entries */
649 struct brw_winsys_buffer *bind_bo;
650 struct brw_winsys_buffer *surf_bo[BRW_VS_MAX_SURF];
651 GLuint nr_surfaces;
652 } vs;
653
654 struct {
655 struct brw_gs_prog_data *prog_data;
656
657 GLboolean prog_active;
658 struct brw_winsys_buffer *prog_bo;
659 struct brw_winsys_buffer *state_bo;
660 } gs;
661
662 struct {
663 struct brw_clip_prog_data *prog_data;
664
665 struct brw_winsys_buffer *prog_bo;
666 struct brw_winsys_buffer *state_bo;
667 struct brw_winsys_buffer *vp_bo;
668 } clip;
669
670
671 struct {
672 struct brw_sf_prog_data *prog_data;
673
674 struct brw_winsys_buffer *prog_bo;
675 struct brw_winsys_buffer *state_bo;
676 struct brw_winsys_buffer *vp_bo;
677 } sf;
678
679 struct {
680 struct brw_wm_prog_data *prog_data;
681 struct brw_wm_compile *compile_data;
682
683 /** Input sizes, calculated from active vertex program.
684 * One bit per fragment program input attribute.
685 */
686 //GLbitfield input_size_masks[4];
687
688 /** Array of surface default colors (texture border color) */
689 struct brw_winsys_buffer *sdc_bo[BRW_MAX_TEX_UNIT];
690
691 GLuint render_surf;
692 GLuint nr_surfaces;
693
694 GLuint max_threads;
695 struct brw_winsys_buffer *scratch_bo;
696
697 GLuint sampler_count;
698 struct brw_winsys_buffer *sampler_bo;
699
700 /** Binding table of pointers to surf_bo entries */
701 struct brw_winsys_buffer *bind_bo;
702 struct brw_winsys_buffer *surf_bo[BRW_WM_MAX_SURF];
703
704 struct brw_winsys_buffer *prog_bo;
705 struct brw_winsys_buffer *state_bo;
706 } wm;
707
708
709 struct {
710 struct brw_winsys_buffer *prog_bo;
711 struct brw_winsys_buffer *state_bo;
712 struct brw_winsys_buffer *vp_bo;
713 } cc;
714
715 struct {
716 struct brw_query_object active_head;
717 struct brw_winsys_buffer *bo;
718 int index;
719 GLboolean active;
720 int stats_wm;
721 } query;
722
723 struct {
724 unsigned always_emit_state:1;
725 unsigned always_flush_batch:1;
726 unsigned force_swtnl:1;
727 unsigned no_swtnl:1;
728 } flags;
729
730 /* Used to give every program string a unique id
731 */
732 GLuint program_id;
733 };
734
735
736
737 /*======================================================================
738 * brw_queryobj.c
739 */
740 void brw_init_query(struct brw_context *brw);
741 enum pipe_error brw_prepare_query_begin(struct brw_context *brw);
742 void brw_emit_query_begin(struct brw_context *brw);
743 void brw_emit_query_end(struct brw_context *brw);
744
745 /*======================================================================
746 * brw_state_dump.c
747 */
748 void brw_debug_batch(struct brw_context *intel);
749
750
751 /*======================================================================
752 * brw_pipe_*.c
753 */
754 void brw_pipe_blend_init( struct brw_context *brw );
755 void brw_pipe_depth_stencil_init( struct brw_context *brw );
756 void brw_pipe_framebuffer_init( struct brw_context *brw );
757 void brw_pipe_flush_init( struct brw_context *brw );
758 void brw_pipe_misc_init( struct brw_context *brw );
759 void brw_pipe_query_init( struct brw_context *brw );
760 void brw_pipe_rast_init( struct brw_context *brw );
761 void brw_pipe_sampler_init( struct brw_context *brw );
762 void brw_pipe_shader_init( struct brw_context *brw );
763 void brw_pipe_vertex_init( struct brw_context *brw );
764 void brw_pipe_clear_init( struct brw_context *brw );
765
766 void brw_pipe_blend_cleanup( struct brw_context *brw );
767 void brw_pipe_depth_stencil_cleanup( struct brw_context *brw );
768 void brw_pipe_framebuffer_cleanup( struct brw_context *brw );
769 void brw_pipe_flush_cleanup( struct brw_context *brw );
770 void brw_pipe_misc_cleanup( struct brw_context *brw );
771 void brw_pipe_query_cleanup( struct brw_context *brw );
772 void brw_pipe_rast_cleanup( struct brw_context *brw );
773 void brw_pipe_sampler_cleanup( struct brw_context *brw );
774 void brw_pipe_shader_cleanup( struct brw_context *brw );
775 void brw_pipe_vertex_cleanup( struct brw_context *brw );
776 void brw_pipe_clear_cleanup( struct brw_context *brw );
777
778
779 void brw_context_flush( struct brw_context *brw );
780
781
782 /* brw_urb.c
783 */
784 int brw_upload_urb_fence(struct brw_context *brw);
785
786 /* brw_curbe.c
787 */
788 int brw_upload_cs_urb_state(struct brw_context *brw);
789
790 /* brw_disasm.c */
791 int brw_disasm (FILE *file,
792 const struct brw_instruction *inst,
793 unsigned count);
794
795 /*======================================================================
796 * Inline conversion functions. These are better-typed than the
797 * macros used previously:
798 */
799 static INLINE struct brw_context *
800 brw_context( struct pipe_context *ctx )
801 {
802 return (struct brw_context *)ctx;
803 }
804
805
806 #define BRW_IS_965(brw) ((brw)->chipset.is_965)
807 #define BRW_IS_IGDNG(brw) ((brw)->chipset.is_igdng)
808 #define BRW_IS_G4X(brw) ((brw)->chipset.is_g4x)
809
810
811 #endif
812