src/gallium/drivers/i965/brw_context.h

   1 /*
   2  Copyright (C) Intel Corp.  2006.  All Rights Reserved.
   3  Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
   4  develop this 3D driver.
   5
   6  Permission is hereby granted, free of charge, to any person obtaining
   7  a copy of this software and associated documentation files (the
   8  "Software"), to deal in the Software without restriction, including
   9  without limitation the rights to use, copy, modify, merge, publish,
  10  distribute, sublicense, and/or sell copies of the Software, and to
  11  permit persons to whom the Software is furnished to do so, subject to
  12  the following conditions:
  13
  14  The above copyright notice and this permission notice (including the
  15  next paragraph) shall be included in all copies or substantial
  16  portions of the Software.
  17
  18  THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  19  EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  20  MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
  21  IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
  22  LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
  23  OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
  24  WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25
  26  **********************************************************************/
  27  /*
  28   * Authors:
  29   *   Keith Whitwell <keith@tungstengraphics.com>
  30   */
  31
  32
  33 #ifndef BRWCONTEXT_INC
  34 #define BRWCONTEXT_INC
  35
  36 #include "brw_structs.h"
  37 #include "brw_winsys.h"
  38 #include "brw_reg.h"
  39 #include "pipe/p_state.h"
  40 #include "pipe/p_context.h"
  41 #include "tgsi/tgsi_scan.h"
  42
  43
  44 /* Glossary:
  45  *
  46  * URB - uniform resource buffer.  A mid-sized buffer which is
  47  * partitioned between the fixed function units and used for passing
  48  * values (vertices, primitives, constants) between them.
  49  *
  50  * CURBE - constant URB entry.  An urb region (entry) used to hold
  51  * constant values which the fixed function units can be instructed to
  52  * preload into the GRF when spawning a thread.
  53  *
  54  * VUE - vertex URB entry.  An urb entry holding a vertex and usually
  55  * a vertex header.  The header contains control information and
  56  * things like primitive type, Begin/end flags and clip codes.
  57  *
  58  * PUE - primitive URB entry.  An urb entry produced by the setup (SF)
  59  * unit holding rasterization and interpolation parameters.
  60  *
  61  * GRF - general register file.  One of several register files
  62  * addressable by programmed threads.  The inputs (r0, payload, curbe,
  63  * urb) of the thread are preloaded to this area before the thread is
  64  * spawned.  The registers are individually 8 dwords wide and suitable
  65  * for general usage.  Registers holding thread input values are not
  66  * special and may be overwritten.
  67  *
  68  * MRF - message register file.  Threads communicate (and terminate)
  69  * by sending messages.  Message parameters are placed in contiguous
  70  * MRF registers.  All program output is via these messages.  URB
  71  * entries are populated by sending a message to the shared URB
  72  * function containing the new data, together with a control word,
  73  * often an unmodified copy of R0.
  74  *
  75  * R0 - GRF register 0.  Typically holds control information used when
  76  * sending messages to other threads.
  77  *
  78  * EU or GEN4 EU: The name of the programmable subsystem of the
  79  * i965 hardware.  Threads are executed by the EU, the registers
  80  * described above are part of the EU architecture.
  81  *
  82  * Fixed function units:
  83  *
  84  * CS - Command streamer.  Notional first unit, little software
  85  * interaction.  Holds the URB entries used for constant data, ie the
  86  * CURBEs.
  87  *
  88  * VF/VS - Vertex Fetch / Vertex Shader.  The fixed function part of
  89  * this unit is responsible for pulling vertices out of vertex buffers
  90  * in vram and injecting them into the processing pipe as VUEs.  If
  91  * enabled, it first passes them to a VS thread which is a good place
  92  * for the driver to implement any active vertex shader.
  93  *
  94  * GS - Geometry Shader.  This corresponds to a new DX10 concept.  If
  95  * enabled, incoming strips etc are passed to GS threads in individual
  96  * line/triangle/point units.  The GS thread may perform arbitary
  97  * computation and emit whatever primtives with whatever vertices it
  98  * chooses.  This makes GS an excellent place to implement GL's
  99  * unfilled polygon modes, though of course it is capable of much
 100  * more.  Additionally, GS is used to translate away primitives not
 101  * handled by latter units, including Quads and Lineloops.
 102  *
 103  * CS - Clipper.  Mesa's clipping algorithms are imported to run on
 104  * this unit.  The fixed function part performs cliptesting against
 105  * the 6 fixed clipplanes and makes descisions on whether or not the
 106  * incoming primitive needs to be passed to a thread for clipping.
 107  * User clip planes are handled via cooperation with the VS thread.
 108  *
 109  * SF - Strips Fans or Setup: Triangles are prepared for
 110  * rasterization.  Interpolation coefficients are calculated.
 111  * Flatshading and two-side lighting usually performed here.
 112  *
 113  * WM - Windower.  Interpolation of vertex attributes performed here.
 114  * Fragment shader implemented here.  SIMD aspects of EU taken full
 115  * advantage of, as pixels are processed in blocks of 16.
 116  *
 117  * CC - Color Calculator.  No EU threads associated with this unit.
 118  * Handles blending and (presumably) depth and stencil testing.
 119  */
 120
 121 #define BRW_MAX_CURBE                    (32*16)
 122
 123 struct brw_context;
 124
 125 struct brw_depth_stencil_state {
 126    //struct pipe_depth_stencil_alpha_state templ; /* for draw module */
 127
 128    /* Precalculated hardware state:
 129     */
 130    struct brw_cc0 cc0;
 131    struct brw_cc1 cc1;
 132    struct brw_cc2 cc2;
 133    struct brw_cc3 cc3;
 134    struct brw_cc7 cc7;
 135
 136    unsigned iz_lookup;
 137 };
 138
 139
 140 struct brw_blend_state {
 141    //struct pipe_depth_stencil_alpha_state templ; /* for draw module */
 142
 143    /* Precalculated hardware state:
 144     */
 145    struct brw_cc2 cc2;
 146    struct brw_cc3 cc3;
 147    struct brw_cc5 cc5;
 148    struct brw_cc6 cc6;
 149
 150    struct brw_surf_ss0 ss0;
 151 };
 152
 153
 154 struct brw_rasterizer_state;
 155
 156
 157 struct brw_vertex_shader {
 158    const struct tgsi_token *tokens;
 159    struct tgsi_shader_info info;
 160
 161    unsigned id;
 162    struct brw_winsys_buffer *const_buffer;    /** Program constant buffer/surface */
 163    GLboolean use_const_buffer;
 164 };
 165
 166
 167 struct brw_fragment_shader {
 168    const struct tgsi_token *tokens;
 169    struct tgsi_shader_info info;
 170
 171    unsigned iz_lookup;
 172    //unsigned wm_lookup;
 173
 174    boolean  uses_depth:1;
 175    boolean  has_flow_control:1;
 176
 177    unsigned id;
 178    struct brw_winsys_buffer *const_buffer;    /** Program constant buffer/surface */
 179    GLboolean use_const_buffer;
 180 };
 181
 182
 183 struct brw_sampler {
 184    struct pipe_sampler_state templ;
 185    struct brw_ss0 ss0;
 186    struct brw_ss1 ss1;
 187    struct brw_ss3 ss3;
 188 };
 189
 190
 191
 192 #define PIPE_NEW_DEPTH_STENCIL_ALPHA    0x1
 193 #define PIPE_NEW_RAST                   0x2
 194 #define PIPE_NEW_BLEND                  0x4
 195 #define PIPE_NEW_VIEWPORT               0x8
 196 #define PIPE_NEW_SAMPLERS               0x10
 197 #define PIPE_NEW_VERTEX_BUFFER          0x20
 198 #define PIPE_NEW_VERTEX_ELEMENT         0x40
 199 #define PIPE_NEW_FRAGMENT_SHADER        0x80
 200 #define PIPE_NEW_VERTEX_SHADER          0x100
 201 #define PIPE_NEW_FRAGMENT_CONSTANTS     0x200
 202 #define PIPE_NEW_VERTEX_CONSTANTS       0x400
 203 #define PIPE_NEW_CLIP                   0x800
 204 #define PIPE_NEW_INDEX_BUFFER           0x1000
 205 #define PIPE_NEW_INDEX_RANGE            0x2000
 206 #define PIPE_NEW_BLEND_COLOR            0x4000
 207 #define PIPE_NEW_POLYGON_STIPPLE        0x8000
 208 #define PIPE_NEW_FRAMEBUFFER_DIMENSIONS 0x10000
 209 #define PIPE_NEW_DEPTH_BUFFER           0x20000
 210 #define PIPE_NEW_COLOR_BUFFERS          0x40000
 211 #define PIPE_NEW_QUERY                  0x80000
 212 #define PIPE_NEW_SCISSOR                0x100000
 213 #define PIPE_NEW_BOUND_TEXTURES         0x200000
 214
 215
 216
 217 #define BRW_NEW_URB_FENCE               0x1
 218 #define BRW_NEW_FRAGMENT_PROGRAM        0x2
 219 #define BRW_NEW_VERTEX_PROGRAM          0x4
 220 #define BRW_NEW_INPUT_DIMENSIONS        0x8
 221 #define BRW_NEW_CURBE_OFFSETS           0x10
 222 #define BRW_NEW_REDUCED_PRIMITIVE       0x20
 223 #define BRW_NEW_PRIMITIVE               0x40
 224 #define BRW_NEW_CONTEXT                 0x80
 225 #define BRW_NEW_WM_INPUT_DIMENSIONS     0x100
 226 #define BRW_NEW_PSP                     0x800
 227 #define BRW_NEW_WM_SURFACES             0x1000
 228 #define BRW_NEW_xxx                     0x2000 /* was FENCE */
 229 #define BRW_NEW_INDICES                 0x4000
 230 #define BRW_NEW_VERTICES                0x8000
 231 /**
 232  * Used for any batch entry with a relocated pointer that will be used
 233  * by any 3D rendering.  Need to re-emit these fresh in each
 234  * batchbuffer as the referenced buffers may be relocated in the
 235  * meantime.
 236  */
 237 #define BRW_NEW_BATCH                   0x10000
 238 #define BRW_NEW_NR_WM_SURFACES          0x40000
 239 #define BRW_NEW_NR_VS_SURFACES          0x80000
 240 #define BRW_NEW_INDEX_BUFFER            0x100000
 241
 242 struct brw_state_flags {
 243    /** State update flags signalled by mesa internals */
 244    GLuint mesa;
 245    /**
 246     * State update flags signalled as the result of brw_tracked_state updates
 247     */
 248    GLuint brw;
 249    /** State update flags signalled by brw_state_cache.c searches */
 250    GLuint cache;
 251 };
 252
 253
 254
 255 /* Data about a particular attempt to compile a program.  Note that
 256  * there can be many of these, each in a different GL state
 257  * corresponding to a different brw_wm_prog_key struct, with different
 258  * compiled programs:
 259  */
 260 struct brw_wm_prog_data {
 261    GLuint curb_read_length;
 262    GLuint urb_read_length;
 263
 264    GLuint first_curbe_grf;
 265    GLuint total_grf;
 266    GLuint total_scratch;
 267
 268    GLuint nr_params;       /**< number of float params/constants */
 269    GLboolean error;
 270
 271    /* Pointer to tracked values (only valid once
 272     * _mesa_load_state_parameters has been called at runtime).
 273     */
 274    const GLfloat *param[BRW_MAX_CURBE];
 275 };
 276
 277 struct brw_sf_prog_data {
 278    GLuint urb_read_length;
 279    GLuint total_grf;
 280
 281    /* Each vertex may have upto 12 attributes, 4 components each,
 282     * except WPOS which requires only 2.  (11*4 + 2) == 44 ==> 11
 283     * rows.
 284     *
 285     * Actually we use 4 for each, so call it 12 rows.
 286     */
 287    GLuint urb_entry_size;
 288 };
 289
 290
 291 struct brw_clip_prog_data;
 292
 293 struct brw_gs_prog_data {
 294    GLuint urb_read_length;
 295    GLuint total_grf;
 296 };
 297
 298 struct brw_vs_prog_data {
 299    GLuint curb_read_length;
 300    GLuint urb_read_length;
 301    GLuint total_grf;
 302
 303    GLuint nr_outputs;
 304    GLuint nr_inputs;
 305
 306    GLuint nr_params;       /**< number of TGSI_FILE_CONSTANT's */
 307
 308    GLboolean copy_edgeflag;
 309    GLboolean writes_psiz;
 310
 311    /* Used for calculating urb partitions:
 312     */
 313    GLuint urb_entry_size;
 314 };
 315
 316
 317 /* Size == 0 if output either not written, or always [0,0,0,1]
 318  */
 319 struct brw_vs_ouput_sizes {
 320    GLubyte output_size[PIPE_MAX_SHADER_OUTPUTS];
 321 };
 322
 323
 324 /** Number of texture sampler units */
 325 #define BRW_MAX_TEX_UNIT 16
 326
 327 /**
 328  * Size of our surface binding table for the WM.
 329  * This contains pointers to the drawing surfaces and current texture
 330  * objects and shader constant buffers (+2).
 331  */
 332 #define BRW_WM_MAX_SURF (PIPE_MAX_COLOR_BUFS + BRW_MAX_TEX_UNIT + 1)
 333
 334 /**
 335  * Helpers to convert drawing buffers, textures and constant buffers
 336  * to surface binding table indexes, for WM.
 337  */
 338 #define SURF_INDEX_DRAW(d)           (d)
 339 #define SURF_INDEX_FRAG_CONST_BUFFER (PIPE_MAX_COLOR_BUFS)
 340 #define SURF_INDEX_TEXTURE(t)        (PIPE_MAX_COLOR_BUFS + 1 + (t))
 341
 342 /**
 343  * Size of surface binding table for the VS.
 344  * Only one constant buffer for now.
 345  */
 346 #define BRW_VS_MAX_SURF 1
 347
 348 /**
 349  * Only a VS constant buffer
 350  */
 351 #define SURF_INDEX_VERT_CONST_BUFFER 0
 352
 353
 354 enum brw_cache_id {
 355    BRW_CC_VP,
 356    BRW_CC_UNIT,
 357    BRW_WM_PROG,
 358    BRW_SAMPLER_DEFAULT_COLOR,
 359    BRW_SAMPLER,
 360    BRW_WM_UNIT,
 361    BRW_SF_PROG,
 362    BRW_SF_VP,
 363    BRW_SF_UNIT,
 364    BRW_VS_UNIT,
 365    BRW_VS_PROG,
 366    BRW_GS_UNIT,
 367    BRW_GS_PROG,
 368    BRW_CLIP_VP,
 369    BRW_CLIP_UNIT,
 370    BRW_CLIP_PROG,
 371    BRW_SS_SURFACE,
 372    BRW_SS_SURF_BIND,
 373
 374    BRW_MAX_CACHE
 375 };
 376
 377 struct brw_cache_item {
 378    /**
 379     * Effectively part of the key, cache_id identifies what kind of state
 380     * buffer is involved, and also which brw->state.dirty.cache flag should
 381     * be set when this cache item is chosen.
 382     */
 383    enum brw_cache_id cache_id;
 384    /** 32-bit hash of the key data */
 385    GLuint hash;
 386    GLuint key_size;             /* for variable-sized keys */
 387    const void *key;
 388    struct brw_winsys_buffer **reloc_bufs;
 389    GLuint nr_reloc_bufs;
 390
 391    struct brw_winsys_buffer *bo;
 392    GLuint data_size;
 393
 394    struct brw_cache_item *next;
 395 };
 396
 397
 398
 399 struct brw_cache {
 400    struct brw_context *brw;
 401    struct brw_winsys_screen *sws;
 402
 403    struct brw_cache_item **items;
 404    GLuint size, n_items;
 405
 406    GLuint key_size[BRW_MAX_CACHE];              /* for fixed-size keys */
 407    GLuint aux_size[BRW_MAX_CACHE];
 408    char *name[BRW_MAX_CACHE];
 409
 410
 411    /* Record of the last BOs chosen for each cache_id.  Used to set
 412     * brw->state.dirty.cache when a new cache item is chosen.
 413     */
 414    struct brw_winsys_buffer *last_bo[BRW_MAX_CACHE];
 415 };
 416
 417
 418 struct brw_tracked_state {
 419    struct brw_state_flags dirty;
 420    int (*prepare)( struct brw_context *brw );
 421    int (*emit)( struct brw_context *brw );
 422 };
 423
 424 /* Flags for brw->state.cache.
 425  */
 426 #define CACHE_NEW_CC_VP                  (1<<BRW_CC_VP)
 427 #define CACHE_NEW_CC_UNIT                (1<<BRW_CC_UNIT)
 428 #define CACHE_NEW_WM_PROG                (1<<BRW_WM_PROG)
 429 #define CACHE_NEW_SAMPLER_DEFAULT_COLOR  (1<<BRW_SAMPLER_DEFAULT_COLOR)
 430 #define CACHE_NEW_SAMPLER                (1<<BRW_SAMPLER)
 431 #define CACHE_NEW_WM_UNIT                (1<<BRW_WM_UNIT)
 432 #define CACHE_NEW_SF_PROG                (1<<BRW_SF_PROG)
 433 #define CACHE_NEW_SF_VP                  (1<<BRW_SF_VP)
 434 #define CACHE_NEW_SF_UNIT                (1<<BRW_SF_UNIT)
 435 #define CACHE_NEW_VS_UNIT                (1<<BRW_VS_UNIT)
 436 #define CACHE_NEW_VS_PROG                (1<<BRW_VS_PROG)
 437 #define CACHE_NEW_GS_UNIT                (1<<BRW_GS_UNIT)
 438 #define CACHE_NEW_GS_PROG                (1<<BRW_GS_PROG)
 439 #define CACHE_NEW_CLIP_VP                (1<<BRW_CLIP_VP)
 440 #define CACHE_NEW_CLIP_UNIT              (1<<BRW_CLIP_UNIT)
 441 #define CACHE_NEW_CLIP_PROG              (1<<BRW_CLIP_PROG)
 442 #define CACHE_NEW_SURFACE                (1<<BRW_SS_SURFACE)
 443 #define CACHE_NEW_SURF_BIND              (1<<BRW_SS_SURF_BIND)
 444
 445 struct brw_cached_batch_item {
 446    struct header *header;
 447    GLuint sz;
 448    struct brw_cached_batch_item *next;
 449 };
 450
 451
 452
 453 /* Protect against a future where VERT_ATTRIB_MAX > 32.  Wouldn't life
 454  * be easier if C allowed arrays of packed elements?
 455  */
 456 #define VS_INPUT_BITMASK_DWORDS  ((PIPE_MAX_SHADER_INPUTS+31)/32)
 457
 458
 459
 460
 461 struct brw_vertex_info {
 462    GLuint sizes[VS_INPUT_BITMASK_DWORDS * 2]; /* sizes:2[VERT_ATTRIB_MAX] */
 463 };
 464
 465
 466 struct brw_query_object {
 467    /** Doubly linked list of active query objects in the context. */
 468    struct brw_query_object *prev, *next;
 469
 470    /** Last query BO associated with this query. */
 471    struct brw_winsys_buffer *bo;
 472    /** First index in bo with query data for this object. */
 473    int first_index;
 474    /** Last index in bo with query data for this object. */
 475    int last_index;
 476
 477    /* Total count of pixels from previous BOs */
 478    uint64_t result;
 479 };
 480
 481
 482 /**
 483  * brw_context is derived from pipe_context
 484  */
 485 struct brw_context
 486 {
 487    struct pipe_context base;
 488    struct brw_chipset chipset;
 489
 490    struct brw_screen *brw_screen;
 491    struct brw_winsys_screen *sws;
 492
 493    struct brw_batchbuffer *batch;
 494
 495    GLuint primitive;
 496    GLuint reduced_primitive;
 497
 498    /* Active state from the state tracker:
 499     */
 500    struct {
 501       struct brw_vertex_shader *vertex_shader;
 502       struct brw_fragment_shader *fragment_shader;
 503       const struct brw_blend_state *blend;
 504       const struct brw_rasterizer_state *rast;
 505       const struct brw_depth_stencil_state *zstencil;
 506
 507       const struct brw_sampler *sampler[PIPE_MAX_SAMPLERS];
 508       const struct pipe_vertex_element vertex_element[PIPE_MAX_ATTRIBS];
 509       unsigned num_vertex_elements;
 510       unsigned num_samplers;
 511
 512       struct brw_texture *texture[PIPE_MAX_SAMPLERS];
 513       struct pipe_vertex_buffer vertex_buffer[PIPE_MAX_ATTRIBS];
 514       unsigned num_textures;
 515       unsigned num_vertex_buffers;
 516
 517       struct pipe_scissor_state scissor;
 518       struct pipe_framebuffer_state fb;
 519       struct pipe_viewport_state vp;
 520       struct pipe_clip_state ucp;
 521       struct pipe_buffer *vertex_constants;
 522       struct pipe_buffer *fragment_constants;
 523
 524       struct pipe_viewport_state viewport;
 525       struct brw_blend_constant_color bcc;
 526       struct brw_polygon_stipple bps;
 527
 528
 529
 530       /**
 531        * Index buffer for this draw_prims call.
 532        *
 533        * Updates are signaled by PIPE_NEW_INDEX_BUFFER.
 534        */
 535       struct pipe_buffer *index_buffer;
 536       unsigned index_size;
 537
 538       /* Updates are signalled by PIPE_NEW_INDEX_RANGE:
 539        */
 540       unsigned min_index;
 541       unsigned max_index;
 542
 543    } curr;
 544
 545    struct {
 546       struct brw_state_flags dirty;
 547
 548       /**
 549        * List of buffers accumulated in brw_validate_state to receive
 550        * dri_bo_check_aperture treatment before exec, so we can know if we
 551        * should flush the batch and try again before emitting primitives.
 552        *
 553        * This can be a fixed number as we only have a limited number of
 554        * objects referenced from the batchbuffer in a primitive emit,
 555        * consisting of the vertex buffers, pipelined state pointers,
 556        * the CURBE, the depth buffer, and a query BO.
 557        */
 558       struct brw_winsys_buffer *validated_bos[PIPE_MAX_SHADER_INPUTS + 16];
 559       int validated_bo_count;
 560    } state;
 561
 562    struct brw_cache cache;  /** non-surface items */
 563    struct brw_cache surface_cache;  /* surface items */
 564    struct brw_cached_batch_item *cached_batch_items;
 565
 566    struct {
 567       struct u_upload_mgr *upload_vertex;
 568       struct u_upload_mgr *upload_index;
 569
 570       /* Information on uploaded vertex buffers:
 571        */
 572       struct {
 573          unsigned stride;       /* in bytes between successive vertices */
 574          unsigned offset;       /* in bytes, of first vertex in bo */
 575          unsigned vertex_count; /* count of valid vertices which may be accessed */
 576          struct brw_winsys_buffer *bo;
 577       } vb[PIPE_MAX_ATTRIBS];
 578
 579       struct {
 580       } ve[PIPE_MAX_ATTRIBS];
 581
 582       unsigned nr_vb;           /* currently the same as curr.num_vertex_buffers */
 583       unsigned nr_ve;           /* currently the same as curr.num_vertex_elements */
 584    } vb;
 585
 586    struct {
 587       /* Updates to these fields are signaled by BRW_NEW_INDEX_BUFFER. */
 588       struct brw_winsys_buffer *bo;
 589       unsigned int offset;
 590       unsigned int size;
 591       /* Offset to index buffer index to use in CMD_3D_PRIM so that we can
 592        * avoid re-uploading the IB packet over and over if we're actually
 593        * referencing the same index buffer.
 594        */
 595       unsigned int start_vertex_offset;
 596    } ib;
 597
 598
 599    /* BRW_NEW_URB_ALLOCATIONS:
 600     */
 601    struct {
 602       GLuint vsize;             /* vertex size plus header in urb registers */
 603       GLuint csize;             /* constant buffer size in urb registers */
 604       GLuint sfsize;            /* setup data size in urb registers */
 605
 606       GLboolean constrained;
 607
 608       GLuint nr_vs_entries;
 609       GLuint nr_gs_entries;
 610       GLuint nr_clip_entries;
 611       GLuint nr_sf_entries;
 612       GLuint nr_cs_entries;
 613
 614       GLuint vs_start;
 615       GLuint gs_start;
 616       GLuint clip_start;
 617       GLuint sf_start;
 618       GLuint cs_start;
 619    } urb;
 620
 621
 622    /* BRW_NEW_CURBE_OFFSETS:
 623     */
 624    struct {
 625       GLuint wm_start;  /**< pos of first wm const in CURBE buffer */
 626       GLuint wm_size;   /**< number of float[4] consts, multiple of 16 */
 627       GLuint clip_start;
 628       GLuint clip_size;
 629       GLuint vs_start;
 630       GLuint vs_size;
 631       GLuint total_size;
 632
 633       struct brw_winsys_buffer *curbe_bo;
 634       /** Offset within curbe_bo of space for current curbe entry */
 635       GLuint curbe_offset;
 636       /** Offset within curbe_bo of space for next curbe entry */
 637       GLuint curbe_next_offset;
 638
 639       GLfloat *last_buf;
 640       GLuint last_bufsz;
 641       /**
 642        *  Whether we should create a new bo instead of reusing the old one
 643        * (if we just dispatch the batch pointing at the old one.
 644        */
 645       GLboolean need_new_bo;
 646    } curbe;
 647
 648    struct {
 649       struct brw_vs_prog_data *prog_data;
 650
 651       struct brw_winsys_buffer *prog_bo;
 652       struct brw_winsys_buffer *state_bo;
 653
 654       /** Binding table of pointers to surf_bo entries */
 655       struct brw_winsys_buffer *bind_bo;
 656       struct brw_winsys_buffer *surf_bo[BRW_VS_MAX_SURF];
 657       GLuint nr_surfaces;
 658    } vs;
 659
 660    struct {
 661       struct brw_gs_prog_data *prog_data;
 662
 663       GLboolean prog_active;
 664       struct brw_winsys_buffer *prog_bo;
 665       struct brw_winsys_buffer *state_bo;
 666    } gs;
 667
 668    struct {
 669       struct brw_clip_prog_data *prog_data;
 670
 671       struct brw_winsys_buffer *prog_bo;
 672       struct brw_winsys_buffer *state_bo;
 673       struct brw_winsys_buffer *vp_bo;
 674    } clip;
 675
 676
 677    struct {
 678       struct brw_sf_prog_data *prog_data;
 679
 680       struct brw_winsys_buffer *prog_bo;
 681       struct brw_winsys_buffer *state_bo;
 682       struct brw_winsys_buffer *vp_bo;
 683    } sf;
 684
 685    struct {
 686       struct brw_wm_prog_data *prog_data;
 687       struct brw_wm_compile *compile_data;
 688
 689       /** Input sizes, calculated from active vertex program.
 690        * One bit per fragment program input attribute.
 691        */
 692       //GLbitfield input_size_masks[4];
 693
 694       /** Array of surface default colors (texture border color) */
 695       struct brw_winsys_buffer *sdc_bo[BRW_MAX_TEX_UNIT];
 696
 697       GLuint render_surf;
 698       GLuint nr_surfaces;
 699
 700       GLuint max_threads;
 701       struct brw_winsys_buffer *scratch_bo;
 702
 703       GLuint sampler_count;
 704       struct brw_winsys_buffer *sampler_bo;
 705
 706       /** Binding table of pointers to surf_bo entries */
 707       struct brw_winsys_buffer *bind_bo;
 708       struct brw_winsys_buffer *surf_bo[PIPE_MAX_COLOR_BUFS];
 709
 710       struct brw_winsys_buffer *prog_bo;
 711       struct brw_winsys_buffer *state_bo;
 712    } wm;
 713
 714
 715    struct {
 716       struct brw_winsys_buffer *prog_bo;
 717       struct brw_winsys_buffer *state_bo;
 718       struct brw_winsys_buffer *vp_bo;
 719    } cc;
 720
 721    struct {
 722       struct brw_query_object active_head;
 723       struct brw_winsys_buffer *bo;
 724       int index;
 725       GLboolean active;
 726       int stats_wm;
 727    } query;
 728
 729    struct {
 730       unsigned always_emit_state:1;
 731       unsigned always_flush_batch:1;
 732       unsigned force_swtnl:1;
 733       unsigned no_swtnl:1;
 734    } flags;
 735
 736    /* Used to give every program string a unique id
 737     */
 738    GLuint program_id;
 739 };
 740
 741
 742
 743 /*======================================================================
 744  * brw_queryobj.c
 745  */
 746 void brw_init_query(struct brw_context *brw);
 747 void brw_prepare_query_begin(struct brw_context *brw);
 748 void brw_emit_query_begin(struct brw_context *brw);
 749 void brw_emit_query_end(struct brw_context *brw);
 750
 751 /*======================================================================
 752  * brw_state_dump.c
 753  */
 754 void brw_debug_batch(struct brw_context *intel);
 755
 756
 757 /*======================================================================
 758  * brw_pipe_*.c
 759  */
 760 void brw_pipe_blend_init( struct brw_context *brw );
 761 void brw_pipe_depth_stencil_init( struct brw_context *brw );
 762 void brw_pipe_framebuffer_init( struct brw_context *brw );
 763 void brw_pipe_flush_init( struct brw_context *brw );
 764 void brw_pipe_misc_init( struct brw_context *brw );
 765 void brw_pipe_query_init( struct brw_context *brw );
 766 void brw_pipe_rast_init( struct brw_context *brw );
 767 void brw_pipe_sampler_init( struct brw_context *brw );
 768 void brw_pipe_shader_init( struct brw_context *brw );
 769 void brw_pipe_vertex_init( struct brw_context *brw );
 770
 771 void brw_pipe_blend_cleanup( struct brw_context *brw );
 772 void brw_pipe_depth_stencil_cleanup( struct brw_context *brw );
 773 void brw_pipe_framebuffer_cleanup( struct brw_context *brw );
 774 void brw_pipe_flush_cleanup( struct brw_context *brw );
 775 void brw_pipe_misc_cleanup( struct brw_context *brw );
 776 void brw_pipe_query_cleanup( struct brw_context *brw );
 777 void brw_pipe_rast_cleanup( struct brw_context *brw );
 778 void brw_pipe_sampler_cleanup( struct brw_context *brw );
 779 void brw_pipe_shader_cleanup( struct brw_context *brw );
 780 void brw_pipe_vertex_cleanup( struct brw_context *brw );
 781
 782
 783 /* brw_urb.c
 784  */
 785 int brw_upload_urb_fence(struct brw_context *brw);
 786
 787 /* brw_curbe.c
 788  */
 789 int brw_upload_cs_urb_state(struct brw_context *brw);
 790
 791 /* brw_disasm.c */
 792 int brw_disasm (FILE *file, struct brw_instruction *inst);
 793
 794 /*======================================================================
 795  * Inline conversion functions.  These are better-typed than the
 796  * macros used previously:
 797  */
 798 static INLINE struct brw_context *
 799 brw_context( struct pipe_context *ctx )
 800 {
 801    return (struct brw_context *)ctx;
 802 }
 803
 804
 805 #define BRW_IS_965(brw)    ((brw)->chipset.is_965)
 806 #define BRW_IS_IGDNG(brw)  ((brw)->chipset.is_igdng)
 807 #define BRW_IS_G4X(brw)    ((brw)->chipset.is_g4x)
 808
 809
 810 #endif
 811