src/gallium/drivers/i965/brw_context.h

   1 /*
   2  Copyright (C) Intel Corp.  2006.  All Rights Reserved.
   3  Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
   4  develop this 3D driver.
   5
   6  Permission is hereby granted, free of charge, to any person obtaining
   7  a copy of this software and associated documentation files (the
   8  "Software"), to deal in the Software without restriction, including
   9  without limitation the rights to use, copy, modify, merge, publish,
  10  distribute, sublicense, and/or sell copies of the Software, and to
  11  permit persons to whom the Software is furnished to do so, subject to
  12  the following conditions:
  13
  14  The above copyright notice and this permission notice (including the
  15  next paragraph) shall be included in all copies or substantial
  16  portions of the Software.
  17
  18  THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  19  EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  20  MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
  21  IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
  22  LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
  23  OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
  24  WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25
  26  **********************************************************************/
  27  /*
  28   * Authors:
  29   *   Keith Whitwell <keith@tungstengraphics.com>
  30   */
  31
  32
  33 #ifndef BRWCONTEXT_INC
  34 #define BRWCONTEXT_INC
  35
  36 #include "brw_structs.h"
  37 #include "brw_winsys.h"
  38 #include "brw_reg.h"
  39 #include "pipe/p_state.h"
  40 #include "pipe/p_context.h"
  41 #include "tgsi/tgsi_scan.h"
  42
  43
  44 /* Glossary:
  45  *
  46  * URB - uniform resource buffer.  A mid-sized buffer which is
  47  * partitioned between the fixed function units and used for passing
  48  * values (vertices, primitives, constants) between them.
  49  *
  50  * CURBE - constant URB entry.  An urb region (entry) used to hold
  51  * constant values which the fixed function units can be instructed to
  52  * preload into the GRF when spawning a thread.
  53  *
  54  * VUE - vertex URB entry.  An urb entry holding a vertex and usually
  55  * a vertex header.  The header contains control information and
  56  * things like primitive type, Begin/end flags and clip codes.
  57  *
  58  * PUE - primitive URB entry.  An urb entry produced by the setup (SF)
  59  * unit holding rasterization and interpolation parameters.
  60  *
  61  * GRF - general register file.  One of several register files
  62  * addressable by programmed threads.  The inputs (r0, payload, curbe,
  63  * urb) of the thread are preloaded to this area before the thread is
  64  * spawned.  The registers are individually 8 dwords wide and suitable
  65  * for general usage.  Registers holding thread input values are not
  66  * special and may be overwritten.
  67  *
  68  * MRF - message register file.  Threads communicate (and terminate)
  69  * by sending messages.  Message parameters are placed in contiguous
  70  * MRF registers.  All program output is via these messages.  URB
  71  * entries are populated by sending a message to the shared URB
  72  * function containing the new data, together with a control word,
  73  * often an unmodified copy of R0.
  74  *
  75  * R0 - GRF register 0.  Typically holds control information used when
  76  * sending messages to other threads.
  77  *
  78  * EU or GEN4 EU: The name of the programmable subsystem of the
  79  * i965 hardware.  Threads are executed by the EU, the registers
  80  * described above are part of the EU architecture.
  81  *
  82  * Fixed function units:
  83  *
  84  * CS - Command streamer.  Notional first unit, little software
  85  * interaction.  Holds the URB entries used for constant data, ie the
  86  * CURBEs.
  87  *
  88  * VF/VS - Vertex Fetch / Vertex Shader.  The fixed function part of
  89  * this unit is responsible for pulling vertices out of vertex buffers
  90  * in vram and injecting them into the processing pipe as VUEs.  If
  91  * enabled, it first passes them to a VS thread which is a good place
  92  * for the driver to implement any active vertex shader.
  93  *
  94  * GS - Geometry Shader.  This corresponds to a new DX10 concept.  If
  95  * enabled, incoming strips etc are passed to GS threads in individual
  96  * line/triangle/point units.  The GS thread may perform arbitary
  97  * computation and emit whatever primtives with whatever vertices it
  98  * chooses.  This makes GS an excellent place to implement GL's
  99  * unfilled polygon modes, though of course it is capable of much
 100  * more.  Additionally, GS is used to translate away primitives not
 101  * handled by latter units, including Quads and Lineloops.
 102  *
 103  * CS - Clipper.  Mesa's clipping algorithms are imported to run on
 104  * this unit.  The fixed function part performs cliptesting against
 105  * the 6 fixed clipplanes and makes descisions on whether or not the
 106  * incoming primitive needs to be passed to a thread for clipping.
 107  * User clip planes are handled via cooperation with the VS thread.
 108  *
 109  * SF - Strips Fans or Setup: Triangles are prepared for
 110  * rasterization.  Interpolation coefficients are calculated.
 111  * Flatshading and two-side lighting usually performed here.
 112  *
 113  * WM - Windower.  Interpolation of vertex attributes performed here.
 114  * Fragment shader implemented here.  SIMD aspects of EU taken full
 115  * advantage of, as pixels are processed in blocks of 16.
 116  *
 117  * CC - Color Calculator.  No EU threads associated with this unit.
 118  * Handles blending and (presumably) depth and stencil testing.
 119  */
 120
 121 #define BRW_MAX_CURBE                    (32*16)
 122
 123 struct brw_context;
 124
 125 struct brw_depth_stencil_alpha_state {
 126    struct pipe_depth_stencil_alpha_state templ; /* for draw module */
 127
 128    /* Precalculated hardware state:
 129     */
 130    struct brw_cc0 cc0;
 131    struct brw_cc1 cc1;
 132    struct brw_cc2 cc2;
 133    struct brw_cc3 cc3;
 134 };
 135
 136
 137 struct brw_blend_state {
 138    struct pipe_depth_stencil_alpha_state templ; /* for draw module */
 139
 140    /* Precalculated hardware state:
 141     */
 142    struct brw_cc3 cc3;
 143    struct brw_cc5 cc5;
 144    struct brw_cc6 cc6;
 145    struct brw_cc7 cc7;
 146 };
 147
 148
 149 struct brw_rasterizer_state;
 150
 151
 152 struct brw_vertex_shader {
 153    const struct tgsi_token *tokens;
 154    struct tgsi_shader_info info;
 155
 156    struct brw_winsys_buffer *const_buffer;    /** Program constant buffer/surface */
 157    GLboolean use_const_buffer;
 158 };
 159
 160
 161 struct brw_fragment_shader {
 162    const struct tgsi_token *tokens;
 163    struct tgsi_shader_info info;
 164
 165    GLboolean isGLSL;
 166
 167    struct brw_winsys_buffer *const_buffer;    /** Program constant buffer/surface */
 168    GLboolean use_const_buffer;
 169 };
 170
 171
 172
 173 #define PIPE_NEW_DEPTH_STENCIL_ALPHA    0x1
 174 #define PIPE_NEW_RAST                   0x2
 175 #define PIPE_NEW_BLEND                  0x2
 176 #define PIPE_NEW_VIEWPORT               0x2
 177 #define PIPE_NEW_FRAMEBUFFER            0x2
 178 #define PIPE_NEW_VERTEX_BUFFER          0x2
 179 #define PIPE_NEW_VERTEX_ELEMENT         0x2
 180 #define PIPE_NEW_FRAGMENT_SHADER        0x2
 181 #define PIPE_NEW_VERTEX_SHADER          0x2
 182 #define PIPE_NEW_FRAGMENT_CONSTANTS     0x2
 183 #define PIPE_NEW_VERTEX_CONSTANTS       0x2
 184 #define PIPE_NEW_CLIP                   0x2
 185 #define PIPE_NEW_INDEX_BUFFER           0x2
 186 #define PIPE_NEW_INDEX_RANGE            0x2
 187
 188
 189 #define BRW_NEW_URB_FENCE               0x1
 190 #define BRW_NEW_FRAGMENT_PROGRAM        0x2
 191 #define BRW_NEW_VERTEX_PROGRAM          0x4
 192 #define BRW_NEW_INPUT_DIMENSIONS        0x8
 193 #define BRW_NEW_CURBE_OFFSETS           0x10
 194 #define BRW_NEW_REDUCED_PRIMITIVE       0x20
 195 #define BRW_NEW_PRIMITIVE               0x40
 196 #define BRW_NEW_CONTEXT                 0x80
 197 #define BRW_NEW_WM_INPUT_DIMENSIONS     0x100
 198 #define BRW_NEW_PSP                     0x800
 199 #define BRW_NEW_WM_SURFACES             0x1000
 200 #define BRW_NEW_FENCE                   0x2000
 201 #define BRW_NEW_INDICES                 0x4000
 202 #define BRW_NEW_VERTICES                0x8000
 203 /**
 204  * Used for any batch entry with a relocated pointer that will be used
 205  * by any 3D rendering.
 206  */
 207 #define BRW_NEW_BATCH                   0x10000
 208 /** brw->depth_region updated */
 209 #define BRW_NEW_DEPTH_BUFFER            0x20000
 210 #define BRW_NEW_NR_WM_SURFACES          0x40000
 211 #define BRW_NEW_NR_VS_SURFACES          0x80000
 212 #define BRW_NEW_INDEX_BUFFER            0x100000
 213
 214 struct brw_state_flags {
 215    /** State update flags signalled by mesa internals */
 216    GLuint mesa;
 217    /**
 218     * State update flags signalled as the result of brw_tracked_state updates
 219     */
 220    GLuint brw;
 221    /** State update flags signalled by brw_state_cache.c searches */
 222    GLuint cache;
 223 };
 224
 225
 226
 227 /* Data about a particular attempt to compile a program.  Note that
 228  * there can be many of these, each in a different GL state
 229  * corresponding to a different brw_wm_prog_key struct, with different
 230  * compiled programs:
 231  */
 232 struct brw_wm_prog_data {
 233    GLuint curb_read_length;
 234    GLuint urb_read_length;
 235
 236    GLuint first_curbe_grf;
 237    GLuint total_grf;
 238    GLuint total_scratch;
 239
 240    GLuint nr_params;       /**< number of float params/constants */
 241    GLboolean error;
 242
 243    /* Pointer to tracked values (only valid once
 244     * _mesa_load_state_parameters has been called at runtime).
 245     */
 246    const GLfloat *param[BRW_MAX_CURBE];
 247 };
 248
 249 struct brw_sf_prog_data {
 250    GLuint urb_read_length;
 251    GLuint total_grf;
 252
 253    /* Each vertex may have upto 12 attributes, 4 components each,
 254     * except WPOS which requires only 2.  (11*4 + 2) == 44 ==> 11
 255     * rows.
 256     *
 257     * Actually we use 4 for each, so call it 12 rows.
 258     */
 259    GLuint urb_entry_size;
 260 };
 261
 262
 263 struct brw_clip_prog_data;
 264
 265 struct brw_gs_prog_data {
 266    GLuint urb_read_length;
 267    GLuint total_grf;
 268 };
 269
 270 struct brw_vs_prog_data {
 271    GLuint curb_read_length;
 272    GLuint urb_read_length;
 273    GLuint total_grf;
 274    GLuint outputs_written;
 275    GLuint nr_params;       /**< number of float params/constants */
 276
 277    GLuint inputs_read;
 278
 279    /* Used for calculating urb partitions:
 280     */
 281    GLuint urb_entry_size;
 282 };
 283
 284
 285 /* Size == 0 if output either not written, or always [0,0,0,1]
 286  */
 287 struct brw_vs_ouput_sizes {
 288    GLubyte output_size[PIPE_MAX_SHADER_OUTPUTS];
 289 };
 290
 291
 292 /** Number of texture sampler units */
 293 #define BRW_MAX_TEX_UNIT 16
 294
 295 /**
 296  * Size of our surface binding table for the WM.
 297  * This contains pointers to the drawing surfaces and current texture
 298  * objects and shader constant buffers (+2).
 299  */
 300 #define BRW_WM_MAX_SURF (PIPE_MAX_COLOR_BUFS + BRW_MAX_TEX_UNIT + 1)
 301
 302 /**
 303  * Helpers to convert drawing buffers, textures and constant buffers
 304  * to surface binding table indexes, for WM.
 305  */
 306 #define SURF_INDEX_DRAW(d)           (d)
 307 #define SURF_INDEX_FRAG_CONST_BUFFER (PIPE_MAX_COLOR_BUFS)
 308 #define SURF_INDEX_TEXTURE(t)        (PIPE_MAX_COLOR_BUFS + 1 + (t))
 309
 310 /**
 311  * Size of surface binding table for the VS.
 312  * Only one constant buffer for now.
 313  */
 314 #define BRW_VS_MAX_SURF 1
 315
 316 /**
 317  * Only a VS constant buffer
 318  */
 319 #define SURF_INDEX_VERT_CONST_BUFFER 0
 320
 321
 322 enum brw_cache_id {
 323    BRW_CC_VP,
 324    BRW_CC_UNIT,
 325    BRW_WM_PROG,
 326    BRW_SAMPLER_DEFAULT_COLOR,
 327    BRW_SAMPLER,
 328    BRW_WM_UNIT,
 329    BRW_SF_PROG,
 330    BRW_SF_VP,
 331    BRW_SF_UNIT,
 332    BRW_VS_UNIT,
 333    BRW_VS_PROG,
 334    BRW_GS_UNIT,
 335    BRW_GS_PROG,
 336    BRW_CLIP_VP,
 337    BRW_CLIP_UNIT,
 338    BRW_CLIP_PROG,
 339    BRW_SS_SURFACE,
 340    BRW_SS_SURF_BIND,
 341
 342    BRW_MAX_CACHE
 343 };
 344
 345 struct brw_cache_item {
 346    /**
 347     * Effectively part of the key, cache_id identifies what kind of state
 348     * buffer is involved, and also which brw->state.dirty.cache flag should
 349     * be set when this cache item is chosen.
 350     */
 351    enum brw_cache_id cache_id;
 352    /** 32-bit hash of the key data */
 353    GLuint hash;
 354    GLuint key_size;             /* for variable-sized keys */
 355    const void *key;
 356    struct brw_winsys_buffer **reloc_bufs;
 357    GLuint nr_reloc_bufs;
 358
 359    struct brw_winsys_buffer *bo;
 360    GLuint data_size;
 361
 362    struct brw_cache_item *next;
 363 };
 364
 365
 366
 367 struct brw_cache {
 368    struct brw_context *brw;
 369
 370    struct brw_cache_item **items;
 371    GLuint size, n_items;
 372
 373    GLuint key_size[BRW_MAX_CACHE];              /* for fixed-size keys */
 374    GLuint aux_size[BRW_MAX_CACHE];
 375    char *name[BRW_MAX_CACHE];
 376
 377    /* Record of the last BOs chosen for each cache_id.  Used to set
 378     * brw->state.dirty.cache when a new cache item is chosen.
 379     */
 380    struct brw_winsys_buffer *last_bo[BRW_MAX_CACHE];
 381 };
 382
 383
 384 /* Considered adding a member to this struct to document which flags
 385  * an update might raise so that ordering of the state atoms can be
 386  * checked or derived at runtime.  Dropped the idea in favor of having
 387  * a debug mode where the state is monitored for flags which are
 388  * raised that have already been tested against.
 389  */
 390 struct brw_tracked_state {
 391    struct brw_state_flags dirty;
 392    int (*prepare)( struct brw_context *brw );
 393    int (*emit)( struct brw_context *brw );
 394 };
 395
 396 /* Flags for brw->state.cache.
 397  */
 398 #define CACHE_NEW_CC_VP                  (1<<BRW_CC_VP)
 399 #define CACHE_NEW_CC_UNIT                (1<<BRW_CC_UNIT)
 400 #define CACHE_NEW_WM_PROG                (1<<BRW_WM_PROG)
 401 #define CACHE_NEW_SAMPLER_DEFAULT_COLOR  (1<<BRW_SAMPLER_DEFAULT_COLOR)
 402 #define CACHE_NEW_SAMPLER                (1<<BRW_SAMPLER)
 403 #define CACHE_NEW_WM_UNIT                (1<<BRW_WM_UNIT)
 404 #define CACHE_NEW_SF_PROG                (1<<BRW_SF_PROG)
 405 #define CACHE_NEW_SF_VP                  (1<<BRW_SF_VP)
 406 #define CACHE_NEW_SF_UNIT                (1<<BRW_SF_UNIT)
 407 #define CACHE_NEW_VS_UNIT                (1<<BRW_VS_UNIT)
 408 #define CACHE_NEW_VS_PROG                (1<<BRW_VS_PROG)
 409 #define CACHE_NEW_GS_UNIT                (1<<BRW_GS_UNIT)
 410 #define CACHE_NEW_GS_PROG                (1<<BRW_GS_PROG)
 411 #define CACHE_NEW_CLIP_VP                (1<<BRW_CLIP_VP)
 412 #define CACHE_NEW_CLIP_UNIT              (1<<BRW_CLIP_UNIT)
 413 #define CACHE_NEW_CLIP_PROG              (1<<BRW_CLIP_PROG)
 414 #define CACHE_NEW_SURFACE                (1<<BRW_SS_SURFACE)
 415 #define CACHE_NEW_SURF_BIND              (1<<BRW_SS_SURF_BIND)
 416
 417 struct brw_cached_batch_item {
 418    struct header *header;
 419    GLuint sz;
 420    struct brw_cached_batch_item *next;
 421 };
 422
 423
 424
 425 /* Protect against a future where VERT_ATTRIB_MAX > 32.  Wouldn't life
 426  * be easier if C allowed arrays of packed elements?
 427  */
 428 #define VS_INPUT_BITMASK_DWORDS  ((PIPE_MAX_SHADER_INPUTS+31)/32)
 429
 430
 431
 432
 433 struct brw_vertex_info {
 434    GLuint sizes[VS_INPUT_BITMASK_DWORDS * 2]; /* sizes:2[VERT_ATTRIB_MAX] */
 435 };
 436
 437
 438 struct brw_query_object {
 439    /** Doubly linked list of active query objects in the context. */
 440    struct brw_query_object *prev, *next;
 441
 442    /** Last query BO associated with this query. */
 443    struct brw_winsys_buffer *bo;
 444    /** First index in bo with query data for this object. */
 445    int first_index;
 446    /** Last index in bo with query data for this object. */
 447    int last_index;
 448
 449    /* Total count of pixels from previous BOs */
 450    unsigned int count;
 451 };
 452
 453
 454 /**
 455  * brw_context is derived from pipe_context
 456  */
 457 struct brw_context
 458 {
 459    struct pipe_context base;
 460    struct brw_chipset chipset;
 461
 462    struct brw_screen *brw_screen;
 463    struct brw_winsys_screen *sws;
 464
 465    struct brw_batchbuffer *batch;
 466
 467    GLuint primitive;
 468    GLuint reduced_primitive;
 469
 470    /* Active state from the state tracker:
 471     */
 472    struct {
 473       const struct brw_vertex_shader *vertex_shader;
 474       const struct brw_fragment_shader *fragment_shader;
 475       const struct brw_blend_state *blend;
 476       const struct brw_rasterizer_state *rast;
 477       const struct brw_depth_stencil_alpha_state *zstencil;
 478
 479       struct pipe_vertex_element vertex_element[PIPE_MAX_ATTRIBS];
 480       struct pipe_vertex_buffer vertex_buffer[PIPE_MAX_ATTRIBS];
 481       unsigned num_vertex_elements;
 482       unsigned num_vertex_buffers;
 483
 484       struct pipe_framebuffer_state fb;
 485       struct pipe_viewport_state vp;
 486       struct pipe_clip_state ucp;
 487       struct pipe_buffer *vertex_constants;
 488       struct pipe_buffer *fragment_constants;
 489
 490       /**
 491        * Index buffer for this draw_prims call.
 492        *
 493        * Updates are signaled by PIPE_NEW_INDEX_BUFFER.
 494        */
 495       struct pipe_buffer *index_buffer;
 496       unsigned index_size;
 497
 498       /* Updates are signalled by PIPE_NEW_INDEX_RANGE:
 499        */
 500       unsigned min_index;
 501       unsigned max_index;
 502
 503    } curr;
 504
 505    struct {
 506       struct brw_state_flags dirty;
 507
 508       /**
 509        * List of buffers accumulated in brw_validate_state to receive
 510        * dri_bo_check_aperture treatment before exec, so we can know if we
 511        * should flush the batch and try again before emitting primitives.
 512        *
 513        * This can be a fixed number as we only have a limited number of
 514        * objects referenced from the batchbuffer in a primitive emit,
 515        * consisting of the vertex buffers, pipelined state pointers,
 516        * the CURBE, the depth buffer, and a query BO.
 517        */
 518       struct brw_winsys_buffer *validated_bos[PIPE_MAX_SHADER_INPUTS + 16];
 519       int validated_bo_count;
 520    } state;
 521
 522    struct brw_cache cache;  /** non-surface items */
 523    struct brw_cache surface_cache;  /* surface items */
 524    struct brw_cached_batch_item *cached_batch_items;
 525
 526    struct {
 527       struct u_upload_mgr *upload_vertex;
 528       struct u_upload_mgr *upload_index;
 529
 530       /* Information on uploaded vertex buffers:
 531        */
 532       struct {
 533          unsigned stride;       /* in bytes between successive vertices */
 534          unsigned offset;       /* in bytes, of first vertex in bo */
 535          unsigned vertex_count; /* count of valid vertices which may be accessed */
 536          struct brw_winsys_buffer *bo;
 537       } vb[PIPE_MAX_ATTRIBS];
 538
 539       struct {
 540       } ve[PIPE_MAX_ATTRIBS];
 541
 542       unsigned nr_vb;           /* currently the same as curr.num_vertex_buffers */
 543       unsigned nr_ve;           /* currently the same as curr.num_vertex_elements */
 544    } vb;
 545
 546    struct {
 547       /* Updates to these fields are signaled by BRW_NEW_INDEX_BUFFER. */
 548       struct brw_winsys_buffer *bo;
 549       unsigned int offset;
 550       unsigned int size;
 551       /* Offset to index buffer index to use in CMD_3D_PRIM so that we can
 552        * avoid re-uploading the IB packet over and over if we're actually
 553        * referencing the same index buffer.
 554        */
 555       unsigned int start_vertex_offset;
 556    } ib;
 557
 558
 559    /* BRW_NEW_URB_ALLOCATIONS:
 560     */
 561    struct {
 562       GLuint vsize;             /* vertex size plus header in urb registers */
 563       GLuint csize;             /* constant buffer size in urb registers */
 564       GLuint sfsize;            /* setup data size in urb registers */
 565
 566       GLboolean constrained;
 567
 568       GLuint nr_vs_entries;
 569       GLuint nr_gs_entries;
 570       GLuint nr_clip_entries;
 571       GLuint nr_sf_entries;
 572       GLuint nr_cs_entries;
 573
 574       GLuint vs_start;
 575       GLuint gs_start;
 576       GLuint clip_start;
 577       GLuint sf_start;
 578       GLuint cs_start;
 579    } urb;
 580
 581
 582    /* BRW_NEW_CURBE_OFFSETS:
 583     */
 584    struct {
 585       GLuint wm_start;  /**< pos of first wm const in CURBE buffer */
 586       GLuint wm_size;   /**< number of float[4] consts, multiple of 16 */
 587       GLuint clip_start;
 588       GLuint clip_size;
 589       GLuint vs_start;
 590       GLuint vs_size;
 591       GLuint total_size;
 592
 593       struct brw_winsys_buffer *curbe_bo;
 594       /** Offset within curbe_bo of space for current curbe entry */
 595       GLuint curbe_offset;
 596       /** Offset within curbe_bo of space for next curbe entry */
 597       GLuint curbe_next_offset;
 598
 599       GLfloat *last_buf;
 600       GLuint last_bufsz;
 601       /**
 602        *  Whether we should create a new bo instead of reusing the old one
 603        * (if we just dispatch the batch pointing at the old one.
 604        */
 605       GLboolean need_new_bo;
 606    } curbe;
 607
 608    struct {
 609       struct brw_vs_prog_data *prog_data;
 610
 611       struct brw_winsys_buffer *prog_bo;
 612       struct brw_winsys_buffer *state_bo;
 613
 614       /** Binding table of pointers to surf_bo entries */
 615       struct brw_winsys_buffer *bind_bo;
 616       struct brw_winsys_buffer *surf_bo[BRW_VS_MAX_SURF];
 617       GLuint nr_surfaces;
 618    } vs;
 619
 620    struct {
 621       struct brw_gs_prog_data *prog_data;
 622
 623       GLboolean prog_active;
 624       struct brw_winsys_buffer *prog_bo;
 625       struct brw_winsys_buffer *state_bo;
 626    } gs;
 627
 628    struct {
 629       struct brw_clip_prog_data *prog_data;
 630
 631       struct brw_winsys_buffer *prog_bo;
 632       struct brw_winsys_buffer *state_bo;
 633       struct brw_winsys_buffer *vp_bo;
 634    } clip;
 635
 636
 637    struct {
 638       struct brw_sf_prog_data *prog_data;
 639
 640       struct brw_winsys_buffer *prog_bo;
 641       struct brw_winsys_buffer *state_bo;
 642       struct brw_winsys_buffer *vp_bo;
 643    } sf;
 644
 645    struct {
 646       struct brw_wm_prog_data *prog_data;
 647       struct brw_wm_compile *compile_data;
 648
 649       /** Input sizes, calculated from active vertex program.
 650        * One bit per fragment program input attribute.
 651        */
 652       //GLbitfield input_size_masks[4];
 653
 654       /** Array of surface default colors (texture border color) */
 655       struct brw_winsys_buffer *sdc_bo[BRW_MAX_TEX_UNIT];
 656
 657       GLuint render_surf;
 658       GLuint nr_surfaces;
 659
 660       GLuint max_threads;
 661       struct brw_winsys_buffer *scratch_bo;
 662
 663       GLuint sampler_count;
 664       struct brw_winsys_buffer *sampler_bo;
 665
 666       /** Binding table of pointers to surf_bo entries */
 667       struct brw_winsys_buffer *bind_bo;
 668       struct brw_winsys_buffer *surf_bo[PIPE_MAX_COLOR_BUFS];
 669
 670       struct brw_winsys_buffer *prog_bo;
 671       struct brw_winsys_buffer *state_bo;
 672    } wm;
 673
 674
 675    struct {
 676       struct brw_winsys_buffer *prog_bo;
 677       struct brw_winsys_buffer *state_bo;
 678       struct brw_winsys_buffer *vp_bo;
 679    } cc;
 680
 681    struct {
 682       struct brw_query_object active_head;
 683       struct brw_winsys_buffer *bo;
 684       int index;
 685       GLboolean active;
 686    } query;
 687
 688    struct {
 689       unsigned always_emit_state:1;
 690       unsigned always_flush_batch:1;
 691       unsigned force_swtnl:1;
 692       unsigned no_swtnl:1;
 693    } flags;
 694
 695    /* Used to give every program string a unique id
 696     */
 697    GLuint program_id;
 698 };
 699
 700
 701
 702 /*======================================================================
 703  * brw_queryobj.c
 704  */
 705 void brw_init_query(struct brw_context *brw);
 706 void brw_prepare_query_begin(struct brw_context *brw);
 707 void brw_emit_query_begin(struct brw_context *brw);
 708 void brw_emit_query_end(struct brw_context *brw);
 709
 710 /*======================================================================
 711  * brw_state_dump.c
 712  */
 713 void brw_debug_batch(struct brw_context *intel);
 714
 715 /*======================================================================
 716  * brw_tex.c
 717  */
 718 void brw_validate_textures( struct brw_context *brw );
 719
 720
 721 /*======================================================================
 722  * brw_pipe_shader.c
 723  */
 724 void brw_init_shader_funcs( struct brw_context *brw );
 725
 726
 727 /* brw_urb.c
 728  */
 729 void brw_upload_urb_fence(struct brw_context *brw);
 730
 731 /* brw_curbe.c
 732  */
 733 void brw_upload_cs_urb_state(struct brw_context *brw);
 734
 735 /* brw_disasm.c */
 736 int brw_disasm (FILE *file, struct brw_instruction *inst);
 737
 738 /*======================================================================
 739  * Inline conversion functions.  These are better-typed than the
 740  * macros used previously:
 741  */
 742 static INLINE struct brw_context *
 743 brw_context( struct pipe_context *ctx )
 744 {
 745    return (struct brw_context *)ctx;
 746 }
 747
 748
 749 #define BRW_IS_965(brw)    ((brw)->chipset.is_965)
 750 #define BRW_IS_IGDNG(brw)  ((brw)->chipset.is_igdng)
 751 #define BRW_IS_G4X(brw)    ((brw)->chipset.is_g4x)
 752
 753
 754 #endif
 755