i965g: more work on compiling
[mesa.git] / src / gallium / drivers / i965 / brw_context.h
1 /*
2 Copyright (C) Intel Corp. 2006. All Rights Reserved.
3 Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
4 develop this 3D driver.
5
6 Permission is hereby granted, free of charge, to any person obtaining
7 a copy of this software and associated documentation files (the
8 "Software"), to deal in the Software without restriction, including
9 without limitation the rights to use, copy, modify, merge, publish,
10 distribute, sublicense, and/or sell copies of the Software, and to
11 permit persons to whom the Software is furnished to do so, subject to
12 the following conditions:
13
14 The above copyright notice and this permission notice (including the
15 next paragraph) shall be included in all copies or substantial
16 portions of the Software.
17
18 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
19 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
21 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
22 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
23 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
24 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25
26 **********************************************************************/
27 /*
28 * Authors:
29 * Keith Whitwell <keith@tungstengraphics.com>
30 */
31
32
33 #ifndef BRWCONTEXT_INC
34 #define BRWCONTEXT_INC
35
36 #include "brw_structs.h"
37 #include "brw_winsys.h"
38 #include "brw_reg.h"
39 #include "pipe/p_state.h"
40 #include "pipe/p_context.h"
41 #include "tgsi/tgsi_scan.h"
42
43
44 /* Glossary:
45 *
46 * URB - uniform resource buffer. A mid-sized buffer which is
47 * partitioned between the fixed function units and used for passing
48 * values (vertices, primitives, constants) between them.
49 *
50 * CURBE - constant URB entry. An urb region (entry) used to hold
51 * constant values which the fixed function units can be instructed to
52 * preload into the GRF when spawning a thread.
53 *
54 * VUE - vertex URB entry. An urb entry holding a vertex and usually
55 * a vertex header. The header contains control information and
56 * things like primitive type, Begin/end flags and clip codes.
57 *
58 * PUE - primitive URB entry. An urb entry produced by the setup (SF)
59 * unit holding rasterization and interpolation parameters.
60 *
61 * GRF - general register file. One of several register files
62 * addressable by programmed threads. The inputs (r0, payload, curbe,
63 * urb) of the thread are preloaded to this area before the thread is
64 * spawned. The registers are individually 8 dwords wide and suitable
65 * for general usage. Registers holding thread input values are not
66 * special and may be overwritten.
67 *
68 * MRF - message register file. Threads communicate (and terminate)
69 * by sending messages. Message parameters are placed in contiguous
70 * MRF registers. All program output is via these messages. URB
71 * entries are populated by sending a message to the shared URB
72 * function containing the new data, together with a control word,
73 * often an unmodified copy of R0.
74 *
75 * R0 - GRF register 0. Typically holds control information used when
76 * sending messages to other threads.
77 *
78 * EU or GEN4 EU: The name of the programmable subsystem of the
79 * i965 hardware. Threads are executed by the EU, the registers
80 * described above are part of the EU architecture.
81 *
82 * Fixed function units:
83 *
84 * CS - Command streamer. Notional first unit, little software
85 * interaction. Holds the URB entries used for constant data, ie the
86 * CURBEs.
87 *
88 * VF/VS - Vertex Fetch / Vertex Shader. The fixed function part of
89 * this unit is responsible for pulling vertices out of vertex buffers
90 * in vram and injecting them into the processing pipe as VUEs. If
91 * enabled, it first passes them to a VS thread which is a good place
92 * for the driver to implement any active vertex shader.
93 *
94 * GS - Geometry Shader. This corresponds to a new DX10 concept. If
95 * enabled, incoming strips etc are passed to GS threads in individual
96 * line/triangle/point units. The GS thread may perform arbitary
97 * computation and emit whatever primtives with whatever vertices it
98 * chooses. This makes GS an excellent place to implement GL's
99 * unfilled polygon modes, though of course it is capable of much
100 * more. Additionally, GS is used to translate away primitives not
101 * handled by latter units, including Quads and Lineloops.
102 *
103 * CS - Clipper. Mesa's clipping algorithms are imported to run on
104 * this unit. The fixed function part performs cliptesting against
105 * the 6 fixed clipplanes and makes descisions on whether or not the
106 * incoming primitive needs to be passed to a thread for clipping.
107 * User clip planes are handled via cooperation with the VS thread.
108 *
109 * SF - Strips Fans or Setup: Triangles are prepared for
110 * rasterization. Interpolation coefficients are calculated.
111 * Flatshading and two-side lighting usually performed here.
112 *
113 * WM - Windower. Interpolation of vertex attributes performed here.
114 * Fragment shader implemented here. SIMD aspects of EU taken full
115 * advantage of, as pixels are processed in blocks of 16.
116 *
117 * CC - Color Calculator. No EU threads associated with this unit.
118 * Handles blending and (presumably) depth and stencil testing.
119 */
120
121 #define BRW_MAX_CURBE (32*16)
122
123 struct brw_context;
124
125 struct brw_depth_stencil_alpha_state {
126 struct pipe_depth_stencil_alpha_state templ; /* for draw module */
127
128 /* Precalculated hardware state:
129 */
130 struct brw_cc0 cc0;
131 struct brw_cc1 cc1;
132 struct brw_cc2 cc2;
133 struct brw_cc3 cc3;
134 };
135
136
137 struct brw_blend_state {
138 struct pipe_depth_stencil_alpha_state templ; /* for draw module */
139
140 /* Precalculated hardware state:
141 */
142 struct brw_cc3 cc3;
143 struct brw_cc5 cc5;
144 struct brw_cc6 cc6;
145 struct brw_cc7 cc7;
146 };
147
148
149 struct brw_rasterizer_state;
150
151
152 struct brw_vertex_shader {
153 const struct tgsi_token *tokens;
154 struct tgsi_shader_info info;
155
156 struct brw_winsys_buffer *const_buffer; /** Program constant buffer/surface */
157 GLboolean use_const_buffer;
158 };
159
160
161 struct brw_fragment_shader {
162 const struct tgsi_token *tokens;
163 struct tgsi_shader_info info;
164
165 GLboolean isGLSL;
166
167 struct brw_winsys_buffer *const_buffer; /** Program constant buffer/surface */
168 GLboolean use_const_buffer;
169 };
170
171
172
173 #define PIPE_NEW_DEPTH_STENCIL_ALPHA 0x1
174 #define PIPE_NEW_RAST 0x2
175 #define PIPE_NEW_BLEND 0x2
176 #define PIPE_NEW_VIEWPORT 0x2
177 #define PIPE_NEW_FRAMEBUFFER 0x2
178 #define PIPE_NEW_VERTEX_BUFFER 0x2
179 #define PIPE_NEW_VERTEX_ELEMENT 0x2
180 #define PIPE_NEW_FRAGMENT_SHADER 0x2
181 #define PIPE_NEW_VERTEX_SHADER 0x2
182 #define PIPE_NEW_FRAGMENT_CONSTANTS 0x2
183 #define PIPE_NEW_VERTEX_CONSTANTS 0x2
184 #define PIPE_NEW_CLIP 0x2
185
186
187 #define BRW_NEW_URB_FENCE 0x1
188 #define BRW_NEW_FRAGMENT_PROGRAM 0x2
189 #define BRW_NEW_VERTEX_PROGRAM 0x4
190 #define BRW_NEW_INPUT_DIMENSIONS 0x8
191 #define BRW_NEW_CURBE_OFFSETS 0x10
192 #define BRW_NEW_REDUCED_PRIMITIVE 0x20
193 #define BRW_NEW_PRIMITIVE 0x40
194 #define BRW_NEW_CONTEXT 0x80
195 #define BRW_NEW_WM_INPUT_DIMENSIONS 0x100
196 #define BRW_NEW_PSP 0x800
197 #define BRW_NEW_WM_SURFACES 0x1000
198 #define BRW_NEW_FENCE 0x2000
199 #define BRW_NEW_INDICES 0x4000
200 #define BRW_NEW_VERTICES 0x8000
201 /**
202 * Used for any batch entry with a relocated pointer that will be used
203 * by any 3D rendering.
204 */
205 #define BRW_NEW_BATCH 0x10000
206 /** brw->depth_region updated */
207 #define BRW_NEW_DEPTH_BUFFER 0x20000
208 #define BRW_NEW_NR_WM_SURFACES 0x40000
209 #define BRW_NEW_NR_VS_SURFACES 0x80000
210 #define BRW_NEW_INDEX_BUFFER 0x100000
211
212 struct brw_state_flags {
213 /** State update flags signalled by mesa internals */
214 GLuint mesa;
215 /**
216 * State update flags signalled as the result of brw_tracked_state updates
217 */
218 GLuint brw;
219 /** State update flags signalled by brw_state_cache.c searches */
220 GLuint cache;
221 };
222
223
224
225 /* Data about a particular attempt to compile a program. Note that
226 * there can be many of these, each in a different GL state
227 * corresponding to a different brw_wm_prog_key struct, with different
228 * compiled programs:
229 */
230 struct brw_wm_prog_data {
231 GLuint curb_read_length;
232 GLuint urb_read_length;
233
234 GLuint first_curbe_grf;
235 GLuint total_grf;
236 GLuint total_scratch;
237
238 GLuint nr_params; /**< number of float params/constants */
239 GLboolean error;
240
241 /* Pointer to tracked values (only valid once
242 * _mesa_load_state_parameters has been called at runtime).
243 */
244 const GLfloat *param[BRW_MAX_CURBE];
245 };
246
247 struct brw_sf_prog_data {
248 GLuint urb_read_length;
249 GLuint total_grf;
250
251 /* Each vertex may have upto 12 attributes, 4 components each,
252 * except WPOS which requires only 2. (11*4 + 2) == 44 ==> 11
253 * rows.
254 *
255 * Actually we use 4 for each, so call it 12 rows.
256 */
257 GLuint urb_entry_size;
258 };
259
260
261 struct brw_clip_prog_data;
262
263 struct brw_gs_prog_data {
264 GLuint urb_read_length;
265 GLuint total_grf;
266 };
267
268 struct brw_vs_prog_data {
269 GLuint curb_read_length;
270 GLuint urb_read_length;
271 GLuint total_grf;
272 GLuint outputs_written;
273 GLuint nr_params; /**< number of float params/constants */
274
275 GLuint inputs_read;
276
277 /* Used for calculating urb partitions:
278 */
279 GLuint urb_entry_size;
280 };
281
282
283 /* Size == 0 if output either not written, or always [0,0,0,1]
284 */
285 struct brw_vs_ouput_sizes {
286 GLubyte output_size[PIPE_MAX_SHADER_OUTPUTS];
287 };
288
289
290 /** Number of texture sampler units */
291 #define BRW_MAX_TEX_UNIT 16
292
293 /**
294 * Size of our surface binding table for the WM.
295 * This contains pointers to the drawing surfaces and current texture
296 * objects and shader constant buffers (+2).
297 */
298 #define BRW_WM_MAX_SURF (PIPE_MAX_COLOR_BUFS + BRW_MAX_TEX_UNIT + 1)
299
300 /**
301 * Helpers to convert drawing buffers, textures and constant buffers
302 * to surface binding table indexes, for WM.
303 */
304 #define SURF_INDEX_DRAW(d) (d)
305 #define SURF_INDEX_FRAG_CONST_BUFFER (PIPE_MAX_COLOR_BUFS)
306 #define SURF_INDEX_TEXTURE(t) (PIPE_MAX_COLOR_BUFS + 1 + (t))
307
308 /**
309 * Size of surface binding table for the VS.
310 * Only one constant buffer for now.
311 */
312 #define BRW_VS_MAX_SURF 1
313
314 /**
315 * Only a VS constant buffer
316 */
317 #define SURF_INDEX_VERT_CONST_BUFFER 0
318
319
320 enum brw_cache_id {
321 BRW_CC_VP,
322 BRW_CC_UNIT,
323 BRW_WM_PROG,
324 BRW_SAMPLER_DEFAULT_COLOR,
325 BRW_SAMPLER,
326 BRW_WM_UNIT,
327 BRW_SF_PROG,
328 BRW_SF_VP,
329 BRW_SF_UNIT,
330 BRW_VS_UNIT,
331 BRW_VS_PROG,
332 BRW_GS_UNIT,
333 BRW_GS_PROG,
334 BRW_CLIP_VP,
335 BRW_CLIP_UNIT,
336 BRW_CLIP_PROG,
337 BRW_SS_SURFACE,
338 BRW_SS_SURF_BIND,
339
340 BRW_MAX_CACHE
341 };
342
343 struct brw_cache_item {
344 /**
345 * Effectively part of the key, cache_id identifies what kind of state
346 * buffer is involved, and also which brw->state.dirty.cache flag should
347 * be set when this cache item is chosen.
348 */
349 enum brw_cache_id cache_id;
350 /** 32-bit hash of the key data */
351 GLuint hash;
352 GLuint key_size; /* for variable-sized keys */
353 const void *key;
354 struct brw_winsys_buffer **reloc_bufs;
355 GLuint nr_reloc_bufs;
356
357 struct brw_winsys_buffer *bo;
358 GLuint data_size;
359
360 struct brw_cache_item *next;
361 };
362
363
364
365 struct brw_cache {
366 struct brw_context *brw;
367
368 struct brw_cache_item **items;
369 GLuint size, n_items;
370
371 GLuint key_size[BRW_MAX_CACHE]; /* for fixed-size keys */
372 GLuint aux_size[BRW_MAX_CACHE];
373 char *name[BRW_MAX_CACHE];
374
375 /* Record of the last BOs chosen for each cache_id. Used to set
376 * brw->state.dirty.cache when a new cache item is chosen.
377 */
378 struct brw_winsys_buffer *last_bo[BRW_MAX_CACHE];
379 };
380
381
382 /* Considered adding a member to this struct to document which flags
383 * an update might raise so that ordering of the state atoms can be
384 * checked or derived at runtime. Dropped the idea in favor of having
385 * a debug mode where the state is monitored for flags which are
386 * raised that have already been tested against.
387 */
388 struct brw_tracked_state {
389 struct brw_state_flags dirty;
390 void (*prepare)( struct brw_context *brw );
391 void (*emit)( struct brw_context *brw );
392 };
393
394 /* Flags for brw->state.cache.
395 */
396 #define CACHE_NEW_CC_VP (1<<BRW_CC_VP)
397 #define CACHE_NEW_CC_UNIT (1<<BRW_CC_UNIT)
398 #define CACHE_NEW_WM_PROG (1<<BRW_WM_PROG)
399 #define CACHE_NEW_SAMPLER_DEFAULT_COLOR (1<<BRW_SAMPLER_DEFAULT_COLOR)
400 #define CACHE_NEW_SAMPLER (1<<BRW_SAMPLER)
401 #define CACHE_NEW_WM_UNIT (1<<BRW_WM_UNIT)
402 #define CACHE_NEW_SF_PROG (1<<BRW_SF_PROG)
403 #define CACHE_NEW_SF_VP (1<<BRW_SF_VP)
404 #define CACHE_NEW_SF_UNIT (1<<BRW_SF_UNIT)
405 #define CACHE_NEW_VS_UNIT (1<<BRW_VS_UNIT)
406 #define CACHE_NEW_VS_PROG (1<<BRW_VS_PROG)
407 #define CACHE_NEW_GS_UNIT (1<<BRW_GS_UNIT)
408 #define CACHE_NEW_GS_PROG (1<<BRW_GS_PROG)
409 #define CACHE_NEW_CLIP_VP (1<<BRW_CLIP_VP)
410 #define CACHE_NEW_CLIP_UNIT (1<<BRW_CLIP_UNIT)
411 #define CACHE_NEW_CLIP_PROG (1<<BRW_CLIP_PROG)
412 #define CACHE_NEW_SURFACE (1<<BRW_SS_SURFACE)
413 #define CACHE_NEW_SURF_BIND (1<<BRW_SS_SURF_BIND)
414
415 struct brw_cached_batch_item {
416 struct header *header;
417 GLuint sz;
418 struct brw_cached_batch_item *next;
419 };
420
421
422
423 /* Protect against a future where VERT_ATTRIB_MAX > 32. Wouldn't life
424 * be easier if C allowed arrays of packed elements?
425 */
426 #define VS_INPUT_BITMASK_DWORDS ((PIPE_MAX_SHADER_INPUTS+31)/32)
427
428
429
430
431 struct brw_vertex_info {
432 GLuint sizes[VS_INPUT_BITMASK_DWORDS * 2]; /* sizes:2[VERT_ATTRIB_MAX] */
433 };
434
435
436 struct brw_query_object {
437 /** Doubly linked list of active query objects in the context. */
438 struct brw_query_object *prev, *next;
439
440 /** Last query BO associated with this query. */
441 struct brw_winsys_buffer *bo;
442 /** First index in bo with query data for this object. */
443 int first_index;
444 /** Last index in bo with query data for this object. */
445 int last_index;
446
447 /* Total count of pixels from previous BOs */
448 unsigned int count;
449 };
450
451
452 /**
453 * brw_context is derived from pipe_context
454 */
455 struct brw_context
456 {
457 struct pipe_context base;
458 struct brw_chipset chipset;
459
460 struct brw_screen *brw_screen;
461 struct brw_winsys_screen *sws;
462
463 struct brw_batchbuffer *batch;
464
465 GLuint primitive;
466 GLuint reduced_primitive;
467
468 GLboolean emit_state_always;
469
470 /* Active vertex program:
471 */
472 struct {
473 const struct brw_vertex_shader *vertex_shader;
474 const struct brw_fragment_shader *fragment_shader;
475 const struct brw_blend_state *blend;
476 const struct brw_rasterizer_state *rast;
477 const struct brw_depth_stencil_alpha_state *zstencil;
478 struct pipe_framebuffer_state fb;
479 struct pipe_viewport_state vp;
480 struct pipe_clip_state ucp;
481 struct pipe_buffer *vertex_constants;
482 struct pipe_buffer *fragment_constants;
483 } curr;
484
485 struct {
486 struct brw_state_flags dirty;
487
488 /**
489 * List of buffers accumulated in brw_validate_state to receive
490 * dri_bo_check_aperture treatment before exec, so we can know if we
491 * should flush the batch and try again before emitting primitives.
492 *
493 * This can be a fixed number as we only have a limited number of
494 * objects referenced from the batchbuffer in a primitive emit,
495 * consisting of the vertex buffers, pipelined state pointers,
496 * the CURBE, the depth buffer, and a query BO.
497 */
498 struct brw_winsys_buffer *validated_bos[PIPE_MAX_SHADER_INPUTS + 16];
499 int validated_bo_count;
500 } state;
501
502 struct brw_cache cache; /** non-surface items */
503 struct brw_cache surface_cache; /* surface items */
504 struct brw_cached_batch_item *cached_batch_items;
505
506 struct {
507 struct pipe_vertex_element vertex_element[PIPE_MAX_ATTRIBS];
508 struct pipe_vertex_buffer vertex_buffer[PIPE_MAX_ATTRIBS];
509 unsigned num_vertex_element;
510 unsigned num_vertex_buffer;
511
512 struct u_upload_mgr *upload_vertex;
513 struct u_upload_mgr *upload_index;
514
515
516 /* Summary of size and varying of active arrays, so we can check
517 * for changes to this state:
518 */
519 struct brw_vertex_info info;
520 unsigned int min_index, max_index;
521 } vb;
522
523 struct {
524 /**
525 * Index buffer for this draw_prims call.
526 *
527 * Updates are signaled by BRW_NEW_INDICES.
528 */
529 const struct _mesa_index_buffer *ib;
530
531 /* Updates to these fields are signaled by BRW_NEW_INDEX_BUFFER. */
532 struct brw_winsys_buffer *bo;
533 unsigned int offset;
534 unsigned int size;
535 /* Offset to index buffer index to use in CMD_3D_PRIM so that we can
536 * avoid re-uploading the IB packet over and over if we're actually
537 * referencing the same index buffer.
538 */
539 unsigned int start_vertex_offset;
540 } ib;
541
542
543 /* BRW_NEW_URB_ALLOCATIONS:
544 */
545 struct {
546 GLuint vsize; /* vertex size plus header in urb registers */
547 GLuint csize; /* constant buffer size in urb registers */
548 GLuint sfsize; /* setup data size in urb registers */
549
550 GLboolean constrained;
551
552 GLuint nr_vs_entries;
553 GLuint nr_gs_entries;
554 GLuint nr_clip_entries;
555 GLuint nr_sf_entries;
556 GLuint nr_cs_entries;
557
558 GLuint vs_start;
559 GLuint gs_start;
560 GLuint clip_start;
561 GLuint sf_start;
562 GLuint cs_start;
563 } urb;
564
565
566 /* BRW_NEW_CURBE_OFFSETS:
567 */
568 struct {
569 GLuint wm_start; /**< pos of first wm const in CURBE buffer */
570 GLuint wm_size; /**< number of float[4] consts, multiple of 16 */
571 GLuint clip_start;
572 GLuint clip_size;
573 GLuint vs_start;
574 GLuint vs_size;
575 GLuint total_size;
576
577 struct brw_winsys_buffer *curbe_bo;
578 /** Offset within curbe_bo of space for current curbe entry */
579 GLuint curbe_offset;
580 /** Offset within curbe_bo of space for next curbe entry */
581 GLuint curbe_next_offset;
582
583 GLfloat *last_buf;
584 GLuint last_bufsz;
585 /**
586 * Whether we should create a new bo instead of reusing the old one
587 * (if we just dispatch the batch pointing at the old one.
588 */
589 GLboolean need_new_bo;
590 } curbe;
591
592 struct {
593 struct brw_vs_prog_data *prog_data;
594
595 struct brw_winsys_buffer *prog_bo;
596 struct brw_winsys_buffer *state_bo;
597
598 /** Binding table of pointers to surf_bo entries */
599 struct brw_winsys_buffer *bind_bo;
600 struct brw_winsys_buffer *surf_bo[BRW_VS_MAX_SURF];
601 GLuint nr_surfaces;
602 } vs;
603
604 struct {
605 struct brw_gs_prog_data *prog_data;
606
607 GLboolean prog_active;
608 struct brw_winsys_buffer *prog_bo;
609 struct brw_winsys_buffer *state_bo;
610 } gs;
611
612 struct {
613 struct brw_clip_prog_data *prog_data;
614
615 struct brw_winsys_buffer *prog_bo;
616 struct brw_winsys_buffer *state_bo;
617 struct brw_winsys_buffer *vp_bo;
618 } clip;
619
620
621 struct {
622 struct brw_sf_prog_data *prog_data;
623
624 struct brw_winsys_buffer *prog_bo;
625 struct brw_winsys_buffer *state_bo;
626 struct brw_winsys_buffer *vp_bo;
627 } sf;
628
629 struct {
630 struct brw_wm_prog_data *prog_data;
631 struct brw_wm_compile *compile_data;
632
633 /** Input sizes, calculated from active vertex program.
634 * One bit per fragment program input attribute.
635 */
636 //GLbitfield input_size_masks[4];
637
638 /** Array of surface default colors (texture border color) */
639 struct brw_winsys_buffer *sdc_bo[BRW_MAX_TEX_UNIT];
640
641 GLuint render_surf;
642 GLuint nr_surfaces;
643
644 GLuint max_threads;
645 struct brw_winsys_buffer *scratch_bo;
646
647 GLuint sampler_count;
648 struct brw_winsys_buffer *sampler_bo;
649
650 /** Binding table of pointers to surf_bo entries */
651 struct brw_winsys_buffer *bind_bo;
652 struct brw_winsys_buffer *surf_bo[PIPE_MAX_COLOR_BUFS];
653
654 struct brw_winsys_buffer *prog_bo;
655 struct brw_winsys_buffer *state_bo;
656 } wm;
657
658
659 struct {
660 struct brw_winsys_buffer *prog_bo;
661 struct brw_winsys_buffer *state_bo;
662 struct brw_winsys_buffer *vp_bo;
663 } cc;
664
665 struct {
666 struct brw_query_object active_head;
667 struct brw_winsys_buffer *bo;
668 int index;
669 GLboolean active;
670 } query;
671 /* Used to give every program string a unique id
672 */
673 GLuint program_id;
674 };
675
676
677
678 /*======================================================================
679 * brw_queryobj.c
680 */
681 void brw_init_query(struct brw_context *brw);
682 void brw_prepare_query_begin(struct brw_context *brw);
683 void brw_emit_query_begin(struct brw_context *brw);
684 void brw_emit_query_end(struct brw_context *brw);
685
686 /*======================================================================
687 * brw_state_dump.c
688 */
689 void brw_debug_batch(struct brw_context *intel);
690
691 /*======================================================================
692 * brw_tex.c
693 */
694 void brw_validate_textures( struct brw_context *brw );
695
696
697 /*======================================================================
698 * brw_pipe_shader.c
699 */
700 void brw_init_shader_funcs( struct brw_context *brw );
701
702
703 /* brw_urb.c
704 */
705 void brw_upload_urb_fence(struct brw_context *brw);
706
707 /* brw_curbe.c
708 */
709 void brw_upload_cs_urb_state(struct brw_context *brw);
710
711 /* brw_disasm.c */
712 int brw_disasm (FILE *file, struct brw_instruction *inst);
713
714 /*======================================================================
715 * Inline conversion functions. These are better-typed than the
716 * macros used previously:
717 */
718 static INLINE struct brw_context *
719 brw_context( struct pipe_context *ctx )
720 {
721 return (struct brw_context *)ctx;
722 }
723
724
725 #define BRW_IS_965(brw) ((brw)->chipset.is_965)
726 #define BRW_IS_IGDNG(brw) ((brw)->chipset.is_igdng)
727 #define BRW_IS_G4X(brw) ((brw)->chipset.is_g4x)
728
729
730 #endif
731