2 Copyright (C) Intel Corp. 2006. All Rights Reserved.
3 Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
4 develop this 3D driver.
6 Permission is hereby granted, free of charge, to any person obtaining
7 a copy of this software and associated documentation files (the
8 "Software"), to deal in the Software without restriction, including
9 without limitation the rights to use, copy, modify, merge, publish,
10 distribute, sublicense, and/or sell copies of the Software, and to
11 permit persons to whom the Software is furnished to do so, subject to
12 the following conditions:
14 The above copyright notice and this permission notice (including the
15 next paragraph) shall be included in all copies or substantial
16 portions of the Software.
18 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
19 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
21 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
22 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
23 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
24 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
26 **********************************************************************/
29 * Keith Whitwell <keith@tungstengraphics.com>
33 #ifndef BRWCONTEXT_INC
34 #define BRWCONTEXT_INC
36 #include "brw_structs.h"
37 #include "brw_winsys.h"
39 #include "pipe/p_state.h"
40 #include "pipe/p_context.h"
41 #include "tgsi/tgsi_scan.h"
46 * URB - uniform resource buffer. A mid-sized buffer which is
47 * partitioned between the fixed function units and used for passing
48 * values (vertices, primitives, constants) between them.
50 * CURBE - constant URB entry. An urb region (entry) used to hold
51 * constant values which the fixed function units can be instructed to
52 * preload into the GRF when spawning a thread.
54 * VUE - vertex URB entry. An urb entry holding a vertex and usually
55 * a vertex header. The header contains control information and
56 * things like primitive type, Begin/end flags and clip codes.
58 * PUE - primitive URB entry. An urb entry produced by the setup (SF)
59 * unit holding rasterization and interpolation parameters.
61 * GRF - general register file. One of several register files
62 * addressable by programmed threads. The inputs (r0, payload, curbe,
63 * urb) of the thread are preloaded to this area before the thread is
64 * spawned. The registers are individually 8 dwords wide and suitable
65 * for general usage. Registers holding thread input values are not
66 * special and may be overwritten.
68 * MRF - message register file. Threads communicate (and terminate)
69 * by sending messages. Message parameters are placed in contiguous
70 * MRF registers. All program output is via these messages. URB
71 * entries are populated by sending a message to the shared URB
72 * function containing the new data, together with a control word,
73 * often an unmodified copy of R0.
75 * R0 - GRF register 0. Typically holds control information used when
76 * sending messages to other threads.
78 * EU or GEN4 EU: The name of the programmable subsystem of the
79 * i965 hardware. Threads are executed by the EU, the registers
80 * described above are part of the EU architecture.
82 * Fixed function units:
84 * CS - Command streamer. Notional first unit, little software
85 * interaction. Holds the URB entries used for constant data, ie the
88 * VF/VS - Vertex Fetch / Vertex Shader. The fixed function part of
89 * this unit is responsible for pulling vertices out of vertex buffers
90 * in vram and injecting them into the processing pipe as VUEs. If
91 * enabled, it first passes them to a VS thread which is a good place
92 * for the driver to implement any active vertex shader.
94 * GS - Geometry Shader. This corresponds to a new DX10 concept. If
95 * enabled, incoming strips etc are passed to GS threads in individual
96 * line/triangle/point units. The GS thread may perform arbitary
97 * computation and emit whatever primtives with whatever vertices it
98 * chooses. This makes GS an excellent place to implement GL's
99 * unfilled polygon modes, though of course it is capable of much
100 * more. Additionally, GS is used to translate away primitives not
101 * handled by latter units, including Quads and Lineloops.
103 * CS - Clipper. Mesa's clipping algorithms are imported to run on
104 * this unit. The fixed function part performs cliptesting against
105 * the 6 fixed clipplanes and makes descisions on whether or not the
106 * incoming primitive needs to be passed to a thread for clipping.
107 * User clip planes are handled via cooperation with the VS thread.
109 * SF - Strips Fans or Setup: Triangles are prepared for
110 * rasterization. Interpolation coefficients are calculated.
111 * Flatshading and two-side lighting usually performed here.
113 * WM - Windower. Interpolation of vertex attributes performed here.
114 * Fragment shader implemented here. SIMD aspects of EU taken full
115 * advantage of, as pixels are processed in blocks of 16.
117 * CC - Color Calculator. No EU threads associated with this unit.
118 * Handles blending and (presumably) depth and stencil testing.
121 #define BRW_MAX_CURBE (32*16)
125 struct brw_depth_stencil_state
{
126 //struct pipe_depth_stencil_alpha_state templ; /* for draw module */
128 /* Precalculated hardware state:
138 struct brw_blend_state
{
139 //struct pipe_depth_stencil_alpha_state templ; /* for draw module */
141 /* Precalculated hardware state:
150 struct brw_rasterizer_state
;
153 struct brw_vertex_shader
{
154 const struct tgsi_token
*tokens
;
155 struct tgsi_shader_info info
;
158 struct brw_winsys_buffer
*const_buffer
; /** Program constant buffer/surface */
159 GLboolean use_const_buffer
;
163 struct brw_fragment_shader
{
164 const struct tgsi_token
*tokens
;
165 struct tgsi_shader_info info
;
170 struct brw_winsys_buffer
*const_buffer
; /** Program constant buffer/surface */
171 GLboolean use_const_buffer
;
176 #define PIPE_NEW_DEPTH_STENCIL_ALPHA 0x1
177 #define PIPE_NEW_RAST 0x2
178 #define PIPE_NEW_BLEND 0x4
179 #define PIPE_NEW_VIEWPORT 0x8
180 #define PIPE_NEW_SAMPLERS 0x10
181 #define PIPE_NEW_VERTEX_BUFFER 0x20
182 #define PIPE_NEW_VERTEX_ELEMENT 0x40
183 #define PIPE_NEW_FRAGMENT_SHADER 0x80
184 #define PIPE_NEW_VERTEX_SHADER 0x100
185 #define PIPE_NEW_FRAGMENT_CONSTANTS 0x200
186 #define PIPE_NEW_VERTEX_CONSTANTS 0x400
187 #define PIPE_NEW_CLIP 0x800
188 #define PIPE_NEW_INDEX_BUFFER 0x1000
189 #define PIPE_NEW_INDEX_RANGE 0x2000
190 #define PIPE_NEW_BLEND_COLOR 0x4000
191 #define PIPE_NEW_POLYGON_STIPPLE 0x8000
192 #define PIPE_NEW_FRAMEBUFFER_DIMENSIONS 0x10000
193 #define PIPE_NEW_DEPTH_BUFFER 0x20000
194 #define PIPE_NEW_COLOR_BUFFERS 0x40000
195 #define PIPE_NEW_QUERY 0x80000
196 #define PIPE_NEW_SCISSOR 0x100000
200 #define BRW_NEW_URB_FENCE 0x1
201 #define BRW_NEW_FRAGMENT_PROGRAM 0x2
202 #define BRW_NEW_VERTEX_PROGRAM 0x4
203 #define BRW_NEW_INPUT_DIMENSIONS 0x8
204 #define BRW_NEW_CURBE_OFFSETS 0x10
205 #define BRW_NEW_REDUCED_PRIMITIVE 0x20
206 #define BRW_NEW_PRIMITIVE 0x40
207 #define BRW_NEW_CONTEXT 0x80
208 #define BRW_NEW_WM_INPUT_DIMENSIONS 0x100
209 #define BRW_NEW_PSP 0x800
210 #define BRW_NEW_WM_SURFACES 0x1000
211 #define BRW_NEW_xxx 0x2000 /* was FENCE */
212 #define BRW_NEW_INDICES 0x4000
213 #define BRW_NEW_VERTICES 0x8000
215 * Used for any batch entry with a relocated pointer that will be used
216 * by any 3D rendering. Need to re-emit these fresh in each
217 * batchbuffer as the referenced buffers may be relocated in the
220 #define BRW_NEW_BATCH 0x10000
221 #define BRW_NEW_NR_WM_SURFACES 0x40000
222 #define BRW_NEW_NR_VS_SURFACES 0x80000
223 #define BRW_NEW_INDEX_BUFFER 0x100000
225 struct brw_state_flags
{
226 /** State update flags signalled by mesa internals */
229 * State update flags signalled as the result of brw_tracked_state updates
232 /** State update flags signalled by brw_state_cache.c searches */
238 /* Data about a particular attempt to compile a program. Note that
239 * there can be many of these, each in a different GL state
240 * corresponding to a different brw_wm_prog_key struct, with different
243 struct brw_wm_prog_data
{
244 GLuint curb_read_length
;
245 GLuint urb_read_length
;
247 GLuint first_curbe_grf
;
249 GLuint total_scratch
;
251 GLuint nr_params
; /**< number of float params/constants */
254 /* Pointer to tracked values (only valid once
255 * _mesa_load_state_parameters has been called at runtime).
257 const GLfloat
*param
[BRW_MAX_CURBE
];
260 struct brw_sf_prog_data
{
261 GLuint urb_read_length
;
264 /* Each vertex may have upto 12 attributes, 4 components each,
265 * except WPOS which requires only 2. (11*4 + 2) == 44 ==> 11
268 * Actually we use 4 for each, so call it 12 rows.
270 GLuint urb_entry_size
;
274 struct brw_clip_prog_data
;
276 struct brw_gs_prog_data
{
277 GLuint urb_read_length
;
281 struct brw_vs_prog_data
{
282 GLuint curb_read_length
;
283 GLuint urb_read_length
;
289 GLuint nr_params
; /**< number of TGSI_FILE_CONSTANT's */
291 GLboolean copy_edgeflag
;
292 GLboolean writes_psiz
;
294 /* Used for calculating urb partitions:
296 GLuint urb_entry_size
;
300 /* Size == 0 if output either not written, or always [0,0,0,1]
302 struct brw_vs_ouput_sizes
{
303 GLubyte output_size
[PIPE_MAX_SHADER_OUTPUTS
];
307 /** Number of texture sampler units */
308 #define BRW_MAX_TEX_UNIT 16
311 * Size of our surface binding table for the WM.
312 * This contains pointers to the drawing surfaces and current texture
313 * objects and shader constant buffers (+2).
315 #define BRW_WM_MAX_SURF (PIPE_MAX_COLOR_BUFS + BRW_MAX_TEX_UNIT + 1)
318 * Helpers to convert drawing buffers, textures and constant buffers
319 * to surface binding table indexes, for WM.
321 #define SURF_INDEX_DRAW(d) (d)
322 #define SURF_INDEX_FRAG_CONST_BUFFER (PIPE_MAX_COLOR_BUFS)
323 #define SURF_INDEX_TEXTURE(t) (PIPE_MAX_COLOR_BUFS + 1 + (t))
326 * Size of surface binding table for the VS.
327 * Only one constant buffer for now.
329 #define BRW_VS_MAX_SURF 1
332 * Only a VS constant buffer
334 #define SURF_INDEX_VERT_CONST_BUFFER 0
341 BRW_SAMPLER_DEFAULT_COLOR
,
360 struct brw_cache_item
{
362 * Effectively part of the key, cache_id identifies what kind of state
363 * buffer is involved, and also which brw->state.dirty.cache flag should
364 * be set when this cache item is chosen.
366 enum brw_cache_id cache_id
;
367 /** 32-bit hash of the key data */
369 GLuint key_size
; /* for variable-sized keys */
371 struct brw_winsys_buffer
**reloc_bufs
;
372 GLuint nr_reloc_bufs
;
374 struct brw_winsys_buffer
*bo
;
377 struct brw_cache_item
*next
;
383 struct brw_context
*brw
;
384 struct brw_winsys_screen
*sws
;
386 struct brw_cache_item
**items
;
387 GLuint size
, n_items
;
389 GLuint key_size
[BRW_MAX_CACHE
]; /* for fixed-size keys */
390 GLuint aux_size
[BRW_MAX_CACHE
];
391 char *name
[BRW_MAX_CACHE
];
394 /* Record of the last BOs chosen for each cache_id. Used to set
395 * brw->state.dirty.cache when a new cache item is chosen.
397 struct brw_winsys_buffer
*last_bo
[BRW_MAX_CACHE
];
401 struct brw_tracked_state
{
402 struct brw_state_flags dirty
;
403 int (*prepare
)( struct brw_context
*brw
);
404 int (*emit
)( struct brw_context
*brw
);
407 /* Flags for brw->state.cache.
409 #define CACHE_NEW_CC_VP (1<<BRW_CC_VP)
410 #define CACHE_NEW_CC_UNIT (1<<BRW_CC_UNIT)
411 #define CACHE_NEW_WM_PROG (1<<BRW_WM_PROG)
412 #define CACHE_NEW_SAMPLER_DEFAULT_COLOR (1<<BRW_SAMPLER_DEFAULT_COLOR)
413 #define CACHE_NEW_SAMPLER (1<<BRW_SAMPLER)
414 #define CACHE_NEW_WM_UNIT (1<<BRW_WM_UNIT)
415 #define CACHE_NEW_SF_PROG (1<<BRW_SF_PROG)
416 #define CACHE_NEW_SF_VP (1<<BRW_SF_VP)
417 #define CACHE_NEW_SF_UNIT (1<<BRW_SF_UNIT)
418 #define CACHE_NEW_VS_UNIT (1<<BRW_VS_UNIT)
419 #define CACHE_NEW_VS_PROG (1<<BRW_VS_PROG)
420 #define CACHE_NEW_GS_UNIT (1<<BRW_GS_UNIT)
421 #define CACHE_NEW_GS_PROG (1<<BRW_GS_PROG)
422 #define CACHE_NEW_CLIP_VP (1<<BRW_CLIP_VP)
423 #define CACHE_NEW_CLIP_UNIT (1<<BRW_CLIP_UNIT)
424 #define CACHE_NEW_CLIP_PROG (1<<BRW_CLIP_PROG)
425 #define CACHE_NEW_SURFACE (1<<BRW_SS_SURFACE)
426 #define CACHE_NEW_SURF_BIND (1<<BRW_SS_SURF_BIND)
428 struct brw_cached_batch_item
{
429 struct header
*header
;
431 struct brw_cached_batch_item
*next
;
436 /* Protect against a future where VERT_ATTRIB_MAX > 32. Wouldn't life
437 * be easier if C allowed arrays of packed elements?
439 #define VS_INPUT_BITMASK_DWORDS ((PIPE_MAX_SHADER_INPUTS+31)/32)
444 struct brw_vertex_info
{
445 GLuint sizes
[VS_INPUT_BITMASK_DWORDS
* 2]; /* sizes:2[VERT_ATTRIB_MAX] */
449 struct brw_query_object
{
450 /** Doubly linked list of active query objects in the context. */
451 struct brw_query_object
*prev
, *next
;
453 /** Last query BO associated with this query. */
454 struct brw_winsys_buffer
*bo
;
455 /** First index in bo with query data for this object. */
457 /** Last index in bo with query data for this object. */
460 /* Total count of pixels from previous BOs */
466 * brw_context is derived from pipe_context
470 struct pipe_context base
;
471 struct brw_chipset chipset
;
473 struct brw_screen
*brw_screen
;
474 struct brw_winsys_screen
*sws
;
476 struct brw_batchbuffer
*batch
;
479 GLuint reduced_primitive
;
481 /* Active state from the state tracker:
484 struct brw_vertex_shader
*vertex_shader
;
485 struct brw_fragment_shader
*fragment_shader
;
486 const struct brw_blend_state
*blend
;
487 const struct brw_rasterizer_state
*rast
;
488 const struct brw_depth_stencil_state
*zstencil
;
490 const struct pipe_texture
*texture
[PIPE_MAX_SAMPLERS
];
491 const struct pipe_sampler
*sampler
[PIPE_MAX_SAMPLERS
];
492 unsigned num_textures
;
493 unsigned num_samplers
;
496 struct pipe_vertex_element vertex_element
[PIPE_MAX_ATTRIBS
];
497 struct pipe_vertex_buffer vertex_buffer
[PIPE_MAX_ATTRIBS
];
498 unsigned num_vertex_elements
;
499 unsigned num_vertex_buffers
;
501 struct pipe_scissor_state scissor
;
502 struct pipe_framebuffer_state fb
;
503 struct pipe_viewport_state vp
;
504 struct pipe_clip_state ucp
;
505 struct pipe_buffer
*vertex_constants
;
506 struct pipe_buffer
*fragment_constants
;
508 struct pipe_viewport_state viewport
;
509 struct brw_blend_constant_color bcc
;
510 struct brw_polygon_stipple bps
;
515 * Index buffer for this draw_prims call.
517 * Updates are signaled by PIPE_NEW_INDEX_BUFFER.
519 struct pipe_buffer
*index_buffer
;
522 /* Updates are signalled by PIPE_NEW_INDEX_RANGE:
530 struct brw_state_flags dirty
;
533 * List of buffers accumulated in brw_validate_state to receive
534 * dri_bo_check_aperture treatment before exec, so we can know if we
535 * should flush the batch and try again before emitting primitives.
537 * This can be a fixed number as we only have a limited number of
538 * objects referenced from the batchbuffer in a primitive emit,
539 * consisting of the vertex buffers, pipelined state pointers,
540 * the CURBE, the depth buffer, and a query BO.
542 struct brw_winsys_buffer
*validated_bos
[PIPE_MAX_SHADER_INPUTS
+ 16];
543 int validated_bo_count
;
546 struct brw_cache cache
; /** non-surface items */
547 struct brw_cache surface_cache
; /* surface items */
548 struct brw_cached_batch_item
*cached_batch_items
;
551 struct u_upload_mgr
*upload_vertex
;
552 struct u_upload_mgr
*upload_index
;
554 /* Information on uploaded vertex buffers:
557 unsigned stride
; /* in bytes between successive vertices */
558 unsigned offset
; /* in bytes, of first vertex in bo */
559 unsigned vertex_count
; /* count of valid vertices which may be accessed */
560 struct brw_winsys_buffer
*bo
;
561 } vb
[PIPE_MAX_ATTRIBS
];
564 } ve
[PIPE_MAX_ATTRIBS
];
566 unsigned nr_vb
; /* currently the same as curr.num_vertex_buffers */
567 unsigned nr_ve
; /* currently the same as curr.num_vertex_elements */
571 /* Updates to these fields are signaled by BRW_NEW_INDEX_BUFFER. */
572 struct brw_winsys_buffer
*bo
;
575 /* Offset to index buffer index to use in CMD_3D_PRIM so that we can
576 * avoid re-uploading the IB packet over and over if we're actually
577 * referencing the same index buffer.
579 unsigned int start_vertex_offset
;
583 /* BRW_NEW_URB_ALLOCATIONS:
586 GLuint vsize
; /* vertex size plus header in urb registers */
587 GLuint csize
; /* constant buffer size in urb registers */
588 GLuint sfsize
; /* setup data size in urb registers */
590 GLboolean constrained
;
592 GLuint nr_vs_entries
;
593 GLuint nr_gs_entries
;
594 GLuint nr_clip_entries
;
595 GLuint nr_sf_entries
;
596 GLuint nr_cs_entries
;
606 /* BRW_NEW_CURBE_OFFSETS:
609 GLuint wm_start
; /**< pos of first wm const in CURBE buffer */
610 GLuint wm_size
; /**< number of float[4] consts, multiple of 16 */
617 struct brw_winsys_buffer
*curbe_bo
;
618 /** Offset within curbe_bo of space for current curbe entry */
620 /** Offset within curbe_bo of space for next curbe entry */
621 GLuint curbe_next_offset
;
626 * Whether we should create a new bo instead of reusing the old one
627 * (if we just dispatch the batch pointing at the old one.
629 GLboolean need_new_bo
;
633 struct brw_vs_prog_data
*prog_data
;
635 struct brw_winsys_buffer
*prog_bo
;
636 struct brw_winsys_buffer
*state_bo
;
638 /** Binding table of pointers to surf_bo entries */
639 struct brw_winsys_buffer
*bind_bo
;
640 struct brw_winsys_buffer
*surf_bo
[BRW_VS_MAX_SURF
];
645 struct brw_gs_prog_data
*prog_data
;
647 GLboolean prog_active
;
648 struct brw_winsys_buffer
*prog_bo
;
649 struct brw_winsys_buffer
*state_bo
;
653 struct brw_clip_prog_data
*prog_data
;
655 struct brw_winsys_buffer
*prog_bo
;
656 struct brw_winsys_buffer
*state_bo
;
657 struct brw_winsys_buffer
*vp_bo
;
662 struct brw_sf_prog_data
*prog_data
;
664 struct brw_winsys_buffer
*prog_bo
;
665 struct brw_winsys_buffer
*state_bo
;
666 struct brw_winsys_buffer
*vp_bo
;
670 struct brw_wm_prog_data
*prog_data
;
671 struct brw_wm_compile
*compile_data
;
673 /** Input sizes, calculated from active vertex program.
674 * One bit per fragment program input attribute.
676 //GLbitfield input_size_masks[4];
678 /** Array of surface default colors (texture border color) */
679 struct brw_winsys_buffer
*sdc_bo
[BRW_MAX_TEX_UNIT
];
685 struct brw_winsys_buffer
*scratch_bo
;
687 GLuint sampler_count
;
688 struct brw_winsys_buffer
*sampler_bo
;
690 /** Binding table of pointers to surf_bo entries */
691 struct brw_winsys_buffer
*bind_bo
;
692 struct brw_winsys_buffer
*surf_bo
[PIPE_MAX_COLOR_BUFS
];
694 struct brw_winsys_buffer
*prog_bo
;
695 struct brw_winsys_buffer
*state_bo
;
700 struct brw_winsys_buffer
*prog_bo
;
701 struct brw_winsys_buffer
*state_bo
;
702 struct brw_winsys_buffer
*vp_bo
;
706 struct brw_query_object active_head
;
707 struct brw_winsys_buffer
*bo
;
714 unsigned always_emit_state
:1;
715 unsigned always_flush_batch
:1;
716 unsigned force_swtnl
:1;
720 /* Used to give every program string a unique id
727 /*======================================================================
730 void brw_init_query(struct brw_context
*brw
);
731 void brw_prepare_query_begin(struct brw_context
*brw
);
732 void brw_emit_query_begin(struct brw_context
*brw
);
733 void brw_emit_query_end(struct brw_context
*brw
);
735 /*======================================================================
738 void brw_debug_batch(struct brw_context
*intel
);
741 /*======================================================================
744 void brw_pipe_blend_init( struct brw_context
*brw
);
745 void brw_pipe_depth_stencil_init( struct brw_context
*brw
);
746 void brw_pipe_framebuffer_init( struct brw_context
*brw
);
747 void brw_pipe_flush_init( struct brw_context
*brw
);
748 void brw_pipe_misc_init( struct brw_context
*brw
);
749 void brw_pipe_query_init( struct brw_context
*brw
);
750 void brw_pipe_rast_init( struct brw_context
*brw
);
751 void brw_pipe_sampler_init( struct brw_context
*brw
);
752 void brw_pipe_shader_init( struct brw_context
*brw
);
753 void brw_pipe_vertex_init( struct brw_context
*brw
);
755 void brw_pipe_blend_cleanup( struct brw_context
*brw
);
756 void brw_pipe_depth_stencil_cleanup( struct brw_context
*brw
);
757 void brw_pipe_framebuffer_cleanup( struct brw_context
*brw
);
758 void brw_pipe_flush_cleanup( struct brw_context
*brw
);
759 void brw_pipe_misc_cleanup( struct brw_context
*brw
);
760 void brw_pipe_query_cleanup( struct brw_context
*brw
);
761 void brw_pipe_rast_cleanup( struct brw_context
*brw
);
762 void brw_pipe_sampler_cleanup( struct brw_context
*brw
);
763 void brw_pipe_shader_cleanup( struct brw_context
*brw
);
764 void brw_pipe_vertex_cleanup( struct brw_context
*brw
);
769 int brw_upload_urb_fence(struct brw_context
*brw
);
773 int brw_upload_cs_urb_state(struct brw_context
*brw
);
776 int brw_disasm (FILE *file
, struct brw_instruction
*inst
);
778 /*======================================================================
779 * Inline conversion functions. These are better-typed than the
780 * macros used previously:
782 static INLINE
struct brw_context
*
783 brw_context( struct pipe_context
*ctx
)
785 return (struct brw_context
*)ctx
;
789 #define BRW_IS_965(brw) ((brw)->chipset.is_965)
790 #define BRW_IS_IGDNG(brw) ((brw)->chipset.is_igdng)
791 #define BRW_IS_G4X(brw) ((brw)->chipset.is_g4x)