src/gallium/drivers/i965/brw_context.h

   1 /*
   2  Copyright (C) Intel Corp.  2006.  All Rights Reserved.
   3  Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
   4  develop this 3D driver.
   5
   6  Permission is hereby granted, free of charge, to any person obtaining
   7  a copy of this software and associated documentation files (the
   8  "Software"), to deal in the Software without restriction, including
   9  without limitation the rights to use, copy, modify, merge, publish,
  10  distribute, sublicense, and/or sell copies of the Software, and to
  11  permit persons to whom the Software is furnished to do so, subject to
  12  the following conditions:
  13
  14  The above copyright notice and this permission notice (including the
  15  next paragraph) shall be included in all copies or substantial
  16  portions of the Software.
  17
  18  THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  19  EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  20  MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
  21  IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
  22  LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
  23  OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
  24  WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25
  26  **********************************************************************/
  27  /*
  28   * Authors:
  29   *   Keith Whitwell <keith@tungstengraphics.com>
  30   */
  31
  32
  33 #ifndef BRWCONTEXT_INC
  34 #define BRWCONTEXT_INC
  35
  36 #include "brw_structs.h"
  37 #include "brw_winsys.h"
  38 #include "brw_reg.h"
  39 #include "pipe/p_state.h"
  40 #include "pipe/p_context.h"
  41 #include "tgsi/tgsi_scan.h"
  42
  43
  44 /* Glossary:
  45  *
  46  * URB - uniform resource buffer.  A mid-sized buffer which is
  47  * partitioned between the fixed function units and used for passing
  48  * values (vertices, primitives, constants) between them.
  49  *
  50  * CURBE - constant URB entry.  An urb region (entry) used to hold
  51  * constant values which the fixed function units can be instructed to
  52  * preload into the GRF when spawning a thread.
  53  *
  54  * VUE - vertex URB entry.  An urb entry holding a vertex and usually
  55  * a vertex header.  The header contains control information and
  56  * things like primitive type, Begin/end flags and clip codes.
  57  *
  58  * PUE - primitive URB entry.  An urb entry produced by the setup (SF)
  59  * unit holding rasterization and interpolation parameters.
  60  *
  61  * GRF - general register file.  One of several register files
  62  * addressable by programmed threads.  The inputs (r0, payload, curbe,
  63  * urb) of the thread are preloaded to this area before the thread is
  64  * spawned.  The registers are individually 8 dwords wide and suitable
  65  * for general usage.  Registers holding thread input values are not
  66  * special and may be overwritten.
  67  *
  68  * MRF - message register file.  Threads communicate (and terminate)
  69  * by sending messages.  Message parameters are placed in contiguous
  70  * MRF registers.  All program output is via these messages.  URB
  71  * entries are populated by sending a message to the shared URB
  72  * function containing the new data, together with a control word,
  73  * often an unmodified copy of R0.
  74  *
  75  * R0 - GRF register 0.  Typically holds control information used when
  76  * sending messages to other threads.
  77  *
  78  * EU or GEN4 EU: The name of the programmable subsystem of the
  79  * i965 hardware.  Threads are executed by the EU, the registers
  80  * described above are part of the EU architecture.
  81  *
  82  * Fixed function units:
  83  *
  84  * CS - Command streamer.  Notional first unit, little software
  85  * interaction.  Holds the URB entries used for constant data, ie the
  86  * CURBEs.
  87  *
  88  * VF/VS - Vertex Fetch / Vertex Shader.  The fixed function part of
  89  * this unit is responsible for pulling vertices out of vertex buffers
  90  * in vram and injecting them into the processing pipe as VUEs.  If
  91  * enabled, it first passes them to a VS thread which is a good place
  92  * for the driver to implement any active vertex shader.
  93  *
  94  * GS - Geometry Shader.  This corresponds to a new DX10 concept.  If
  95  * enabled, incoming strips etc are passed to GS threads in individual
  96  * line/triangle/point units.  The GS thread may perform arbitary
  97  * computation and emit whatever primtives with whatever vertices it
  98  * chooses.  This makes GS an excellent place to implement GL's
  99  * unfilled polygon modes, though of course it is capable of much
 100  * more.  Additionally, GS is used to translate away primitives not
 101  * handled by latter units, including Quads and Lineloops.
 102  *
 103  * CS - Clipper.  Mesa's clipping algorithms are imported to run on
 104  * this unit.  The fixed function part performs cliptesting against
 105  * the 6 fixed clipplanes and makes descisions on whether or not the
 106  * incoming primitive needs to be passed to a thread for clipping.
 107  * User clip planes are handled via cooperation with the VS thread.
 108  *
 109  * SF - Strips Fans or Setup: Triangles are prepared for
 110  * rasterization.  Interpolation coefficients are calculated.
 111  * Flatshading and two-side lighting usually performed here.
 112  *
 113  * WM - Windower.  Interpolation of vertex attributes performed here.
 114  * Fragment shader implemented here.  SIMD aspects of EU taken full
 115  * advantage of, as pixels are processed in blocks of 16.
 116  *
 117  * CC - Color Calculator.  No EU threads associated with this unit.
 118  * Handles blending and (presumably) depth and stencil testing.
 119  */
 120
 121 #define BRW_MAX_CURBE                    (32*16)
 122
 123 struct brw_context;
 124
 125 struct brw_depth_stencil_state {
 126    //struct pipe_depth_stencil_alpha_state templ; /* for draw module */
 127
 128    /* Precalculated hardware state:
 129     */
 130    struct brw_cc0 cc0;
 131    struct brw_cc1 cc1;
 132    struct brw_cc2 cc2;
 133    struct brw_cc3 cc3;
 134    struct brw_cc7 cc7;
 135
 136    unsigned iz_lookup;
 137 };
 138
 139
 140 struct brw_blend_state {
 141    //struct pipe_depth_stencil_alpha_state templ; /* for draw module */
 142
 143    /* Precalculated hardware state:
 144     */
 145    struct brw_cc2 cc2;
 146    struct brw_cc3 cc3;
 147    struct brw_cc5 cc5;
 148    struct brw_cc6 cc6;
 149 };
 150
 151
 152 struct brw_rasterizer_state;
 153
 154
 155 struct brw_vertex_shader {
 156    const struct tgsi_token *tokens;
 157    struct tgsi_shader_info info;
 158
 159    unsigned id;
 160    struct brw_winsys_buffer *const_buffer;    /** Program constant buffer/surface */
 161    GLboolean use_const_buffer;
 162 };
 163
 164
 165 struct brw_fragment_shader {
 166    const struct tgsi_token *tokens;
 167    struct tgsi_shader_info info;
 168
 169    unsigned iz_lookup;
 170
 171    boolean  uses_depth:1;
 172    boolean  has_flow_control:1;
 173
 174    unsigned id;
 175    struct brw_winsys_buffer *const_buffer;    /** Program constant buffer/surface */
 176    GLboolean use_const_buffer;
 177 };
 178
 179
 180
 181 #define PIPE_NEW_DEPTH_STENCIL_ALPHA    0x1
 182 #define PIPE_NEW_RAST                   0x2
 183 #define PIPE_NEW_BLEND                  0x4
 184 #define PIPE_NEW_VIEWPORT               0x8
 185 #define PIPE_NEW_SAMPLERS               0x10
 186 #define PIPE_NEW_VERTEX_BUFFER          0x20
 187 #define PIPE_NEW_VERTEX_ELEMENT         0x40
 188 #define PIPE_NEW_FRAGMENT_SHADER        0x80
 189 #define PIPE_NEW_VERTEX_SHADER          0x100
 190 #define PIPE_NEW_FRAGMENT_CONSTANTS     0x200
 191 #define PIPE_NEW_VERTEX_CONSTANTS       0x400
 192 #define PIPE_NEW_CLIP                   0x800
 193 #define PIPE_NEW_INDEX_BUFFER           0x1000
 194 #define PIPE_NEW_INDEX_RANGE            0x2000
 195 #define PIPE_NEW_BLEND_COLOR            0x4000
 196 #define PIPE_NEW_POLYGON_STIPPLE        0x8000
 197 #define PIPE_NEW_FRAMEBUFFER_DIMENSIONS 0x10000
 198 #define PIPE_NEW_DEPTH_BUFFER           0x20000
 199 #define PIPE_NEW_COLOR_BUFFERS          0x40000
 200 #define PIPE_NEW_QUERY                  0x80000
 201 #define PIPE_NEW_SCISSOR                0x100000
 202 #define PIPE_NEW_BOUND_TEXTURES         0x200000
 203
 204
 205
 206 #define BRW_NEW_URB_FENCE               0x1
 207 #define BRW_NEW_FRAGMENT_PROGRAM        0x2
 208 #define BRW_NEW_VERTEX_PROGRAM          0x4
 209 #define BRW_NEW_INPUT_DIMENSIONS        0x8
 210 #define BRW_NEW_CURBE_OFFSETS           0x10
 211 #define BRW_NEW_REDUCED_PRIMITIVE       0x20
 212 #define BRW_NEW_PRIMITIVE               0x40
 213 #define BRW_NEW_CONTEXT                 0x80
 214 #define BRW_NEW_WM_INPUT_DIMENSIONS     0x100
 215 #define BRW_NEW_PSP                     0x800
 216 #define BRW_NEW_WM_SURFACES             0x1000
 217 #define BRW_NEW_xxx                     0x2000 /* was FENCE */
 218 #define BRW_NEW_INDICES                 0x4000
 219 #define BRW_NEW_VERTICES                0x8000
 220 /**
 221  * Used for any batch entry with a relocated pointer that will be used
 222  * by any 3D rendering.  Need to re-emit these fresh in each
 223  * batchbuffer as the referenced buffers may be relocated in the
 224  * meantime.
 225  */
 226 #define BRW_NEW_BATCH                   0x10000
 227 #define BRW_NEW_NR_WM_SURFACES          0x40000
 228 #define BRW_NEW_NR_VS_SURFACES          0x80000
 229 #define BRW_NEW_INDEX_BUFFER            0x100000
 230
 231 struct brw_state_flags {
 232    /** State update flags signalled by mesa internals */
 233    GLuint mesa;
 234    /**
 235     * State update flags signalled as the result of brw_tracked_state updates
 236     */
 237    GLuint brw;
 238    /** State update flags signalled by brw_state_cache.c searches */
 239    GLuint cache;
 240 };
 241
 242
 243
 244 /* Data about a particular attempt to compile a program.  Note that
 245  * there can be many of these, each in a different GL state
 246  * corresponding to a different brw_wm_prog_key struct, with different
 247  * compiled programs:
 248  */
 249 struct brw_wm_prog_data {
 250    GLuint curb_read_length;
 251    GLuint urb_read_length;
 252
 253    GLuint first_curbe_grf;
 254    GLuint total_grf;
 255    GLuint total_scratch;
 256
 257    GLuint nr_params;       /**< number of float params/constants */
 258    GLboolean error;
 259
 260    /* Pointer to tracked values (only valid once
 261     * _mesa_load_state_parameters has been called at runtime).
 262     */
 263    const GLfloat *param[BRW_MAX_CURBE];
 264 };
 265
 266 struct brw_sf_prog_data {
 267    GLuint urb_read_length;
 268    GLuint total_grf;
 269
 270    /* Each vertex may have upto 12 attributes, 4 components each,
 271     * except WPOS which requires only 2.  (11*4 + 2) == 44 ==> 11
 272     * rows.
 273     *
 274     * Actually we use 4 for each, so call it 12 rows.
 275     */
 276    GLuint urb_entry_size;
 277 };
 278
 279
 280 struct brw_clip_prog_data;
 281
 282 struct brw_gs_prog_data {
 283    GLuint urb_read_length;
 284    GLuint total_grf;
 285 };
 286
 287 struct brw_vs_prog_data {
 288    GLuint curb_read_length;
 289    GLuint urb_read_length;
 290    GLuint total_grf;
 291
 292    GLuint nr_outputs;
 293    GLuint nr_inputs;
 294
 295    GLuint nr_params;       /**< number of TGSI_FILE_CONSTANT's */
 296
 297    GLboolean copy_edgeflag;
 298    GLboolean writes_psiz;
 299
 300    /* Used for calculating urb partitions:
 301     */
 302    GLuint urb_entry_size;
 303 };
 304
 305
 306 /* Size == 0 if output either not written, or always [0,0,0,1]
 307  */
 308 struct brw_vs_ouput_sizes {
 309    GLubyte output_size[PIPE_MAX_SHADER_OUTPUTS];
 310 };
 311
 312
 313 /** Number of texture sampler units */
 314 #define BRW_MAX_TEX_UNIT 16
 315
 316 /**
 317  * Size of our surface binding table for the WM.
 318  * This contains pointers to the drawing surfaces and current texture
 319  * objects and shader constant buffers (+2).
 320  */
 321 #define BRW_WM_MAX_SURF (PIPE_MAX_COLOR_BUFS + BRW_MAX_TEX_UNIT + 1)
 322
 323 /**
 324  * Helpers to convert drawing buffers, textures and constant buffers
 325  * to surface binding table indexes, for WM.
 326  */
 327 #define SURF_INDEX_DRAW(d)           (d)
 328 #define SURF_INDEX_FRAG_CONST_BUFFER (PIPE_MAX_COLOR_BUFS)
 329 #define SURF_INDEX_TEXTURE(t)        (PIPE_MAX_COLOR_BUFS + 1 + (t))
 330
 331 /**
 332  * Size of surface binding table for the VS.
 333  * Only one constant buffer for now.
 334  */
 335 #define BRW_VS_MAX_SURF 1
 336
 337 /**
 338  * Only a VS constant buffer
 339  */
 340 #define SURF_INDEX_VERT_CONST_BUFFER 0
 341
 342
 343 enum brw_cache_id {
 344    BRW_CC_VP,
 345    BRW_CC_UNIT,
 346    BRW_WM_PROG,
 347    BRW_SAMPLER_DEFAULT_COLOR,
 348    BRW_SAMPLER,
 349    BRW_WM_UNIT,
 350    BRW_SF_PROG,
 351    BRW_SF_VP,
 352    BRW_SF_UNIT,
 353    BRW_VS_UNIT,
 354    BRW_VS_PROG,
 355    BRW_GS_UNIT,
 356    BRW_GS_PROG,
 357    BRW_CLIP_VP,
 358    BRW_CLIP_UNIT,
 359    BRW_CLIP_PROG,
 360    BRW_SS_SURFACE,
 361    BRW_SS_SURF_BIND,
 362
 363    BRW_MAX_CACHE
 364 };
 365
 366 struct brw_cache_item {
 367    /**
 368     * Effectively part of the key, cache_id identifies what kind of state
 369     * buffer is involved, and also which brw->state.dirty.cache flag should
 370     * be set when this cache item is chosen.
 371     */
 372    enum brw_cache_id cache_id;
 373    /** 32-bit hash of the key data */
 374    GLuint hash;
 375    GLuint key_size;             /* for variable-sized keys */
 376    const void *key;
 377    struct brw_winsys_buffer **reloc_bufs;
 378    GLuint nr_reloc_bufs;
 379
 380    struct brw_winsys_buffer *bo;
 381    GLuint data_size;
 382
 383    struct brw_cache_item *next;
 384 };
 385
 386
 387
 388 struct brw_cache {
 389    struct brw_context *brw;
 390    struct brw_winsys_screen *sws;
 391
 392    struct brw_cache_item **items;
 393    GLuint size, n_items;
 394
 395    GLuint key_size[BRW_MAX_CACHE];              /* for fixed-size keys */
 396    GLuint aux_size[BRW_MAX_CACHE];
 397    char *name[BRW_MAX_CACHE];
 398
 399
 400    /* Record of the last BOs chosen for each cache_id.  Used to set
 401     * brw->state.dirty.cache when a new cache item is chosen.
 402     */
 403    struct brw_winsys_buffer *last_bo[BRW_MAX_CACHE];
 404 };
 405
 406
 407 struct brw_tracked_state {
 408    struct brw_state_flags dirty;
 409    int (*prepare)( struct brw_context *brw );
 410    int (*emit)( struct brw_context *brw );
 411 };
 412
 413 /* Flags for brw->state.cache.
 414  */
 415 #define CACHE_NEW_CC_VP                  (1<<BRW_CC_VP)
 416 #define CACHE_NEW_CC_UNIT                (1<<BRW_CC_UNIT)
 417 #define CACHE_NEW_WM_PROG                (1<<BRW_WM_PROG)
 418 #define CACHE_NEW_SAMPLER_DEFAULT_COLOR  (1<<BRW_SAMPLER_DEFAULT_COLOR)
 419 #define CACHE_NEW_SAMPLER                (1<<BRW_SAMPLER)
 420 #define CACHE_NEW_WM_UNIT                (1<<BRW_WM_UNIT)
 421 #define CACHE_NEW_SF_PROG                (1<<BRW_SF_PROG)
 422 #define CACHE_NEW_SF_VP                  (1<<BRW_SF_VP)
 423 #define CACHE_NEW_SF_UNIT                (1<<BRW_SF_UNIT)
 424 #define CACHE_NEW_VS_UNIT                (1<<BRW_VS_UNIT)
 425 #define CACHE_NEW_VS_PROG                (1<<BRW_VS_PROG)
 426 #define CACHE_NEW_GS_UNIT                (1<<BRW_GS_UNIT)
 427 #define CACHE_NEW_GS_PROG                (1<<BRW_GS_PROG)
 428 #define CACHE_NEW_CLIP_VP                (1<<BRW_CLIP_VP)
 429 #define CACHE_NEW_CLIP_UNIT              (1<<BRW_CLIP_UNIT)
 430 #define CACHE_NEW_CLIP_PROG              (1<<BRW_CLIP_PROG)
 431 #define CACHE_NEW_SURFACE                (1<<BRW_SS_SURFACE)
 432 #define CACHE_NEW_SURF_BIND              (1<<BRW_SS_SURF_BIND)
 433
 434 struct brw_cached_batch_item {
 435    struct header *header;
 436    GLuint sz;
 437    struct brw_cached_batch_item *next;
 438 };
 439
 440
 441
 442 /* Protect against a future where VERT_ATTRIB_MAX > 32.  Wouldn't life
 443  * be easier if C allowed arrays of packed elements?
 444  */
 445 #define VS_INPUT_BITMASK_DWORDS  ((PIPE_MAX_SHADER_INPUTS+31)/32)
 446
 447
 448
 449
 450 struct brw_vertex_info {
 451    GLuint sizes[VS_INPUT_BITMASK_DWORDS * 2]; /* sizes:2[VERT_ATTRIB_MAX] */
 452 };
 453
 454
 455 struct brw_query_object {
 456    /** Doubly linked list of active query objects in the context. */
 457    struct brw_query_object *prev, *next;
 458
 459    /** Last query BO associated with this query. */
 460    struct brw_winsys_buffer *bo;
 461    /** First index in bo with query data for this object. */
 462    int first_index;
 463    /** Last index in bo with query data for this object. */
 464    int last_index;
 465
 466    /* Total count of pixels from previous BOs */
 467    uint64_t result;
 468 };
 469
 470
 471 /**
 472  * brw_context is derived from pipe_context
 473  */
 474 struct brw_context
 475 {
 476    struct pipe_context base;
 477    struct brw_chipset chipset;
 478
 479    struct brw_screen *brw_screen;
 480    struct brw_winsys_screen *sws;
 481
 482    struct brw_batchbuffer *batch;
 483
 484    GLuint primitive;
 485    GLuint reduced_primitive;
 486
 487    /* Active state from the state tracker:
 488     */
 489    struct {
 490       struct brw_vertex_shader *vertex_shader;
 491       struct brw_fragment_shader *fragment_shader;
 492       const struct brw_blend_state *blend;
 493       const struct brw_rasterizer_state *rast;
 494       const struct brw_depth_stencil_state *zstencil;
 495
 496       const struct brw_texture *texture[PIPE_MAX_SAMPLERS];
 497       const struct pipe_sampler *sampler[PIPE_MAX_SAMPLERS];
 498       unsigned num_textures;
 499       unsigned num_samplers;
 500
 501
 502       struct pipe_vertex_element vertex_element[PIPE_MAX_ATTRIBS];
 503       struct pipe_vertex_buffer vertex_buffer[PIPE_MAX_ATTRIBS];
 504       unsigned num_vertex_elements;
 505       unsigned num_vertex_buffers;
 506
 507       struct pipe_scissor_state scissor;
 508       struct pipe_framebuffer_state fb;
 509       struct pipe_viewport_state vp;
 510       struct pipe_clip_state ucp;
 511       struct pipe_buffer *vertex_constants;
 512       struct pipe_buffer *fragment_constants;
 513
 514       struct pipe_viewport_state viewport;
 515       struct brw_blend_constant_color bcc;
 516       struct brw_polygon_stipple bps;
 517
 518
 519
 520       /**
 521        * Index buffer for this draw_prims call.
 522        *
 523        * Updates are signaled by PIPE_NEW_INDEX_BUFFER.
 524        */
 525       struct pipe_buffer *index_buffer;
 526       unsigned index_size;
 527
 528       /* Updates are signalled by PIPE_NEW_INDEX_RANGE:
 529        */
 530       unsigned min_index;
 531       unsigned max_index;
 532
 533    } curr;
 534
 535    struct {
 536       struct brw_state_flags dirty;
 537
 538       /**
 539        * List of buffers accumulated in brw_validate_state to receive
 540        * dri_bo_check_aperture treatment before exec, so we can know if we
 541        * should flush the batch and try again before emitting primitives.
 542        *
 543        * This can be a fixed number as we only have a limited number of
 544        * objects referenced from the batchbuffer in a primitive emit,
 545        * consisting of the vertex buffers, pipelined state pointers,
 546        * the CURBE, the depth buffer, and a query BO.
 547        */
 548       struct brw_winsys_buffer *validated_bos[PIPE_MAX_SHADER_INPUTS + 16];
 549       int validated_bo_count;
 550    } state;
 551
 552    struct brw_cache cache;  /** non-surface items */
 553    struct brw_cache surface_cache;  /* surface items */
 554    struct brw_cached_batch_item *cached_batch_items;
 555
 556    struct {
 557       struct u_upload_mgr *upload_vertex;
 558       struct u_upload_mgr *upload_index;
 559
 560       /* Information on uploaded vertex buffers:
 561        */
 562       struct {
 563          unsigned stride;       /* in bytes between successive vertices */
 564          unsigned offset;       /* in bytes, of first vertex in bo */
 565          unsigned vertex_count; /* count of valid vertices which may be accessed */
 566          struct brw_winsys_buffer *bo;
 567       } vb[PIPE_MAX_ATTRIBS];
 568
 569       struct {
 570       } ve[PIPE_MAX_ATTRIBS];
 571
 572       unsigned nr_vb;           /* currently the same as curr.num_vertex_buffers */
 573       unsigned nr_ve;           /* currently the same as curr.num_vertex_elements */
 574    } vb;
 575
 576    struct {
 577       /* Updates to these fields are signaled by BRW_NEW_INDEX_BUFFER. */
 578       struct brw_winsys_buffer *bo;
 579       unsigned int offset;
 580       unsigned int size;
 581       /* Offset to index buffer index to use in CMD_3D_PRIM so that we can
 582        * avoid re-uploading the IB packet over and over if we're actually
 583        * referencing the same index buffer.
 584        */
 585       unsigned int start_vertex_offset;
 586    } ib;
 587
 588
 589    /* BRW_NEW_URB_ALLOCATIONS:
 590     */
 591    struct {
 592       GLuint vsize;             /* vertex size plus header in urb registers */
 593       GLuint csize;             /* constant buffer size in urb registers */
 594       GLuint sfsize;            /* setup data size in urb registers */
 595
 596       GLboolean constrained;
 597
 598       GLuint nr_vs_entries;
 599       GLuint nr_gs_entries;
 600       GLuint nr_clip_entries;
 601       GLuint nr_sf_entries;
 602       GLuint nr_cs_entries;
 603
 604       GLuint vs_start;
 605       GLuint gs_start;
 606       GLuint clip_start;
 607       GLuint sf_start;
 608       GLuint cs_start;
 609    } urb;
 610
 611
 612    /* BRW_NEW_CURBE_OFFSETS:
 613     */
 614    struct {
 615       GLuint wm_start;  /**< pos of first wm const in CURBE buffer */
 616       GLuint wm_size;   /**< number of float[4] consts, multiple of 16 */
 617       GLuint clip_start;
 618       GLuint clip_size;
 619       GLuint vs_start;
 620       GLuint vs_size;
 621       GLuint total_size;
 622
 623       struct brw_winsys_buffer *curbe_bo;
 624       /** Offset within curbe_bo of space for current curbe entry */
 625       GLuint curbe_offset;
 626       /** Offset within curbe_bo of space for next curbe entry */
 627       GLuint curbe_next_offset;
 628
 629       GLfloat *last_buf;
 630       GLuint last_bufsz;
 631       /**
 632        *  Whether we should create a new bo instead of reusing the old one
 633        * (if we just dispatch the batch pointing at the old one.
 634        */
 635       GLboolean need_new_bo;
 636    } curbe;
 637
 638    struct {
 639       struct brw_vs_prog_data *prog_data;
 640
 641       struct brw_winsys_buffer *prog_bo;
 642       struct brw_winsys_buffer *state_bo;
 643
 644       /** Binding table of pointers to surf_bo entries */
 645       struct brw_winsys_buffer *bind_bo;
 646       struct brw_winsys_buffer *surf_bo[BRW_VS_MAX_SURF];
 647       GLuint nr_surfaces;
 648    } vs;
 649
 650    struct {
 651       struct brw_gs_prog_data *prog_data;
 652
 653       GLboolean prog_active;
 654       struct brw_winsys_buffer *prog_bo;
 655       struct brw_winsys_buffer *state_bo;
 656    } gs;
 657
 658    struct {
 659       struct brw_clip_prog_data *prog_data;
 660
 661       struct brw_winsys_buffer *prog_bo;
 662       struct brw_winsys_buffer *state_bo;
 663       struct brw_winsys_buffer *vp_bo;
 664    } clip;
 665
 666
 667    struct {
 668       struct brw_sf_prog_data *prog_data;
 669
 670       struct brw_winsys_buffer *prog_bo;
 671       struct brw_winsys_buffer *state_bo;
 672       struct brw_winsys_buffer *vp_bo;
 673    } sf;
 674
 675    struct {
 676       struct brw_wm_prog_data *prog_data;
 677       struct brw_wm_compile *compile_data;
 678
 679       /** Input sizes, calculated from active vertex program.
 680        * One bit per fragment program input attribute.
 681        */
 682       //GLbitfield input_size_masks[4];
 683
 684       /** Array of surface default colors (texture border color) */
 685       struct brw_winsys_buffer *sdc_bo[BRW_MAX_TEX_UNIT];
 686
 687       GLuint render_surf;
 688       GLuint nr_surfaces;
 689
 690       GLuint max_threads;
 691       struct brw_winsys_buffer *scratch_bo;
 692
 693       GLuint sampler_count;
 694       struct brw_winsys_buffer *sampler_bo;
 695
 696       /** Binding table of pointers to surf_bo entries */
 697       struct brw_winsys_buffer *bind_bo;
 698       struct brw_winsys_buffer *surf_bo[PIPE_MAX_COLOR_BUFS];
 699
 700       struct brw_winsys_buffer *prog_bo;
 701       struct brw_winsys_buffer *state_bo;
 702    } wm;
 703
 704
 705    struct {
 706       struct brw_winsys_buffer *prog_bo;
 707       struct brw_winsys_buffer *state_bo;
 708       struct brw_winsys_buffer *vp_bo;
 709    } cc;
 710
 711    struct {
 712       struct brw_query_object active_head;
 713       struct brw_winsys_buffer *bo;
 714       int index;
 715       GLboolean active;
 716       int stats_wm;
 717    } query;
 718
 719    struct {
 720       unsigned always_emit_state:1;
 721       unsigned always_flush_batch:1;
 722       unsigned force_swtnl:1;
 723       unsigned no_swtnl:1;
 724    } flags;
 725
 726    /* Used to give every program string a unique id
 727     */
 728    GLuint program_id;
 729 };
 730
 731
 732
 733 /*======================================================================
 734  * brw_queryobj.c
 735  */
 736 void brw_init_query(struct brw_context *brw);
 737 void brw_prepare_query_begin(struct brw_context *brw);
 738 void brw_emit_query_begin(struct brw_context *brw);
 739 void brw_emit_query_end(struct brw_context *brw);
 740
 741 /*======================================================================
 742  * brw_state_dump.c
 743  */
 744 void brw_debug_batch(struct brw_context *intel);
 745
 746
 747 /*======================================================================
 748  * brw_pipe_*.c
 749  */
 750 void brw_pipe_blend_init( struct brw_context *brw );
 751 void brw_pipe_depth_stencil_init( struct brw_context *brw );
 752 void brw_pipe_framebuffer_init( struct brw_context *brw );
 753 void brw_pipe_flush_init( struct brw_context *brw );
 754 void brw_pipe_misc_init( struct brw_context *brw );
 755 void brw_pipe_query_init( struct brw_context *brw );
 756 void brw_pipe_rast_init( struct brw_context *brw );
 757 void brw_pipe_sampler_init( struct brw_context *brw );
 758 void brw_pipe_shader_init( struct brw_context *brw );
 759 void brw_pipe_vertex_init( struct brw_context *brw );
 760
 761 void brw_pipe_blend_cleanup( struct brw_context *brw );
 762 void brw_pipe_depth_stencil_cleanup( struct brw_context *brw );
 763 void brw_pipe_framebuffer_cleanup( struct brw_context *brw );
 764 void brw_pipe_flush_cleanup( struct brw_context *brw );
 765 void brw_pipe_misc_cleanup( struct brw_context *brw );
 766 void brw_pipe_query_cleanup( struct brw_context *brw );
 767 void brw_pipe_rast_cleanup( struct brw_context *brw );
 768 void brw_pipe_sampler_cleanup( struct brw_context *brw );
 769 void brw_pipe_shader_cleanup( struct brw_context *brw );
 770 void brw_pipe_vertex_cleanup( struct brw_context *brw );
 771
 772
 773 /* brw_urb.c
 774  */
 775 int brw_upload_urb_fence(struct brw_context *brw);
 776
 777 /* brw_curbe.c
 778  */
 779 int brw_upload_cs_urb_state(struct brw_context *brw);
 780
 781 /* brw_disasm.c */
 782 int brw_disasm (FILE *file, struct brw_instruction *inst);
 783
 784 /*======================================================================
 785  * Inline conversion functions.  These are better-typed than the
 786  * macros used previously:
 787  */
 788 static INLINE struct brw_context *
 789 brw_context( struct pipe_context *ctx )
 790 {
 791    return (struct brw_context *)ctx;
 792 }
 793
 794
 795 #define BRW_IS_965(brw)    ((brw)->chipset.is_965)
 796 #define BRW_IS_IGDNG(brw)  ((brw)->chipset.is_igdng)
 797 #define BRW_IS_G4X(brw)    ((brw)->chipset.is_g4x)
 798
 799
 800 #endif
 801