src/gallium/drivers/i965/brw_context.h

   1 /*
   2  Copyright (C) Intel Corp.  2006.  All Rights Reserved.
   3  Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
   4  develop this 3D driver.
   5
   6  Permission is hereby granted, free of charge, to any person obtaining
   7  a copy of this software and associated documentation files (the
   8  "Software"), to deal in the Software without restriction, including
   9  without limitation the rights to use, copy, modify, merge, publish,
  10  distribute, sublicense, and/or sell copies of the Software, and to
  11  permit persons to whom the Software is furnished to do so, subject to
  12  the following conditions:
  13
  14  The above copyright notice and this permission notice (including the
  15  next paragraph) shall be included in all copies or substantial
  16  portions of the Software.
  17
  18  THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  19  EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  20  MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
  21  IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
  22  LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
  23  OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
  24  WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25
  26  **********************************************************************/
  27  /*
  28   * Authors:
  29   *   Keith Whitwell <keith@tungstengraphics.com>
  30   */
  31
  32
  33 #ifndef BRWCONTEXT_INC
  34 #define BRWCONTEXT_INC
  35
  36 #include "brw_structs.h"
  37 #include "brw_winsys.h"
  38 #include "brw_reg.h"
  39 #include "pipe/p_state.h"
  40 #include "pipe/p_context.h"
  41 #include "tgsi/tgsi_scan.h"
  42
  43
  44 /* Glossary:
  45  *
  46  * URB - uniform resource buffer.  A mid-sized buffer which is
  47  * partitioned between the fixed function units and used for passing
  48  * values (vertices, primitives, constants) between them.
  49  *
  50  * CURBE - constant URB entry.  An urb region (entry) used to hold
  51  * constant values which the fixed function units can be instructed to
  52  * preload into the GRF when spawning a thread.
  53  *
  54  * VUE - vertex URB entry.  An urb entry holding a vertex and usually
  55  * a vertex header.  The header contains control information and
  56  * things like primitive type, Begin/end flags and clip codes.
  57  *
  58  * PUE - primitive URB entry.  An urb entry produced by the setup (SF)
  59  * unit holding rasterization and interpolation parameters.
  60  *
  61  * GRF - general register file.  One of several register files
  62  * addressable by programmed threads.  The inputs (r0, payload, curbe,
  63  * urb) of the thread are preloaded to this area before the thread is
  64  * spawned.  The registers are individually 8 dwords wide and suitable
  65  * for general usage.  Registers holding thread input values are not
  66  * special and may be overwritten.
  67  *
  68  * MRF - message register file.  Threads communicate (and terminate)
  69  * by sending messages.  Message parameters are placed in contiguous
  70  * MRF registers.  All program output is via these messages.  URB
  71  * entries are populated by sending a message to the shared URB
  72  * function containing the new data, together with a control word,
  73  * often an unmodified copy of R0.
  74  *
  75  * R0 - GRF register 0.  Typically holds control information used when
  76  * sending messages to other threads.
  77  *
  78  * EU or GEN4 EU: The name of the programmable subsystem of the
  79  * i965 hardware.  Threads are executed by the EU, the registers
  80  * described above are part of the EU architecture.
  81  *
  82  * Fixed function units:
  83  *
  84  * CS - Command streamer.  Notional first unit, little software
  85  * interaction.  Holds the URB entries used for constant data, ie the
  86  * CURBEs.
  87  *
  88  * VF/VS - Vertex Fetch / Vertex Shader.  The fixed function part of
  89  * this unit is responsible for pulling vertices out of vertex buffers
  90  * in vram and injecting them into the processing pipe as VUEs.  If
  91  * enabled, it first passes them to a VS thread which is a good place
  92  * for the driver to implement any active vertex shader.
  93  *
  94  * GS - Geometry Shader.  This corresponds to a new DX10 concept.  If
  95  * enabled, incoming strips etc are passed to GS threads in individual
  96  * line/triangle/point units.  The GS thread may perform arbitary
  97  * computation and emit whatever primtives with whatever vertices it
  98  * chooses.  This makes GS an excellent place to implement GL's
  99  * unfilled polygon modes, though of course it is capable of much
 100  * more.  Additionally, GS is used to translate away primitives not
 101  * handled by latter units, including Quads and Lineloops.
 102  *
 103  * CS - Clipper.  Mesa's clipping algorithms are imported to run on
 104  * this unit.  The fixed function part performs cliptesting against
 105  * the 6 fixed clipplanes and makes descisions on whether or not the
 106  * incoming primitive needs to be passed to a thread for clipping.
 107  * User clip planes are handled via cooperation with the VS thread.
 108  *
 109  * SF - Strips Fans or Setup: Triangles are prepared for
 110  * rasterization.  Interpolation coefficients are calculated.
 111  * Flatshading and two-side lighting usually performed here.
 112  *
 113  * WM - Windower.  Interpolation of vertex attributes performed here.
 114  * Fragment shader implemented here.  SIMD aspects of EU taken full
 115  * advantage of, as pixels are processed in blocks of 16.
 116  *
 117  * CC - Color Calculator.  No EU threads associated with this unit.
 118  * Handles blending and (presumably) depth and stencil testing.
 119  */
 120
 121 #define BRW_MAX_CURBE                    (32*16)
 122
 123 struct brw_context;
 124
 125 struct brw_depth_stencil_state {
 126    //struct pipe_depth_stencil_alpha_state templ; /* for draw module */
 127
 128    /* Precalculated hardware state:
 129     */
 130    struct brw_cc0 cc0;
 131    struct brw_cc1 cc1;
 132    struct brw_cc2 cc2;
 133    struct brw_cc3 cc3;
 134    struct brw_cc7 cc7;
 135
 136    unsigned iz_lookup;
 137 };
 138
 139
 140 struct brw_blend_state {
 141    //struct pipe_depth_stencil_alpha_state templ; /* for draw module */
 142
 143    /* Precalculated hardware state:
 144     */
 145    struct brw_cc2 cc2;
 146    struct brw_cc3 cc3;
 147    struct brw_cc5 cc5;
 148    struct brw_cc6 cc6;
 149
 150    struct brw_surf_ss0 ss0;
 151 };
 152
 153
 154 struct brw_rasterizer_state;
 155
 156
 157 struct brw_vertex_shader {
 158    const struct tgsi_token *tokens;
 159    struct tgsi_shader_info info;
 160
 161    unsigned id;
 162    struct brw_winsys_buffer *const_buffer;    /** Program constant buffer/surface */
 163    GLboolean use_const_buffer;
 164 };
 165
 166
 167 struct brw_fragment_shader {
 168    const struct tgsi_token *tokens;
 169    struct tgsi_shader_info info;
 170
 171    unsigned iz_lookup;
 172
 173    boolean  uses_depth:1;
 174    boolean  has_flow_control:1;
 175
 176    unsigned id;
 177    struct brw_winsys_buffer *const_buffer;    /** Program constant buffer/surface */
 178    GLboolean use_const_buffer;
 179 };
 180
 181
 182 struct brw_sampler {
 183    struct pipe_sampler_state templ;
 184    struct brw_ss0 ss0;
 185    struct brw_ss1 ss1;
 186    struct brw_ss3 ss3;
 187 };
 188
 189
 190
 191 #define PIPE_NEW_DEPTH_STENCIL_ALPHA    0x1
 192 #define PIPE_NEW_RAST                   0x2
 193 #define PIPE_NEW_BLEND                  0x4
 194 #define PIPE_NEW_VIEWPORT               0x8
 195 #define PIPE_NEW_SAMPLERS               0x10
 196 #define PIPE_NEW_VERTEX_BUFFER          0x20
 197 #define PIPE_NEW_VERTEX_ELEMENT         0x40
 198 #define PIPE_NEW_FRAGMENT_SHADER        0x80
 199 #define PIPE_NEW_VERTEX_SHADER          0x100
 200 #define PIPE_NEW_FRAGMENT_CONSTANTS     0x200
 201 #define PIPE_NEW_VERTEX_CONSTANTS       0x400
 202 #define PIPE_NEW_CLIP                   0x800
 203 #define PIPE_NEW_INDEX_BUFFER           0x1000
 204 #define PIPE_NEW_INDEX_RANGE            0x2000
 205 #define PIPE_NEW_BLEND_COLOR            0x4000
 206 #define PIPE_NEW_POLYGON_STIPPLE        0x8000
 207 #define PIPE_NEW_FRAMEBUFFER_DIMENSIONS 0x10000
 208 #define PIPE_NEW_DEPTH_BUFFER           0x20000
 209 #define PIPE_NEW_COLOR_BUFFERS          0x40000
 210 #define PIPE_NEW_QUERY                  0x80000
 211 #define PIPE_NEW_SCISSOR                0x100000
 212 #define PIPE_NEW_BOUND_TEXTURES         0x200000
 213
 214
 215
 216 #define BRW_NEW_URB_FENCE               0x1
 217 #define BRW_NEW_FRAGMENT_PROGRAM        0x2
 218 #define BRW_NEW_VERTEX_PROGRAM          0x4
 219 #define BRW_NEW_INPUT_DIMENSIONS        0x8
 220 #define BRW_NEW_CURBE_OFFSETS           0x10
 221 #define BRW_NEW_REDUCED_PRIMITIVE       0x20
 222 #define BRW_NEW_PRIMITIVE               0x40
 223 #define BRW_NEW_CONTEXT                 0x80
 224 #define BRW_NEW_WM_INPUT_DIMENSIONS     0x100
 225 #define BRW_NEW_PSP                     0x800
 226 #define BRW_NEW_WM_SURFACES             0x1000
 227 #define BRW_NEW_xxx                     0x2000 /* was FENCE */
 228 #define BRW_NEW_INDICES                 0x4000
 229 #define BRW_NEW_VERTICES                0x8000
 230 /**
 231  * Used for any batch entry with a relocated pointer that will be used
 232  * by any 3D rendering.  Need to re-emit these fresh in each
 233  * batchbuffer as the referenced buffers may be relocated in the
 234  * meantime.
 235  */
 236 #define BRW_NEW_BATCH                   0x10000
 237 #define BRW_NEW_NR_WM_SURFACES          0x40000
 238 #define BRW_NEW_NR_VS_SURFACES          0x80000
 239 #define BRW_NEW_INDEX_BUFFER            0x100000
 240
 241 struct brw_state_flags {
 242    /** State update flags signalled by mesa internals */
 243    GLuint mesa;
 244    /**
 245     * State update flags signalled as the result of brw_tracked_state updates
 246     */
 247    GLuint brw;
 248    /** State update flags signalled by brw_state_cache.c searches */
 249    GLuint cache;
 250 };
 251
 252
 253
 254 /* Data about a particular attempt to compile a program.  Note that
 255  * there can be many of these, each in a different GL state
 256  * corresponding to a different brw_wm_prog_key struct, with different
 257  * compiled programs:
 258  */
 259 struct brw_wm_prog_data {
 260    GLuint curb_read_length;
 261    GLuint urb_read_length;
 262
 263    GLuint first_curbe_grf;
 264    GLuint total_grf;
 265    GLuint total_scratch;
 266
 267    GLuint nr_params;       /**< number of float params/constants */
 268    GLboolean error;
 269
 270    /* Pointer to tracked values (only valid once
 271     * _mesa_load_state_parameters has been called at runtime).
 272     */
 273    const GLfloat *param[BRW_MAX_CURBE];
 274 };
 275
 276 struct brw_sf_prog_data {
 277    GLuint urb_read_length;
 278    GLuint total_grf;
 279
 280    /* Each vertex may have upto 12 attributes, 4 components each,
 281     * except WPOS which requires only 2.  (11*4 + 2) == 44 ==> 11
 282     * rows.
 283     *
 284     * Actually we use 4 for each, so call it 12 rows.
 285     */
 286    GLuint urb_entry_size;
 287 };
 288
 289
 290 struct brw_clip_prog_data;
 291
 292 struct brw_gs_prog_data {
 293    GLuint urb_read_length;
 294    GLuint total_grf;
 295 };
 296
 297 struct brw_vs_prog_data {
 298    GLuint curb_read_length;
 299    GLuint urb_read_length;
 300    GLuint total_grf;
 301
 302    GLuint nr_outputs;
 303    GLuint nr_inputs;
 304
 305    GLuint nr_params;       /**< number of TGSI_FILE_CONSTANT's */
 306
 307    GLboolean copy_edgeflag;
 308    GLboolean writes_psiz;
 309
 310    /* Used for calculating urb partitions:
 311     */
 312    GLuint urb_entry_size;
 313 };
 314
 315
 316 /* Size == 0 if output either not written, or always [0,0,0,1]
 317  */
 318 struct brw_vs_ouput_sizes {
 319    GLubyte output_size[PIPE_MAX_SHADER_OUTPUTS];
 320 };
 321
 322
 323 /** Number of texture sampler units */
 324 #define BRW_MAX_TEX_UNIT 16
 325
 326 /**
 327  * Size of our surface binding table for the WM.
 328  * This contains pointers to the drawing surfaces and current texture
 329  * objects and shader constant buffers (+2).
 330  */
 331 #define BRW_WM_MAX_SURF (PIPE_MAX_COLOR_BUFS + BRW_MAX_TEX_UNIT + 1)
 332
 333 /**
 334  * Helpers to convert drawing buffers, textures and constant buffers
 335  * to surface binding table indexes, for WM.
 336  */
 337 #define SURF_INDEX_DRAW(d)           (d)
 338 #define SURF_INDEX_FRAG_CONST_BUFFER (PIPE_MAX_COLOR_BUFS)
 339 #define SURF_INDEX_TEXTURE(t)        (PIPE_MAX_COLOR_BUFS + 1 + (t))
 340
 341 /**
 342  * Size of surface binding table for the VS.
 343  * Only one constant buffer for now.
 344  */
 345 #define BRW_VS_MAX_SURF 1
 346
 347 /**
 348  * Only a VS constant buffer
 349  */
 350 #define SURF_INDEX_VERT_CONST_BUFFER 0
 351
 352
 353 enum brw_cache_id {
 354    BRW_CC_VP,
 355    BRW_CC_UNIT,
 356    BRW_WM_PROG,
 357    BRW_SAMPLER_DEFAULT_COLOR,
 358    BRW_SAMPLER,
 359    BRW_WM_UNIT,
 360    BRW_SF_PROG,
 361    BRW_SF_VP,
 362    BRW_SF_UNIT,
 363    BRW_VS_UNIT,
 364    BRW_VS_PROG,
 365    BRW_GS_UNIT,
 366    BRW_GS_PROG,
 367    BRW_CLIP_VP,
 368    BRW_CLIP_UNIT,
 369    BRW_CLIP_PROG,
 370    BRW_SS_SURFACE,
 371    BRW_SS_SURF_BIND,
 372
 373    BRW_MAX_CACHE
 374 };
 375
 376 struct brw_cache_item {
 377    /**
 378     * Effectively part of the key, cache_id identifies what kind of state
 379     * buffer is involved, and also which brw->state.dirty.cache flag should
 380     * be set when this cache item is chosen.
 381     */
 382    enum brw_cache_id cache_id;
 383    /** 32-bit hash of the key data */
 384    GLuint hash;
 385    GLuint key_size;             /* for variable-sized keys */
 386    const void *key;
 387    struct brw_winsys_buffer **reloc_bufs;
 388    GLuint nr_reloc_bufs;
 389
 390    struct brw_winsys_buffer *bo;
 391    GLuint data_size;
 392
 393    struct brw_cache_item *next;
 394 };
 395
 396
 397
 398 struct brw_cache {
 399    struct brw_context *brw;
 400    struct brw_winsys_screen *sws;
 401
 402    struct brw_cache_item **items;
 403    GLuint size, n_items;
 404
 405    GLuint key_size[BRW_MAX_CACHE];              /* for fixed-size keys */
 406    GLuint aux_size[BRW_MAX_CACHE];
 407    char *name[BRW_MAX_CACHE];
 408
 409
 410    /* Record of the last BOs chosen for each cache_id.  Used to set
 411     * brw->state.dirty.cache when a new cache item is chosen.
 412     */
 413    struct brw_winsys_buffer *last_bo[BRW_MAX_CACHE];
 414 };
 415
 416
 417 struct brw_tracked_state {
 418    struct brw_state_flags dirty;
 419    int (*prepare)( struct brw_context *brw );
 420    int (*emit)( struct brw_context *brw );
 421 };
 422
 423 /* Flags for brw->state.cache.
 424  */
 425 #define CACHE_NEW_CC_VP                  (1<<BRW_CC_VP)
 426 #define CACHE_NEW_CC_UNIT                (1<<BRW_CC_UNIT)
 427 #define CACHE_NEW_WM_PROG                (1<<BRW_WM_PROG)
 428 #define CACHE_NEW_SAMPLER_DEFAULT_COLOR  (1<<BRW_SAMPLER_DEFAULT_COLOR)
 429 #define CACHE_NEW_SAMPLER                (1<<BRW_SAMPLER)
 430 #define CACHE_NEW_WM_UNIT                (1<<BRW_WM_UNIT)
 431 #define CACHE_NEW_SF_PROG                (1<<BRW_SF_PROG)
 432 #define CACHE_NEW_SF_VP                  (1<<BRW_SF_VP)
 433 #define CACHE_NEW_SF_UNIT                (1<<BRW_SF_UNIT)
 434 #define CACHE_NEW_VS_UNIT                (1<<BRW_VS_UNIT)
 435 #define CACHE_NEW_VS_PROG                (1<<BRW_VS_PROG)
 436 #define CACHE_NEW_GS_UNIT                (1<<BRW_GS_UNIT)
 437 #define CACHE_NEW_GS_PROG                (1<<BRW_GS_PROG)
 438 #define CACHE_NEW_CLIP_VP                (1<<BRW_CLIP_VP)
 439 #define CACHE_NEW_CLIP_UNIT              (1<<BRW_CLIP_UNIT)
 440 #define CACHE_NEW_CLIP_PROG              (1<<BRW_CLIP_PROG)
 441 #define CACHE_NEW_SURFACE                (1<<BRW_SS_SURFACE)
 442 #define CACHE_NEW_SURF_BIND              (1<<BRW_SS_SURF_BIND)
 443
 444 struct brw_cached_batch_item {
 445    struct header *header;
 446    GLuint sz;
 447    struct brw_cached_batch_item *next;
 448 };
 449
 450
 451
 452 /* Protect against a future where VERT_ATTRIB_MAX > 32.  Wouldn't life
 453  * be easier if C allowed arrays of packed elements?
 454  */
 455 #define VS_INPUT_BITMASK_DWORDS  ((PIPE_MAX_SHADER_INPUTS+31)/32)
 456
 457
 458
 459
 460 struct brw_vertex_info {
 461    GLuint sizes[VS_INPUT_BITMASK_DWORDS * 2]; /* sizes:2[VERT_ATTRIB_MAX] */
 462 };
 463
 464
 465 struct brw_query_object {
 466    /** Doubly linked list of active query objects in the context. */
 467    struct brw_query_object *prev, *next;
 468
 469    /** Last query BO associated with this query. */
 470    struct brw_winsys_buffer *bo;
 471    /** First index in bo with query data for this object. */
 472    int first_index;
 473    /** Last index in bo with query data for this object. */
 474    int last_index;
 475
 476    /* Total count of pixels from previous BOs */
 477    uint64_t result;
 478 };
 479
 480
 481 /**
 482  * brw_context is derived from pipe_context
 483  */
 484 struct brw_context
 485 {
 486    struct pipe_context base;
 487    struct brw_chipset chipset;
 488
 489    struct brw_screen *brw_screen;
 490    struct brw_winsys_screen *sws;
 491
 492    struct brw_batchbuffer *batch;
 493
 494    GLuint primitive;
 495    GLuint reduced_primitive;
 496
 497    /* Active state from the state tracker:
 498     */
 499    struct {
 500       struct brw_vertex_shader *vertex_shader;
 501       struct brw_fragment_shader *fragment_shader;
 502       const struct brw_blend_state *blend;
 503       const struct brw_rasterizer_state *rast;
 504       const struct brw_depth_stencil_state *zstencil;
 505
 506       const struct brw_sampler *sampler[PIPE_MAX_SAMPLERS];
 507       const struct pipe_vertex_element vertex_element[PIPE_MAX_ATTRIBS];
 508       unsigned num_vertex_elements;
 509       unsigned num_samplers;
 510
 511       struct brw_texture *texture[PIPE_MAX_SAMPLERS];
 512       struct pipe_vertex_buffer vertex_buffer[PIPE_MAX_ATTRIBS];
 513       unsigned num_textures;
 514       unsigned num_vertex_buffers;
 515
 516       struct pipe_scissor_state scissor;
 517       struct pipe_framebuffer_state fb;
 518       struct pipe_viewport_state vp;
 519       struct pipe_clip_state ucp;
 520       struct pipe_buffer *vertex_constants;
 521       struct pipe_buffer *fragment_constants;
 522
 523       struct pipe_viewport_state viewport;
 524       struct brw_blend_constant_color bcc;
 525       struct brw_polygon_stipple bps;
 526
 527
 528
 529       /**
 530        * Index buffer for this draw_prims call.
 531        *
 532        * Updates are signaled by PIPE_NEW_INDEX_BUFFER.
 533        */
 534       struct pipe_buffer *index_buffer;
 535       unsigned index_size;
 536
 537       /* Updates are signalled by PIPE_NEW_INDEX_RANGE:
 538        */
 539       unsigned min_index;
 540       unsigned max_index;
 541
 542    } curr;
 543
 544    struct {
 545       struct brw_state_flags dirty;
 546
 547       /**
 548        * List of buffers accumulated in brw_validate_state to receive
 549        * dri_bo_check_aperture treatment before exec, so we can know if we
 550        * should flush the batch and try again before emitting primitives.
 551        *
 552        * This can be a fixed number as we only have a limited number of
 553        * objects referenced from the batchbuffer in a primitive emit,
 554        * consisting of the vertex buffers, pipelined state pointers,
 555        * the CURBE, the depth buffer, and a query BO.
 556        */
 557       struct brw_winsys_buffer *validated_bos[PIPE_MAX_SHADER_INPUTS + 16];
 558       int validated_bo_count;
 559    } state;
 560
 561    struct brw_cache cache;  /** non-surface items */
 562    struct brw_cache surface_cache;  /* surface items */
 563    struct brw_cached_batch_item *cached_batch_items;
 564
 565    struct {
 566       struct u_upload_mgr *upload_vertex;
 567       struct u_upload_mgr *upload_index;
 568
 569       /* Information on uploaded vertex buffers:
 570        */
 571       struct {
 572          unsigned stride;       /* in bytes between successive vertices */
 573          unsigned offset;       /* in bytes, of first vertex in bo */
 574          unsigned vertex_count; /* count of valid vertices which may be accessed */
 575          struct brw_winsys_buffer *bo;
 576       } vb[PIPE_MAX_ATTRIBS];
 577
 578       struct {
 579       } ve[PIPE_MAX_ATTRIBS];
 580
 581       unsigned nr_vb;           /* currently the same as curr.num_vertex_buffers */
 582       unsigned nr_ve;           /* currently the same as curr.num_vertex_elements */
 583    } vb;
 584
 585    struct {
 586       /* Updates to these fields are signaled by BRW_NEW_INDEX_BUFFER. */
 587       struct brw_winsys_buffer *bo;
 588       unsigned int offset;
 589       unsigned int size;
 590       /* Offset to index buffer index to use in CMD_3D_PRIM so that we can
 591        * avoid re-uploading the IB packet over and over if we're actually
 592        * referencing the same index buffer.
 593        */
 594       unsigned int start_vertex_offset;
 595    } ib;
 596
 597
 598    /* BRW_NEW_URB_ALLOCATIONS:
 599     */
 600    struct {
 601       GLuint vsize;             /* vertex size plus header in urb registers */
 602       GLuint csize;             /* constant buffer size in urb registers */
 603       GLuint sfsize;            /* setup data size in urb registers */
 604
 605       GLboolean constrained;
 606
 607       GLuint nr_vs_entries;
 608       GLuint nr_gs_entries;
 609       GLuint nr_clip_entries;
 610       GLuint nr_sf_entries;
 611       GLuint nr_cs_entries;
 612
 613       GLuint vs_start;
 614       GLuint gs_start;
 615       GLuint clip_start;
 616       GLuint sf_start;
 617       GLuint cs_start;
 618    } urb;
 619
 620
 621    /* BRW_NEW_CURBE_OFFSETS:
 622     */
 623    struct {
 624       GLuint wm_start;  /**< pos of first wm const in CURBE buffer */
 625       GLuint wm_size;   /**< number of float[4] consts, multiple of 16 */
 626       GLuint clip_start;
 627       GLuint clip_size;
 628       GLuint vs_start;
 629       GLuint vs_size;
 630       GLuint total_size;
 631
 632       struct brw_winsys_buffer *curbe_bo;
 633       /** Offset within curbe_bo of space for current curbe entry */
 634       GLuint curbe_offset;
 635       /** Offset within curbe_bo of space for next curbe entry */
 636       GLuint curbe_next_offset;
 637
 638       GLfloat *last_buf;
 639       GLuint last_bufsz;
 640       /**
 641        *  Whether we should create a new bo instead of reusing the old one
 642        * (if we just dispatch the batch pointing at the old one.
 643        */
 644       GLboolean need_new_bo;
 645    } curbe;
 646
 647    struct {
 648       struct brw_vs_prog_data *prog_data;
 649
 650       struct brw_winsys_buffer *prog_bo;
 651       struct brw_winsys_buffer *state_bo;
 652
 653       /** Binding table of pointers to surf_bo entries */
 654       struct brw_winsys_buffer *bind_bo;
 655       struct brw_winsys_buffer *surf_bo[BRW_VS_MAX_SURF];
 656       GLuint nr_surfaces;
 657    } vs;
 658
 659    struct {
 660       struct brw_gs_prog_data *prog_data;
 661
 662       GLboolean prog_active;
 663       struct brw_winsys_buffer *prog_bo;
 664       struct brw_winsys_buffer *state_bo;
 665    } gs;
 666
 667    struct {
 668       struct brw_clip_prog_data *prog_data;
 669
 670       struct brw_winsys_buffer *prog_bo;
 671       struct brw_winsys_buffer *state_bo;
 672       struct brw_winsys_buffer *vp_bo;
 673    } clip;
 674
 675
 676    struct {
 677       struct brw_sf_prog_data *prog_data;
 678
 679       struct brw_winsys_buffer *prog_bo;
 680       struct brw_winsys_buffer *state_bo;
 681       struct brw_winsys_buffer *vp_bo;
 682    } sf;
 683
 684    struct {
 685       struct brw_wm_prog_data *prog_data;
 686       struct brw_wm_compile *compile_data;
 687
 688       /** Input sizes, calculated from active vertex program.
 689        * One bit per fragment program input attribute.
 690        */
 691       //GLbitfield input_size_masks[4];
 692
 693       /** Array of surface default colors (texture border color) */
 694       struct brw_winsys_buffer *sdc_bo[BRW_MAX_TEX_UNIT];
 695
 696       GLuint render_surf;
 697       GLuint nr_surfaces;
 698
 699       GLuint max_threads;
 700       struct brw_winsys_buffer *scratch_bo;
 701
 702       GLuint sampler_count;
 703       struct brw_winsys_buffer *sampler_bo;
 704
 705       /** Binding table of pointers to surf_bo entries */
 706       struct brw_winsys_buffer *bind_bo;
 707       struct brw_winsys_buffer *surf_bo[PIPE_MAX_COLOR_BUFS];
 708
 709       struct brw_winsys_buffer *prog_bo;
 710       struct brw_winsys_buffer *state_bo;
 711    } wm;
 712
 713
 714    struct {
 715       struct brw_winsys_buffer *prog_bo;
 716       struct brw_winsys_buffer *state_bo;
 717       struct brw_winsys_buffer *vp_bo;
 718    } cc;
 719
 720    struct {
 721       struct brw_query_object active_head;
 722       struct brw_winsys_buffer *bo;
 723       int index;
 724       GLboolean active;
 725       int stats_wm;
 726    } query;
 727
 728    struct {
 729       unsigned always_emit_state:1;
 730       unsigned always_flush_batch:1;
 731       unsigned force_swtnl:1;
 732       unsigned no_swtnl:1;
 733    } flags;
 734
 735    /* Used to give every program string a unique id
 736     */
 737    GLuint program_id;
 738 };
 739
 740
 741
 742 /*======================================================================
 743  * brw_queryobj.c
 744  */
 745 void brw_init_query(struct brw_context *brw);
 746 void brw_prepare_query_begin(struct brw_context *brw);
 747 void brw_emit_query_begin(struct brw_context *brw);
 748 void brw_emit_query_end(struct brw_context *brw);
 749
 750 /*======================================================================
 751  * brw_state_dump.c
 752  */
 753 void brw_debug_batch(struct brw_context *intel);
 754
 755
 756 /*======================================================================
 757  * brw_pipe_*.c
 758  */
 759 void brw_pipe_blend_init( struct brw_context *brw );
 760 void brw_pipe_depth_stencil_init( struct brw_context *brw );
 761 void brw_pipe_framebuffer_init( struct brw_context *brw );
 762 void brw_pipe_flush_init( struct brw_context *brw );
 763 void brw_pipe_misc_init( struct brw_context *brw );
 764 void brw_pipe_query_init( struct brw_context *brw );
 765 void brw_pipe_rast_init( struct brw_context *brw );
 766 void brw_pipe_sampler_init( struct brw_context *brw );
 767 void brw_pipe_shader_init( struct brw_context *brw );
 768 void brw_pipe_vertex_init( struct brw_context *brw );
 769
 770 void brw_pipe_blend_cleanup( struct brw_context *brw );
 771 void brw_pipe_depth_stencil_cleanup( struct brw_context *brw );
 772 void brw_pipe_framebuffer_cleanup( struct brw_context *brw );
 773 void brw_pipe_flush_cleanup( struct brw_context *brw );
 774 void brw_pipe_misc_cleanup( struct brw_context *brw );
 775 void brw_pipe_query_cleanup( struct brw_context *brw );
 776 void brw_pipe_rast_cleanup( struct brw_context *brw );
 777 void brw_pipe_sampler_cleanup( struct brw_context *brw );
 778 void brw_pipe_shader_cleanup( struct brw_context *brw );
 779 void brw_pipe_vertex_cleanup( struct brw_context *brw );
 780
 781
 782 /* brw_urb.c
 783  */
 784 int brw_upload_urb_fence(struct brw_context *brw);
 785
 786 /* brw_curbe.c
 787  */
 788 int brw_upload_cs_urb_state(struct brw_context *brw);
 789
 790 /* brw_disasm.c */
 791 int brw_disasm (FILE *file, struct brw_instruction *inst);
 792
 793 /*======================================================================
 794  * Inline conversion functions.  These are better-typed than the
 795  * macros used previously:
 796  */
 797 static INLINE struct brw_context *
 798 brw_context( struct pipe_context *ctx )
 799 {
 800    return (struct brw_context *)ctx;
 801 }
 802
 803
 804 #define BRW_IS_965(brw)    ((brw)->chipset.is_965)
 805 #define BRW_IS_IGDNG(brw)  ((brw)->chipset.is_igdng)
 806 #define BRW_IS_G4X(brw)    ((brw)->chipset.is_g4x)
 807
 808
 809 #endif
 810