Merge branch 'i965g-restart'
[mesa.git] / src / gallium / drivers / i965 / brw_context.h
1 /*
2 Copyright (C) Intel Corp. 2006. All Rights Reserved.
3 Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
4 develop this 3D driver.
5
6 Permission is hereby granted, free of charge, to any person obtaining
7 a copy of this software and associated documentation files (the
8 "Software"), to deal in the Software without restriction, including
9 without limitation the rights to use, copy, modify, merge, publish,
10 distribute, sublicense, and/or sell copies of the Software, and to
11 permit persons to whom the Software is furnished to do so, subject to
12 the following conditions:
13
14 The above copyright notice and this permission notice (including the
15 next paragraph) shall be included in all copies or substantial
16 portions of the Software.
17
18 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
19 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
21 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
22 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
23 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
24 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25
26 **********************************************************************/
27 /*
28 * Authors:
29 * Keith Whitwell <keith@tungstengraphics.com>
30 */
31
32
33 #ifndef BRWCONTEXT_INC
34 #define BRWCONTEXT_INC
35
36 #include "brw_structs.h"
37 #include "brw_winsys.h"
38 #include "brw_reg.h"
39 #include "pipe/p_state.h"
40 #include "pipe/p_context.h"
41 #include "tgsi/tgsi_scan.h"
42
43
44 /* Glossary:
45 *
46 * URB - uniform resource buffer. A mid-sized buffer which is
47 * partitioned between the fixed function units and used for passing
48 * values (vertices, primitives, constants) between them.
49 *
50 * CURBE - constant URB entry. An urb region (entry) used to hold
51 * constant values which the fixed function units can be instructed to
52 * preload into the GRF when spawning a thread.
53 *
54 * VUE - vertex URB entry. An urb entry holding a vertex and usually
55 * a vertex header. The header contains control information and
56 * things like primitive type, Begin/end flags and clip codes.
57 *
58 * PUE - primitive URB entry. An urb entry produced by the setup (SF)
59 * unit holding rasterization and interpolation parameters.
60 *
61 * GRF - general register file. One of several register files
62 * addressable by programmed threads. The inputs (r0, payload, curbe,
63 * urb) of the thread are preloaded to this area before the thread is
64 * spawned. The registers are individually 8 dwords wide and suitable
65 * for general usage. Registers holding thread input values are not
66 * special and may be overwritten.
67 *
68 * MRF - message register file. Threads communicate (and terminate)
69 * by sending messages. Message parameters are placed in contiguous
70 * MRF registers. All program output is via these messages. URB
71 * entries are populated by sending a message to the shared URB
72 * function containing the new data, together with a control word,
73 * often an unmodified copy of R0.
74 *
75 * R0 - GRF register 0. Typically holds control information used when
76 * sending messages to other threads.
77 *
78 * EU or GEN4 EU: The name of the programmable subsystem of the
79 * i965 hardware. Threads are executed by the EU, the registers
80 * described above are part of the EU architecture.
81 *
82 * Fixed function units:
83 *
84 * CS - Command streamer. Notional first unit, little software
85 * interaction. Holds the URB entries used for constant data, ie the
86 * CURBEs.
87 *
88 * VF/VS - Vertex Fetch / Vertex Shader. The fixed function part of
89 * this unit is responsible for pulling vertices out of vertex buffers
90 * in vram and injecting them into the processing pipe as VUEs. If
91 * enabled, it first passes them to a VS thread which is a good place
92 * for the driver to implement any active vertex shader.
93 *
94 * GS - Geometry Shader. This corresponds to a new DX10 concept. If
95 * enabled, incoming strips etc are passed to GS threads in individual
96 * line/triangle/point units. The GS thread may perform arbitary
97 * computation and emit whatever primtives with whatever vertices it
98 * chooses. This makes GS an excellent place to implement GL's
99 * unfilled polygon modes, though of course it is capable of much
100 * more. Additionally, GS is used to translate away primitives not
101 * handled by latter units, including Quads and Lineloops.
102 *
103 * CS - Clipper. Mesa's clipping algorithms are imported to run on
104 * this unit. The fixed function part performs cliptesting against
105 * the 6 fixed clipplanes and makes decisions on whether or not the
106 * incoming primitive needs to be passed to a thread for clipping.
107 * User clip planes are handled via cooperation with the VS thread.
108 *
109 * SF - Strips Fans or Setup: Triangles are prepared for
110 * rasterization. Interpolation coefficients are calculated.
111 * Flatshading and two-side lighting usually performed here.
112 *
113 * WM - Windower. Interpolation of vertex attributes performed here.
114 * Fragment shader implemented here. SIMD aspects of EU taken full
115 * advantage of, as pixels are processed in blocks of 16.
116 *
117 * CC - Color Calculator. No EU threads associated with this unit.
118 * Handles blending and (presumably) depth and stencil testing.
119 */
120
121 #define BRW_MAX_CURBE (32*16)
122
123 struct brw_context;
124
125 struct brw_depth_stencil_state {
126 /* Precalculated hardware state:
127 */
128 struct brw_cc0 cc0;
129 struct brw_cc1 cc1;
130 struct brw_cc2 cc2;
131 struct brw_cc3 cc3;
132 struct brw_cc7 cc7;
133
134 unsigned iz_lookup;
135 };
136
137
138 struct brw_blend_state {
139 /* Precalculated hardware state:
140 */
141 struct brw_cc2 cc2;
142 struct brw_cc3 cc3;
143 struct brw_cc5 cc5;
144 struct brw_cc6 cc6;
145
146 struct brw_surf_ss0 ss0;
147 };
148
149
150 struct brw_rasterizer_state;
151
152 struct brw_immediate_data {
153 unsigned nr;
154 float (*data)[4];
155 };
156
157 struct brw_vertex_shader {
158 const struct tgsi_token *tokens;
159 struct brw_winsys_buffer *const_buffer; /** Program constant buffer/surface */
160
161 struct tgsi_shader_info info;
162 struct brw_immediate_data immediates;
163
164 GLuint has_flow_control:1;
165 GLuint use_const_buffer:1;
166
167 /* Offsets of special vertex shader outputs required for clipping.
168 */
169 GLuint output_hpos:6; /* not always zero? */
170 GLuint output_color0:6;
171 GLuint output_color1:6;
172 GLuint output_bfc0:6;
173 GLuint output_bfc1:6;
174 GLuint output_edgeflag:6;
175
176 unsigned id;
177 };
178
179 struct brw_fs_signature {
180 GLuint nr_inputs;
181 struct {
182 GLuint interp:3; /* TGSI_INTERPOLATE_x */
183 GLuint semantic:5; /* TGSI_SEMANTIC_x */
184 GLuint semantic_index:24;
185 } input[PIPE_MAX_SHADER_INPUTS];
186 };
187
188 #define brw_fs_signature_size(s) (offsetof(struct brw_fs_signature, input) + \
189 ((s)->nr_inputs * sizeof (s)->input[0]))
190
191
192 struct brw_fragment_shader {
193 const struct tgsi_token *tokens;
194 struct tgsi_shader_info info;
195
196 struct brw_fs_signature signature;
197 struct brw_immediate_data immediates;
198
199 unsigned iz_lookup;
200 /*unsigned wm_lookup;*/
201
202 unsigned uses_depth:1;
203 unsigned has_flow_control:1;
204
205 unsigned id;
206 struct brw_winsys_buffer *const_buffer; /** Program constant buffer/surface */
207 GLboolean use_const_buffer;
208 };
209
210
211 struct brw_sampler {
212 struct brw_ss0 ss0;
213 struct brw_ss1 ss1;
214 float border_color[4];
215 struct brw_ss3 ss3;
216 };
217
218
219
220 #define PIPE_NEW_DEPTH_STENCIL_ALPHA 0x1
221 #define PIPE_NEW_RAST 0x2
222 #define PIPE_NEW_BLEND 0x4
223 #define PIPE_NEW_VIEWPORT 0x8
224 #define PIPE_NEW_SAMPLERS 0x10
225 #define PIPE_NEW_VERTEX_BUFFER 0x20
226 #define PIPE_NEW_VERTEX_ELEMENT 0x40
227 #define PIPE_NEW_FRAGMENT_SHADER 0x80
228 #define PIPE_NEW_VERTEX_SHADER 0x100
229 #define PIPE_NEW_FRAGMENT_CONSTANTS 0x200
230 #define PIPE_NEW_VERTEX_CONSTANTS 0x400
231 #define PIPE_NEW_CLIP 0x800
232 #define PIPE_NEW_INDEX_BUFFER 0x1000
233 #define PIPE_NEW_INDEX_RANGE 0x2000
234 #define PIPE_NEW_BLEND_COLOR 0x4000
235 #define PIPE_NEW_POLYGON_STIPPLE 0x8000
236 #define PIPE_NEW_FRAMEBUFFER_DIMENSIONS 0x10000
237 #define PIPE_NEW_DEPTH_BUFFER 0x20000
238 #define PIPE_NEW_COLOR_BUFFERS 0x40000
239 #define PIPE_NEW_QUERY 0x80000
240 #define PIPE_NEW_SCISSOR 0x100000
241 #define PIPE_NEW_BOUND_TEXTURES 0x200000
242 #define PIPE_NEW_NR_CBUFS 0x400000
243 #define PIPE_NEW_FRAGMENT_SIGNATURE 0x800000
244
245
246
247 #define BRW_NEW_URB_FENCE 0x1
248 #define BRW_NEW_FRAGMENT_PROGRAM 0x2
249 #define BRW_NEW_VERTEX_PROGRAM 0x4
250 #define BRW_NEW_INPUT_DIMENSIONS 0x8
251 #define BRW_NEW_CURBE_OFFSETS 0x10
252 #define BRW_NEW_REDUCED_PRIMITIVE 0x20
253 #define BRW_NEW_PRIMITIVE 0x40
254 #define BRW_NEW_CONTEXT 0x80
255 #define BRW_NEW_WM_INPUT_DIMENSIONS 0x100
256 #define BRW_NEW_PSP 0x800
257 #define BRW_NEW_WM_SURFACES 0x1000
258 #define BRW_NEW_xxx 0x2000 /* was FENCE */
259 #define BRW_NEW_INDICES 0x4000
260
261 /**
262 * Used for any batch entry with a relocated pointer that will be used
263 * by any 3D rendering. Need to re-emit these fresh in each
264 * batchbuffer as the referenced buffers may be relocated in the
265 * meantime.
266 */
267 #define BRW_NEW_BATCH 0x10000
268 #define BRW_NEW_NR_WM_SURFACES 0x40000
269 #define BRW_NEW_NR_VS_SURFACES 0x80000
270 #define BRW_NEW_INDEX_BUFFER 0x100000
271
272 struct brw_state_flags {
273 /** State update flags signalled by mesa internals */
274 GLuint mesa;
275 /**
276 * State update flags signalled as the result of brw_tracked_state updates
277 */
278 GLuint brw;
279 /** State update flags signalled by brw_state_cache.c searches */
280 GLuint cache;
281 };
282
283
284
285 /* Data about a particular attempt to compile a program. Note that
286 * there can be many of these, each in a different GL state
287 * corresponding to a different brw_wm_prog_key struct, with different
288 * compiled programs:
289 */
290 struct brw_wm_prog_data {
291 GLuint curb_read_length;
292 GLuint urb_read_length;
293
294 GLuint first_curbe_grf;
295 GLuint total_grf;
296 GLuint total_scratch;
297
298 GLuint nr_params; /**< number of float params/constants */
299 GLboolean error;
300
301 /* Pointer to tracked values (only valid once
302 * _mesa_load_state_parameters has been called at runtime).
303 */
304 const GLfloat *param[BRW_MAX_CURBE];
305 };
306
307 struct brw_sf_prog_data {
308 GLuint urb_read_length;
309 GLuint total_grf;
310
311 /* Each vertex may have upto 12 attributes, 4 components each,
312 * except WPOS which requires only 2. (11*4 + 2) == 44 ==> 11
313 * rows.
314 *
315 * Actually we use 4 for each, so call it 12 rows.
316 */
317 GLuint urb_entry_size;
318 };
319
320
321 struct brw_clip_prog_data;
322
323 struct brw_gs_prog_data {
324 GLuint urb_read_length;
325 GLuint total_grf;
326 };
327
328 struct brw_vs_prog_data {
329 GLuint curb_read_length;
330 GLuint urb_read_length;
331 GLuint total_grf;
332
333 GLuint nr_outputs;
334 GLuint nr_inputs;
335
336 GLuint nr_params; /**< number of TGSI_FILE_CONSTANT's */
337
338 GLuint output_edgeflag;
339
340 GLboolean writes_psiz;
341
342 /* Used for calculating urb partitions:
343 */
344 GLuint urb_entry_size;
345 };
346
347
348 /* Size == 0 if output either not written, or always [0,0,0,1]
349 */
350 struct brw_vs_ouput_sizes {
351 GLubyte output_size[PIPE_MAX_SHADER_OUTPUTS];
352 };
353
354
355 /** Number of texture sampler units */
356 #define BRW_MAX_TEX_UNIT 16
357
358 /** Max number of render targets in a shader */
359 #define BRW_MAX_DRAW_BUFFERS 4
360
361 /**
362 * Size of our surface binding table for the WM.
363 * This contains pointers to the drawing surfaces and current texture
364 * objects and shader constant buffers (+2).
365 */
366 #define BRW_WM_MAX_SURF (BRW_MAX_DRAW_BUFFERS + BRW_MAX_TEX_UNIT + 1)
367
368 /**
369 * Helpers to convert drawing buffers, textures and constant buffers
370 * to surface binding table indexes, for WM.
371 */
372 #define BTI_COLOR_BUF(d) (d)
373 #define BTI_FRAGMENT_CONSTANTS (BRW_MAX_DRAW_BUFFERS)
374 #define BTI_TEXTURE(t) (BRW_MAX_DRAW_BUFFERS + 1 + (t))
375
376 /**
377 * Size of surface binding table for the VS.
378 * Only one constant buffer for now.
379 */
380 #define BRW_VS_MAX_SURF 1
381
382 /**
383 * Only a VS constant buffer
384 */
385 #define SURF_INDEX_VERT_CONST_BUFFER 0
386
387
388 /* Bit of a hack to align these with the winsys buffer_data_type enum.
389 */
390 enum brw_cache_id {
391 BRW_CC_VP = BRW_DATA_GS_CC_VP,
392 BRW_CC_UNIT = BRW_DATA_GS_CC_UNIT,
393 BRW_WM_PROG = BRW_DATA_GS_WM_PROG,
394 BRW_SAMPLER_DEFAULT_COLOR = BRW_DATA_GS_SAMPLER_DEFAULT_COLOR,
395 BRW_SAMPLER = BRW_DATA_GS_SAMPLER,
396 BRW_WM_UNIT = BRW_DATA_GS_WM_UNIT,
397 BRW_SF_PROG = BRW_DATA_GS_SF_PROG,
398 BRW_SF_VP = BRW_DATA_GS_SF_VP,
399 BRW_SF_UNIT = BRW_DATA_GS_SF_UNIT,
400 BRW_VS_UNIT = BRW_DATA_GS_VS_UNIT,
401 BRW_VS_PROG = BRW_DATA_GS_VS_PROG,
402 BRW_GS_UNIT = BRW_DATA_GS_GS_UNIT,
403 BRW_GS_PROG = BRW_DATA_GS_GS_PROG,
404 BRW_CLIP_VP = BRW_DATA_GS_CLIP_VP,
405 BRW_CLIP_UNIT = BRW_DATA_GS_CLIP_UNIT,
406 BRW_CLIP_PROG = BRW_DATA_GS_CLIP_PROG,
407 BRW_SS_SURFACE = BRW_DATA_SS_SURFACE,
408 BRW_SS_SURF_BIND = BRW_DATA_SS_SURF_BIND,
409
410 BRW_MAX_CACHE
411 };
412
413 struct brw_cache_item {
414 /**
415 * Effectively part of the key, cache_id identifies what kind of state
416 * buffer is involved, and also which brw->state.dirty.cache flag should
417 * be set when this cache item is chosen.
418 */
419 enum brw_cache_id cache_id;
420 /** 32-bit hash of the key data */
421 GLuint hash;
422 GLuint key_size; /* for variable-sized keys */
423 const void *key;
424 struct brw_winsys_reloc *relocs;
425 GLuint nr_relocs;
426
427 struct brw_winsys_buffer *bo;
428 GLuint data_size;
429
430 struct brw_cache_item *next;
431 };
432
433
434
435 struct brw_cache {
436 struct brw_context *brw;
437 struct brw_winsys_screen *sws;
438
439 struct brw_cache_item **items;
440 GLuint size, n_items;
441
442 enum brw_buffer_type buffer_type;
443
444 GLuint key_size[BRW_MAX_CACHE]; /* for fixed-size keys */
445 GLuint aux_size[BRW_MAX_CACHE];
446 char *name[BRW_MAX_CACHE];
447
448
449 /* Record of the last BOs chosen for each cache_id. Used to set
450 * brw->state.dirty.cache when a new cache item is chosen.
451 */
452 struct brw_winsys_buffer *last_bo[BRW_MAX_CACHE];
453 };
454
455
456 struct brw_tracked_state {
457 struct brw_state_flags dirty;
458 int (*prepare)( struct brw_context *brw );
459 int (*emit)( struct brw_context *brw );
460 };
461
462 /* Flags for brw->state.cache.
463 */
464 #define CACHE_NEW_CC_VP (1<<BRW_CC_VP)
465 #define CACHE_NEW_CC_UNIT (1<<BRW_CC_UNIT)
466 #define CACHE_NEW_WM_PROG (1<<BRW_WM_PROG)
467 #define CACHE_NEW_SAMPLER_DEFAULT_COLOR (1<<BRW_SAMPLER_DEFAULT_COLOR)
468 #define CACHE_NEW_SAMPLER (1<<BRW_SAMPLER)
469 #define CACHE_NEW_WM_UNIT (1<<BRW_WM_UNIT)
470 #define CACHE_NEW_SF_PROG (1<<BRW_SF_PROG)
471 #define CACHE_NEW_SF_VP (1<<BRW_SF_VP)
472 #define CACHE_NEW_SF_UNIT (1<<BRW_SF_UNIT)
473 #define CACHE_NEW_VS_UNIT (1<<BRW_VS_UNIT)
474 #define CACHE_NEW_VS_PROG (1<<BRW_VS_PROG)
475 #define CACHE_NEW_GS_UNIT (1<<BRW_GS_UNIT)
476 #define CACHE_NEW_GS_PROG (1<<BRW_GS_PROG)
477 #define CACHE_NEW_CLIP_VP (1<<BRW_CLIP_VP)
478 #define CACHE_NEW_CLIP_UNIT (1<<BRW_CLIP_UNIT)
479 #define CACHE_NEW_CLIP_PROG (1<<BRW_CLIP_PROG)
480 #define CACHE_NEW_SURFACE (1<<BRW_SS_SURFACE)
481 #define CACHE_NEW_SURF_BIND (1<<BRW_SS_SURF_BIND)
482
483 struct brw_cached_batch_item {
484 struct header *header;
485 GLuint sz;
486 struct brw_cached_batch_item *next;
487 };
488
489
490
491 /* Protect against a future where VERT_ATTRIB_MAX > 32. Wouldn't life
492 * be easier if C allowed arrays of packed elements?
493 */
494 #define VS_INPUT_BITMASK_DWORDS ((PIPE_MAX_SHADER_INPUTS+31)/32)
495
496
497
498
499 struct brw_vertex_info {
500 GLuint sizes[VS_INPUT_BITMASK_DWORDS * 2]; /* sizes:2[VERT_ATTRIB_MAX] */
501 };
502
503
504 struct brw_query_object {
505 /** Doubly linked list of active query objects in the context. */
506 struct brw_query_object *prev, *next;
507
508 /** Last query BO associated with this query. */
509 struct brw_winsys_buffer *bo;
510 /** First index in bo with query data for this object. */
511 int first_index;
512 /** Last index in bo with query data for this object. */
513 int last_index;
514
515 /* Total count of pixels from previous BOs */
516 uint64_t result;
517 };
518
519 #define CC_RELOC_VP 0
520
521
522 /**
523 * brw_context is derived from pipe_context
524 */
525 struct brw_context
526 {
527 struct pipe_context base;
528 struct brw_chipset chipset;
529
530 struct brw_winsys_screen *sws;
531
532 struct brw_batchbuffer *batch;
533
534 GLuint primitive;
535 GLuint reduced_primitive;
536
537 /* Active state from the state tracker:
538 */
539 struct {
540 struct brw_vertex_shader *vertex_shader;
541 struct brw_fragment_shader *fragment_shader;
542 const struct brw_blend_state *blend;
543 const struct brw_rasterizer_state *rast;
544 const struct brw_depth_stencil_state *zstencil;
545
546 const struct brw_sampler *sampler[PIPE_MAX_SAMPLERS];
547 unsigned num_samplers;
548
549 struct pipe_texture *texture[PIPE_MAX_SAMPLERS];
550 struct pipe_vertex_buffer vertex_buffer[PIPE_MAX_ATTRIBS];
551 struct pipe_vertex_element vertex_element[PIPE_MAX_ATTRIBS];
552 unsigned num_vertex_elements;
553 unsigned num_textures;
554 unsigned num_vertex_buffers;
555
556 struct pipe_scissor_state scissor;
557 struct pipe_viewport_state viewport;
558 struct pipe_framebuffer_state fb;
559 struct pipe_clip_state ucp;
560 struct pipe_buffer *vertex_constants;
561 struct pipe_buffer *fragment_constants;
562
563 struct brw_blend_constant_color bcc;
564 struct brw_polygon_stipple bps;
565 struct brw_cc_viewport ccv;
566
567 /**
568 * Index buffer for this draw_prims call.
569 *
570 * Updates are signaled by PIPE_NEW_INDEX_BUFFER.
571 */
572 struct pipe_buffer *index_buffer;
573 unsigned index_size;
574
575 /* Updates are signalled by PIPE_NEW_INDEX_RANGE:
576 */
577 unsigned min_index;
578 unsigned max_index;
579
580 } curr;
581
582 struct {
583 struct brw_state_flags dirty;
584
585 /**
586 * List of buffers accumulated in brw_validate_state to receive
587 * dri_bo_check_aperture treatment before exec, so we can know if we
588 * should flush the batch and try again before emitting primitives.
589 *
590 * This can be a fixed number as we only have a limited number of
591 * objects referenced from the batchbuffer in a primitive emit,
592 * consisting of the vertex buffers, pipelined state pointers,
593 * the CURBE, the depth buffer, and a query BO.
594 */
595 struct brw_winsys_buffer *validated_bos[PIPE_MAX_SHADER_INPUTS + 16];
596 int validated_bo_count;
597 } state;
598
599 struct brw_cache cache; /** non-surface items */
600 struct brw_cache surface_cache; /* surface items */
601 struct brw_cached_batch_item *cached_batch_items;
602
603 struct {
604 struct u_upload_mgr *upload_vertex;
605 struct u_upload_mgr *upload_index;
606
607 /* Information on uploaded vertex buffers:
608 */
609 struct {
610 unsigned stride; /* in bytes between successive vertices */
611 unsigned offset; /* in bytes, of first vertex in bo */
612 unsigned vertex_count; /* count of valid vertices which may be accessed */
613 struct brw_winsys_buffer *bo;
614 } vb[PIPE_MAX_ATTRIBS];
615
616 unsigned nr_vb; /* currently the same as curr.num_vertex_buffers */
617 } vb;
618
619 struct {
620 /* Updates to these fields are signaled by BRW_NEW_INDEX_BUFFER. */
621 struct brw_winsys_buffer *bo;
622 unsigned int offset;
623 unsigned int size;
624 /* Offset to index buffer index to use in CMD_3D_PRIM so that we can
625 * avoid re-uploading the IB packet over and over if we're actually
626 * referencing the same index buffer.
627 */
628 unsigned int start_vertex_offset;
629 } ib;
630
631
632 /* BRW_NEW_URB_ALLOCATIONS:
633 */
634 struct {
635 GLuint vsize; /* vertex size plus header in urb registers */
636 GLuint csize; /* constant buffer size in urb registers */
637 GLuint sfsize; /* setup data size in urb registers */
638
639 GLboolean constrained;
640
641 GLuint nr_vs_entries;
642 GLuint nr_gs_entries;
643 GLuint nr_clip_entries;
644 GLuint nr_sf_entries;
645 GLuint nr_cs_entries;
646
647 GLuint vs_start;
648 GLuint gs_start;
649 GLuint clip_start;
650 GLuint sf_start;
651 GLuint cs_start;
652 } urb;
653
654
655 /* BRW_NEW_CURBE_OFFSETS:
656 */
657 struct {
658 GLuint wm_start; /**< pos of first wm const in CURBE buffer */
659 GLuint wm_size; /**< number of float[4] consts, multiple of 16 */
660 GLuint clip_start;
661 GLuint clip_size;
662 GLuint vs_start;
663 GLuint vs_size;
664 GLuint total_size;
665
666 struct brw_winsys_buffer *curbe_bo;
667 /** Offset within curbe_bo of space for current curbe entry */
668 GLuint curbe_offset;
669 /** Offset within curbe_bo of space for next curbe entry */
670 GLuint curbe_next_offset;
671
672 GLfloat *last_buf;
673 GLuint last_bufsz;
674 /**
675 * Whether we should create a new bo instead of reusing the old one
676 * (if we just dispatch the batch pointing at the old one.
677 */
678 GLboolean need_new_bo;
679 } curbe;
680
681 struct {
682 struct brw_vs_prog_data *prog_data;
683
684 struct brw_winsys_buffer *prog_bo;
685 struct brw_winsys_buffer *state_bo;
686
687 /** Binding table of pointers to surf_bo entries */
688 struct brw_winsys_buffer *bind_bo;
689 struct brw_winsys_buffer *surf_bo[BRW_VS_MAX_SURF];
690 GLuint nr_surfaces;
691 } vs;
692
693 struct {
694 struct brw_gs_prog_data *prog_data;
695
696 GLboolean prog_active;
697 struct brw_winsys_buffer *prog_bo;
698 struct brw_winsys_buffer *state_bo;
699 } gs;
700
701 struct {
702 struct brw_clip_prog_data *prog_data;
703
704 struct brw_winsys_buffer *prog_bo;
705 struct brw_winsys_buffer *state_bo;
706 struct brw_winsys_buffer *vp_bo;
707 } clip;
708
709
710 struct {
711 struct brw_sf_prog_data *prog_data;
712
713 struct brw_winsys_buffer *prog_bo;
714 struct brw_winsys_buffer *state_bo;
715 struct brw_winsys_buffer *vp_bo;
716 } sf;
717
718 struct {
719 struct brw_wm_prog_data *prog_data;
720 struct brw_wm_compile *compile_data;
721
722 /** Input sizes, calculated from active vertex program.
723 * One bit per fragment program input attribute.
724 */
725 /*GLbitfield input_size_masks[4];*/
726
727 /** Array of surface default colors (texture border color) */
728 struct brw_winsys_buffer *sdc_bo[BRW_MAX_TEX_UNIT];
729
730 GLuint render_surf;
731 GLuint nr_surfaces;
732
733 GLuint max_threads;
734 struct brw_winsys_buffer *scratch_bo;
735
736 GLuint sampler_count;
737 struct brw_winsys_buffer *sampler_bo;
738
739 /** Binding table of pointers to surf_bo entries */
740 struct brw_winsys_buffer *bind_bo;
741 struct brw_winsys_buffer *surf_bo[BRW_WM_MAX_SURF];
742
743 struct brw_winsys_buffer *prog_bo;
744 struct brw_winsys_buffer *state_bo;
745 } wm;
746
747
748 struct {
749 struct brw_winsys_buffer *state_bo;
750
751 struct brw_cc_unit_state cc;
752 struct brw_winsys_reloc reloc[1];
753 } cc;
754
755 struct {
756 struct brw_query_object active_head;
757 struct brw_winsys_buffer *bo;
758 int index;
759 GLboolean active;
760 int stats_wm;
761 } query;
762
763 struct {
764 unsigned always_emit_state:1;
765 unsigned always_flush_batch:1;
766 unsigned force_swtnl:1;
767 unsigned no_swtnl:1;
768 } flags;
769
770 /* Used to give every program string a unique id
771 */
772 GLuint program_id;
773 };
774
775
776
777 /*======================================================================
778 * brw_queryobj.c
779 */
780 void brw_init_query(struct brw_context *brw);
781 enum pipe_error brw_prepare_query_begin(struct brw_context *brw);
782 void brw_emit_query_begin(struct brw_context *brw);
783 void brw_emit_query_end(struct brw_context *brw);
784
785 /*======================================================================
786 * brw_state_dump.c
787 */
788 void brw_debug_batch(struct brw_context *intel);
789
790
791 /*======================================================================
792 * brw_pipe_*.c
793 */
794 void brw_pipe_blend_init( struct brw_context *brw );
795 void brw_pipe_depth_stencil_init( struct brw_context *brw );
796 void brw_pipe_framebuffer_init( struct brw_context *brw );
797 void brw_pipe_flush_init( struct brw_context *brw );
798 void brw_pipe_misc_init( struct brw_context *brw );
799 void brw_pipe_query_init( struct brw_context *brw );
800 void brw_pipe_rast_init( struct brw_context *brw );
801 void brw_pipe_sampler_init( struct brw_context *brw );
802 void brw_pipe_shader_init( struct brw_context *brw );
803 void brw_pipe_vertex_init( struct brw_context *brw );
804 void brw_pipe_clear_init( struct brw_context *brw );
805
806
807 void brw_pipe_blend_cleanup( struct brw_context *brw );
808 void brw_pipe_depth_stencil_cleanup( struct brw_context *brw );
809 void brw_pipe_framebuffer_cleanup( struct brw_context *brw );
810 void brw_pipe_flush_cleanup( struct brw_context *brw );
811 void brw_pipe_misc_cleanup( struct brw_context *brw );
812 void brw_pipe_query_cleanup( struct brw_context *brw );
813 void brw_pipe_rast_cleanup( struct brw_context *brw );
814 void brw_pipe_sampler_cleanup( struct brw_context *brw );
815 void brw_pipe_shader_cleanup( struct brw_context *brw );
816 void brw_pipe_vertex_cleanup( struct brw_context *brw );
817 void brw_pipe_clear_cleanup( struct brw_context *brw );
818
819 void brw_hw_cc_init( struct brw_context *brw );
820 void brw_hw_cc_cleanup( struct brw_context *brw );
821
822
823
824 void brw_context_flush( struct brw_context *brw );
825
826
827 /* brw_urb.c
828 */
829 int brw_upload_urb_fence(struct brw_context *brw);
830
831 /* brw_curbe.c
832 */
833 int brw_upload_cs_urb_state(struct brw_context *brw);
834
835
836 /*======================================================================
837 * Inline conversion functions. These are better-typed than the
838 * macros used previously:
839 */
840 static INLINE struct brw_context *
841 brw_context( struct pipe_context *ctx )
842 {
843 return (struct brw_context *)ctx;
844 }
845
846
847 #define BRW_IS_965(brw) ((brw)->chipset.is_965)
848 #define BRW_IS_IGDNG(brw) ((brw)->chipset.is_igdng)
849 #define BRW_IS_G4X(brw) ((brw)->chipset.is_g4x)
850
851
852 #endif
853