i965g: more work on compilation
[mesa.git] / src / gallium / drivers / i965 / brw_context.h
1 /*
2 Copyright (C) Intel Corp. 2006. All Rights Reserved.
3 Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
4 develop this 3D driver.
5
6 Permission is hereby granted, free of charge, to any person obtaining
7 a copy of this software and associated documentation files (the
8 "Software"), to deal in the Software without restriction, including
9 without limitation the rights to use, copy, modify, merge, publish,
10 distribute, sublicense, and/or sell copies of the Software, and to
11 permit persons to whom the Software is furnished to do so, subject to
12 the following conditions:
13
14 The above copyright notice and this permission notice (including the
15 next paragraph) shall be included in all copies or substantial
16 portions of the Software.
17
18 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
19 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
21 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
22 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
23 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
24 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25
26 **********************************************************************/
27 /*
28 * Authors:
29 * Keith Whitwell <keith@tungstengraphics.com>
30 */
31
32
33 #ifndef BRWCONTEXT_INC
34 #define BRWCONTEXT_INC
35
36 #include "brw_structs.h"
37 #include "brw_winsys.h"
38 #include "brw_reg.h"
39 #include "pipe/p_state.h"
40 #include "pipe/p_context.h"
41 #include "tgsi/tgsi_scan.h"
42
43
44 /* Glossary:
45 *
46 * URB - uniform resource buffer. A mid-sized buffer which is
47 * partitioned between the fixed function units and used for passing
48 * values (vertices, primitives, constants) between them.
49 *
50 * CURBE - constant URB entry. An urb region (entry) used to hold
51 * constant values which the fixed function units can be instructed to
52 * preload into the GRF when spawning a thread.
53 *
54 * VUE - vertex URB entry. An urb entry holding a vertex and usually
55 * a vertex header. The header contains control information and
56 * things like primitive type, Begin/end flags and clip codes.
57 *
58 * PUE - primitive URB entry. An urb entry produced by the setup (SF)
59 * unit holding rasterization and interpolation parameters.
60 *
61 * GRF - general register file. One of several register files
62 * addressable by programmed threads. The inputs (r0, payload, curbe,
63 * urb) of the thread are preloaded to this area before the thread is
64 * spawned. The registers are individually 8 dwords wide and suitable
65 * for general usage. Registers holding thread input values are not
66 * special and may be overwritten.
67 *
68 * MRF - message register file. Threads communicate (and terminate)
69 * by sending messages. Message parameters are placed in contiguous
70 * MRF registers. All program output is via these messages. URB
71 * entries are populated by sending a message to the shared URB
72 * function containing the new data, together with a control word,
73 * often an unmodified copy of R0.
74 *
75 * R0 - GRF register 0. Typically holds control information used when
76 * sending messages to other threads.
77 *
78 * EU or GEN4 EU: The name of the programmable subsystem of the
79 * i965 hardware. Threads are executed by the EU, the registers
80 * described above are part of the EU architecture.
81 *
82 * Fixed function units:
83 *
84 * CS - Command streamer. Notional first unit, little software
85 * interaction. Holds the URB entries used for constant data, ie the
86 * CURBEs.
87 *
88 * VF/VS - Vertex Fetch / Vertex Shader. The fixed function part of
89 * this unit is responsible for pulling vertices out of vertex buffers
90 * in vram and injecting them into the processing pipe as VUEs. If
91 * enabled, it first passes them to a VS thread which is a good place
92 * for the driver to implement any active vertex shader.
93 *
94 * GS - Geometry Shader. This corresponds to a new DX10 concept. If
95 * enabled, incoming strips etc are passed to GS threads in individual
96 * line/triangle/point units. The GS thread may perform arbitary
97 * computation and emit whatever primtives with whatever vertices it
98 * chooses. This makes GS an excellent place to implement GL's
99 * unfilled polygon modes, though of course it is capable of much
100 * more. Additionally, GS is used to translate away primitives not
101 * handled by latter units, including Quads and Lineloops.
102 *
103 * CS - Clipper. Mesa's clipping algorithms are imported to run on
104 * this unit. The fixed function part performs cliptesting against
105 * the 6 fixed clipplanes and makes descisions on whether or not the
106 * incoming primitive needs to be passed to a thread for clipping.
107 * User clip planes are handled via cooperation with the VS thread.
108 *
109 * SF - Strips Fans or Setup: Triangles are prepared for
110 * rasterization. Interpolation coefficients are calculated.
111 * Flatshading and two-side lighting usually performed here.
112 *
113 * WM - Windower. Interpolation of vertex attributes performed here.
114 * Fragment shader implemented here. SIMD aspects of EU taken full
115 * advantage of, as pixels are processed in blocks of 16.
116 *
117 * CC - Color Calculator. No EU threads associated with this unit.
118 * Handles blending and (presumably) depth and stencil testing.
119 */
120
121 #define BRW_MAX_CURBE (32*16)
122
123 struct brw_context;
124
125 struct brw_depth_stencil_state {
126 //struct pipe_depth_stencil_alpha_state templ; /* for draw module */
127
128 /* Precalculated hardware state:
129 */
130 struct brw_cc0 cc0;
131 struct brw_cc1 cc1;
132 struct brw_cc2 cc2;
133 struct brw_cc3 cc3;
134 struct brw_cc7 cc7;
135
136 unsigned iz_lookup;
137 };
138
139
140 struct brw_blend_state {
141 //struct pipe_depth_stencil_alpha_state templ; /* for draw module */
142
143 /* Precalculated hardware state:
144 */
145 struct brw_cc2 cc2;
146 struct brw_cc3 cc3;
147 struct brw_cc5 cc5;
148 struct brw_cc6 cc6;
149 };
150
151
152 struct brw_rasterizer_state;
153
154
155 struct brw_vertex_shader {
156 const struct tgsi_token *tokens;
157 struct tgsi_shader_info info;
158
159 unsigned id;
160 struct brw_winsys_buffer *const_buffer; /** Program constant buffer/surface */
161 GLboolean use_const_buffer;
162 };
163
164
165 struct brw_fragment_shader {
166 const struct tgsi_token *tokens;
167 struct tgsi_shader_info info;
168
169 unsigned iz_lookup;
170
171 boolean uses_depth:1;
172 boolean has_flow_control:1;
173
174 unsigned id;
175 struct brw_winsys_buffer *const_buffer; /** Program constant buffer/surface */
176 GLboolean use_const_buffer;
177 };
178
179
180 struct brw_sampler {
181 struct pipe_sampler_state templ;
182 struct brw_ss0 ss0;
183 struct brw_ss1 ss1;
184 struct brw_ss3 ss3;
185 };
186
187
188
189 #define PIPE_NEW_DEPTH_STENCIL_ALPHA 0x1
190 #define PIPE_NEW_RAST 0x2
191 #define PIPE_NEW_BLEND 0x4
192 #define PIPE_NEW_VIEWPORT 0x8
193 #define PIPE_NEW_SAMPLERS 0x10
194 #define PIPE_NEW_VERTEX_BUFFER 0x20
195 #define PIPE_NEW_VERTEX_ELEMENT 0x40
196 #define PIPE_NEW_FRAGMENT_SHADER 0x80
197 #define PIPE_NEW_VERTEX_SHADER 0x100
198 #define PIPE_NEW_FRAGMENT_CONSTANTS 0x200
199 #define PIPE_NEW_VERTEX_CONSTANTS 0x400
200 #define PIPE_NEW_CLIP 0x800
201 #define PIPE_NEW_INDEX_BUFFER 0x1000
202 #define PIPE_NEW_INDEX_RANGE 0x2000
203 #define PIPE_NEW_BLEND_COLOR 0x4000
204 #define PIPE_NEW_POLYGON_STIPPLE 0x8000
205 #define PIPE_NEW_FRAMEBUFFER_DIMENSIONS 0x10000
206 #define PIPE_NEW_DEPTH_BUFFER 0x20000
207 #define PIPE_NEW_COLOR_BUFFERS 0x40000
208 #define PIPE_NEW_QUERY 0x80000
209 #define PIPE_NEW_SCISSOR 0x100000
210 #define PIPE_NEW_BOUND_TEXTURES 0x200000
211
212
213
214 #define BRW_NEW_URB_FENCE 0x1
215 #define BRW_NEW_FRAGMENT_PROGRAM 0x2
216 #define BRW_NEW_VERTEX_PROGRAM 0x4
217 #define BRW_NEW_INPUT_DIMENSIONS 0x8
218 #define BRW_NEW_CURBE_OFFSETS 0x10
219 #define BRW_NEW_REDUCED_PRIMITIVE 0x20
220 #define BRW_NEW_PRIMITIVE 0x40
221 #define BRW_NEW_CONTEXT 0x80
222 #define BRW_NEW_WM_INPUT_DIMENSIONS 0x100
223 #define BRW_NEW_PSP 0x800
224 #define BRW_NEW_WM_SURFACES 0x1000
225 #define BRW_NEW_xxx 0x2000 /* was FENCE */
226 #define BRW_NEW_INDICES 0x4000
227 #define BRW_NEW_VERTICES 0x8000
228 /**
229 * Used for any batch entry with a relocated pointer that will be used
230 * by any 3D rendering. Need to re-emit these fresh in each
231 * batchbuffer as the referenced buffers may be relocated in the
232 * meantime.
233 */
234 #define BRW_NEW_BATCH 0x10000
235 #define BRW_NEW_NR_WM_SURFACES 0x40000
236 #define BRW_NEW_NR_VS_SURFACES 0x80000
237 #define BRW_NEW_INDEX_BUFFER 0x100000
238
239 struct brw_state_flags {
240 /** State update flags signalled by mesa internals */
241 GLuint mesa;
242 /**
243 * State update flags signalled as the result of brw_tracked_state updates
244 */
245 GLuint brw;
246 /** State update flags signalled by brw_state_cache.c searches */
247 GLuint cache;
248 };
249
250
251
252 /* Data about a particular attempt to compile a program. Note that
253 * there can be many of these, each in a different GL state
254 * corresponding to a different brw_wm_prog_key struct, with different
255 * compiled programs:
256 */
257 struct brw_wm_prog_data {
258 GLuint curb_read_length;
259 GLuint urb_read_length;
260
261 GLuint first_curbe_grf;
262 GLuint total_grf;
263 GLuint total_scratch;
264
265 GLuint nr_params; /**< number of float params/constants */
266 GLboolean error;
267
268 /* Pointer to tracked values (only valid once
269 * _mesa_load_state_parameters has been called at runtime).
270 */
271 const GLfloat *param[BRW_MAX_CURBE];
272 };
273
274 struct brw_sf_prog_data {
275 GLuint urb_read_length;
276 GLuint total_grf;
277
278 /* Each vertex may have upto 12 attributes, 4 components each,
279 * except WPOS which requires only 2. (11*4 + 2) == 44 ==> 11
280 * rows.
281 *
282 * Actually we use 4 for each, so call it 12 rows.
283 */
284 GLuint urb_entry_size;
285 };
286
287
288 struct brw_clip_prog_data;
289
290 struct brw_gs_prog_data {
291 GLuint urb_read_length;
292 GLuint total_grf;
293 };
294
295 struct brw_vs_prog_data {
296 GLuint curb_read_length;
297 GLuint urb_read_length;
298 GLuint total_grf;
299
300 GLuint nr_outputs;
301 GLuint nr_inputs;
302
303 GLuint nr_params; /**< number of TGSI_FILE_CONSTANT's */
304
305 GLboolean copy_edgeflag;
306 GLboolean writes_psiz;
307
308 /* Used for calculating urb partitions:
309 */
310 GLuint urb_entry_size;
311 };
312
313
314 /* Size == 0 if output either not written, or always [0,0,0,1]
315 */
316 struct brw_vs_ouput_sizes {
317 GLubyte output_size[PIPE_MAX_SHADER_OUTPUTS];
318 };
319
320
321 /** Number of texture sampler units */
322 #define BRW_MAX_TEX_UNIT 16
323
324 /**
325 * Size of our surface binding table for the WM.
326 * This contains pointers to the drawing surfaces and current texture
327 * objects and shader constant buffers (+2).
328 */
329 #define BRW_WM_MAX_SURF (PIPE_MAX_COLOR_BUFS + BRW_MAX_TEX_UNIT + 1)
330
331 /**
332 * Helpers to convert drawing buffers, textures and constant buffers
333 * to surface binding table indexes, for WM.
334 */
335 #define SURF_INDEX_DRAW(d) (d)
336 #define SURF_INDEX_FRAG_CONST_BUFFER (PIPE_MAX_COLOR_BUFS)
337 #define SURF_INDEX_TEXTURE(t) (PIPE_MAX_COLOR_BUFS + 1 + (t))
338
339 /**
340 * Size of surface binding table for the VS.
341 * Only one constant buffer for now.
342 */
343 #define BRW_VS_MAX_SURF 1
344
345 /**
346 * Only a VS constant buffer
347 */
348 #define SURF_INDEX_VERT_CONST_BUFFER 0
349
350
351 enum brw_cache_id {
352 BRW_CC_VP,
353 BRW_CC_UNIT,
354 BRW_WM_PROG,
355 BRW_SAMPLER_DEFAULT_COLOR,
356 BRW_SAMPLER,
357 BRW_WM_UNIT,
358 BRW_SF_PROG,
359 BRW_SF_VP,
360 BRW_SF_UNIT,
361 BRW_VS_UNIT,
362 BRW_VS_PROG,
363 BRW_GS_UNIT,
364 BRW_GS_PROG,
365 BRW_CLIP_VP,
366 BRW_CLIP_UNIT,
367 BRW_CLIP_PROG,
368 BRW_SS_SURFACE,
369 BRW_SS_SURF_BIND,
370
371 BRW_MAX_CACHE
372 };
373
374 struct brw_cache_item {
375 /**
376 * Effectively part of the key, cache_id identifies what kind of state
377 * buffer is involved, and also which brw->state.dirty.cache flag should
378 * be set when this cache item is chosen.
379 */
380 enum brw_cache_id cache_id;
381 /** 32-bit hash of the key data */
382 GLuint hash;
383 GLuint key_size; /* for variable-sized keys */
384 const void *key;
385 struct brw_winsys_buffer **reloc_bufs;
386 GLuint nr_reloc_bufs;
387
388 struct brw_winsys_buffer *bo;
389 GLuint data_size;
390
391 struct brw_cache_item *next;
392 };
393
394
395
396 struct brw_cache {
397 struct brw_context *brw;
398 struct brw_winsys_screen *sws;
399
400 struct brw_cache_item **items;
401 GLuint size, n_items;
402
403 GLuint key_size[BRW_MAX_CACHE]; /* for fixed-size keys */
404 GLuint aux_size[BRW_MAX_CACHE];
405 char *name[BRW_MAX_CACHE];
406
407
408 /* Record of the last BOs chosen for each cache_id. Used to set
409 * brw->state.dirty.cache when a new cache item is chosen.
410 */
411 struct brw_winsys_buffer *last_bo[BRW_MAX_CACHE];
412 };
413
414
415 struct brw_tracked_state {
416 struct brw_state_flags dirty;
417 int (*prepare)( struct brw_context *brw );
418 int (*emit)( struct brw_context *brw );
419 };
420
421 /* Flags for brw->state.cache.
422 */
423 #define CACHE_NEW_CC_VP (1<<BRW_CC_VP)
424 #define CACHE_NEW_CC_UNIT (1<<BRW_CC_UNIT)
425 #define CACHE_NEW_WM_PROG (1<<BRW_WM_PROG)
426 #define CACHE_NEW_SAMPLER_DEFAULT_COLOR (1<<BRW_SAMPLER_DEFAULT_COLOR)
427 #define CACHE_NEW_SAMPLER (1<<BRW_SAMPLER)
428 #define CACHE_NEW_WM_UNIT (1<<BRW_WM_UNIT)
429 #define CACHE_NEW_SF_PROG (1<<BRW_SF_PROG)
430 #define CACHE_NEW_SF_VP (1<<BRW_SF_VP)
431 #define CACHE_NEW_SF_UNIT (1<<BRW_SF_UNIT)
432 #define CACHE_NEW_VS_UNIT (1<<BRW_VS_UNIT)
433 #define CACHE_NEW_VS_PROG (1<<BRW_VS_PROG)
434 #define CACHE_NEW_GS_UNIT (1<<BRW_GS_UNIT)
435 #define CACHE_NEW_GS_PROG (1<<BRW_GS_PROG)
436 #define CACHE_NEW_CLIP_VP (1<<BRW_CLIP_VP)
437 #define CACHE_NEW_CLIP_UNIT (1<<BRW_CLIP_UNIT)
438 #define CACHE_NEW_CLIP_PROG (1<<BRW_CLIP_PROG)
439 #define CACHE_NEW_SURFACE (1<<BRW_SS_SURFACE)
440 #define CACHE_NEW_SURF_BIND (1<<BRW_SS_SURF_BIND)
441
442 struct brw_cached_batch_item {
443 struct header *header;
444 GLuint sz;
445 struct brw_cached_batch_item *next;
446 };
447
448
449
450 /* Protect against a future where VERT_ATTRIB_MAX > 32. Wouldn't life
451 * be easier if C allowed arrays of packed elements?
452 */
453 #define VS_INPUT_BITMASK_DWORDS ((PIPE_MAX_SHADER_INPUTS+31)/32)
454
455
456
457
458 struct brw_vertex_info {
459 GLuint sizes[VS_INPUT_BITMASK_DWORDS * 2]; /* sizes:2[VERT_ATTRIB_MAX] */
460 };
461
462
463 struct brw_query_object {
464 /** Doubly linked list of active query objects in the context. */
465 struct brw_query_object *prev, *next;
466
467 /** Last query BO associated with this query. */
468 struct brw_winsys_buffer *bo;
469 /** First index in bo with query data for this object. */
470 int first_index;
471 /** Last index in bo with query data for this object. */
472 int last_index;
473
474 /* Total count of pixels from previous BOs */
475 uint64_t result;
476 };
477
478
479 /**
480 * brw_context is derived from pipe_context
481 */
482 struct brw_context
483 {
484 struct pipe_context base;
485 struct brw_chipset chipset;
486
487 struct brw_screen *brw_screen;
488 struct brw_winsys_screen *sws;
489
490 struct brw_batchbuffer *batch;
491
492 GLuint primitive;
493 GLuint reduced_primitive;
494
495 /* Active state from the state tracker:
496 */
497 struct {
498 struct brw_vertex_shader *vertex_shader;
499 struct brw_fragment_shader *fragment_shader;
500 const struct brw_blend_state *blend;
501 const struct brw_rasterizer_state *rast;
502 const struct brw_depth_stencil_state *zstencil;
503
504 const struct brw_texture *texture[PIPE_MAX_SAMPLERS];
505 const struct brw_sampler *sampler[PIPE_MAX_SAMPLERS];
506 unsigned num_textures;
507 unsigned num_samplers;
508
509
510 struct pipe_vertex_element vertex_element[PIPE_MAX_ATTRIBS];
511 struct pipe_vertex_buffer vertex_buffer[PIPE_MAX_ATTRIBS];
512 unsigned num_vertex_elements;
513 unsigned num_vertex_buffers;
514
515 struct pipe_scissor_state scissor;
516 struct pipe_framebuffer_state fb;
517 struct pipe_viewport_state vp;
518 struct pipe_clip_state ucp;
519 struct pipe_buffer *vertex_constants;
520 struct pipe_buffer *fragment_constants;
521
522 struct pipe_viewport_state viewport;
523 struct brw_blend_constant_color bcc;
524 struct brw_polygon_stipple bps;
525
526
527
528 /**
529 * Index buffer for this draw_prims call.
530 *
531 * Updates are signaled by PIPE_NEW_INDEX_BUFFER.
532 */
533 struct pipe_buffer *index_buffer;
534 unsigned index_size;
535
536 /* Updates are signalled by PIPE_NEW_INDEX_RANGE:
537 */
538 unsigned min_index;
539 unsigned max_index;
540
541 } curr;
542
543 struct {
544 struct brw_state_flags dirty;
545
546 /**
547 * List of buffers accumulated in brw_validate_state to receive
548 * dri_bo_check_aperture treatment before exec, so we can know if we
549 * should flush the batch and try again before emitting primitives.
550 *
551 * This can be a fixed number as we only have a limited number of
552 * objects referenced from the batchbuffer in a primitive emit,
553 * consisting of the vertex buffers, pipelined state pointers,
554 * the CURBE, the depth buffer, and a query BO.
555 */
556 struct brw_winsys_buffer *validated_bos[PIPE_MAX_SHADER_INPUTS + 16];
557 int validated_bo_count;
558 } state;
559
560 struct brw_cache cache; /** non-surface items */
561 struct brw_cache surface_cache; /* surface items */
562 struct brw_cached_batch_item *cached_batch_items;
563
564 struct {
565 struct u_upload_mgr *upload_vertex;
566 struct u_upload_mgr *upload_index;
567
568 /* Information on uploaded vertex buffers:
569 */
570 struct {
571 unsigned stride; /* in bytes between successive vertices */
572 unsigned offset; /* in bytes, of first vertex in bo */
573 unsigned vertex_count; /* count of valid vertices which may be accessed */
574 struct brw_winsys_buffer *bo;
575 } vb[PIPE_MAX_ATTRIBS];
576
577 struct {
578 } ve[PIPE_MAX_ATTRIBS];
579
580 unsigned nr_vb; /* currently the same as curr.num_vertex_buffers */
581 unsigned nr_ve; /* currently the same as curr.num_vertex_elements */
582 } vb;
583
584 struct {
585 /* Updates to these fields are signaled by BRW_NEW_INDEX_BUFFER. */
586 struct brw_winsys_buffer *bo;
587 unsigned int offset;
588 unsigned int size;
589 /* Offset to index buffer index to use in CMD_3D_PRIM so that we can
590 * avoid re-uploading the IB packet over and over if we're actually
591 * referencing the same index buffer.
592 */
593 unsigned int start_vertex_offset;
594 } ib;
595
596
597 /* BRW_NEW_URB_ALLOCATIONS:
598 */
599 struct {
600 GLuint vsize; /* vertex size plus header in urb registers */
601 GLuint csize; /* constant buffer size in urb registers */
602 GLuint sfsize; /* setup data size in urb registers */
603
604 GLboolean constrained;
605
606 GLuint nr_vs_entries;
607 GLuint nr_gs_entries;
608 GLuint nr_clip_entries;
609 GLuint nr_sf_entries;
610 GLuint nr_cs_entries;
611
612 GLuint vs_start;
613 GLuint gs_start;
614 GLuint clip_start;
615 GLuint sf_start;
616 GLuint cs_start;
617 } urb;
618
619
620 /* BRW_NEW_CURBE_OFFSETS:
621 */
622 struct {
623 GLuint wm_start; /**< pos of first wm const in CURBE buffer */
624 GLuint wm_size; /**< number of float[4] consts, multiple of 16 */
625 GLuint clip_start;
626 GLuint clip_size;
627 GLuint vs_start;
628 GLuint vs_size;
629 GLuint total_size;
630
631 struct brw_winsys_buffer *curbe_bo;
632 /** Offset within curbe_bo of space for current curbe entry */
633 GLuint curbe_offset;
634 /** Offset within curbe_bo of space for next curbe entry */
635 GLuint curbe_next_offset;
636
637 GLfloat *last_buf;
638 GLuint last_bufsz;
639 /**
640 * Whether we should create a new bo instead of reusing the old one
641 * (if we just dispatch the batch pointing at the old one.
642 */
643 GLboolean need_new_bo;
644 } curbe;
645
646 struct {
647 struct brw_vs_prog_data *prog_data;
648
649 struct brw_winsys_buffer *prog_bo;
650 struct brw_winsys_buffer *state_bo;
651
652 /** Binding table of pointers to surf_bo entries */
653 struct brw_winsys_buffer *bind_bo;
654 struct brw_winsys_buffer *surf_bo[BRW_VS_MAX_SURF];
655 GLuint nr_surfaces;
656 } vs;
657
658 struct {
659 struct brw_gs_prog_data *prog_data;
660
661 GLboolean prog_active;
662 struct brw_winsys_buffer *prog_bo;
663 struct brw_winsys_buffer *state_bo;
664 } gs;
665
666 struct {
667 struct brw_clip_prog_data *prog_data;
668
669 struct brw_winsys_buffer *prog_bo;
670 struct brw_winsys_buffer *state_bo;
671 struct brw_winsys_buffer *vp_bo;
672 } clip;
673
674
675 struct {
676 struct brw_sf_prog_data *prog_data;
677
678 struct brw_winsys_buffer *prog_bo;
679 struct brw_winsys_buffer *state_bo;
680 struct brw_winsys_buffer *vp_bo;
681 } sf;
682
683 struct {
684 struct brw_wm_prog_data *prog_data;
685 struct brw_wm_compile *compile_data;
686
687 /** Input sizes, calculated from active vertex program.
688 * One bit per fragment program input attribute.
689 */
690 //GLbitfield input_size_masks[4];
691
692 /** Array of surface default colors (texture border color) */
693 struct brw_winsys_buffer *sdc_bo[BRW_MAX_TEX_UNIT];
694
695 GLuint render_surf;
696 GLuint nr_surfaces;
697
698 GLuint max_threads;
699 struct brw_winsys_buffer *scratch_bo;
700
701 GLuint sampler_count;
702 struct brw_winsys_buffer *sampler_bo;
703
704 /** Binding table of pointers to surf_bo entries */
705 struct brw_winsys_buffer *bind_bo;
706 struct brw_winsys_buffer *surf_bo[PIPE_MAX_COLOR_BUFS];
707
708 struct brw_winsys_buffer *prog_bo;
709 struct brw_winsys_buffer *state_bo;
710 } wm;
711
712
713 struct {
714 struct brw_winsys_buffer *prog_bo;
715 struct brw_winsys_buffer *state_bo;
716 struct brw_winsys_buffer *vp_bo;
717 } cc;
718
719 struct {
720 struct brw_query_object active_head;
721 struct brw_winsys_buffer *bo;
722 int index;
723 GLboolean active;
724 int stats_wm;
725 } query;
726
727 struct {
728 unsigned always_emit_state:1;
729 unsigned always_flush_batch:1;
730 unsigned force_swtnl:1;
731 unsigned no_swtnl:1;
732 } flags;
733
734 /* Used to give every program string a unique id
735 */
736 GLuint program_id;
737 };
738
739
740
741 /*======================================================================
742 * brw_queryobj.c
743 */
744 void brw_init_query(struct brw_context *brw);
745 void brw_prepare_query_begin(struct brw_context *brw);
746 void brw_emit_query_begin(struct brw_context *brw);
747 void brw_emit_query_end(struct brw_context *brw);
748
749 /*======================================================================
750 * brw_state_dump.c
751 */
752 void brw_debug_batch(struct brw_context *intel);
753
754
755 /*======================================================================
756 * brw_pipe_*.c
757 */
758 void brw_pipe_blend_init( struct brw_context *brw );
759 void brw_pipe_depth_stencil_init( struct brw_context *brw );
760 void brw_pipe_framebuffer_init( struct brw_context *brw );
761 void brw_pipe_flush_init( struct brw_context *brw );
762 void brw_pipe_misc_init( struct brw_context *brw );
763 void brw_pipe_query_init( struct brw_context *brw );
764 void brw_pipe_rast_init( struct brw_context *brw );
765 void brw_pipe_sampler_init( struct brw_context *brw );
766 void brw_pipe_shader_init( struct brw_context *brw );
767 void brw_pipe_vertex_init( struct brw_context *brw );
768
769 void brw_pipe_blend_cleanup( struct brw_context *brw );
770 void brw_pipe_depth_stencil_cleanup( struct brw_context *brw );
771 void brw_pipe_framebuffer_cleanup( struct brw_context *brw );
772 void brw_pipe_flush_cleanup( struct brw_context *brw );
773 void brw_pipe_misc_cleanup( struct brw_context *brw );
774 void brw_pipe_query_cleanup( struct brw_context *brw );
775 void brw_pipe_rast_cleanup( struct brw_context *brw );
776 void brw_pipe_sampler_cleanup( struct brw_context *brw );
777 void brw_pipe_shader_cleanup( struct brw_context *brw );
778 void brw_pipe_vertex_cleanup( struct brw_context *brw );
779
780
781 /* brw_urb.c
782 */
783 int brw_upload_urb_fence(struct brw_context *brw);
784
785 /* brw_curbe.c
786 */
787 int brw_upload_cs_urb_state(struct brw_context *brw);
788
789 /* brw_disasm.c */
790 int brw_disasm (FILE *file, struct brw_instruction *inst);
791
792 /*======================================================================
793 * Inline conversion functions. These are better-typed than the
794 * macros used previously:
795 */
796 static INLINE struct brw_context *
797 brw_context( struct pipe_context *ctx )
798 {
799 return (struct brw_context *)ctx;
800 }
801
802
803 #define BRW_IS_965(brw) ((brw)->chipset.is_965)
804 #define BRW_IS_IGDNG(brw) ((brw)->chipset.is_igdng)
805 #define BRW_IS_G4X(brw) ((brw)->chipset.is_g4x)
806
807
808 #endif
809