2 * Copyright © 2008 Keith Packard
4 * Permission to use, copy, modify, distribute, and sell this software and its
5 * documentation for any purpose is hereby granted without fee, provided that
6 * the above copyright notice appear in all copies and that both that copyright
7 * notice and this permission notice appear in supporting documentation, and
8 * that the name of the copyright holders not be used in advertising or
9 * publicity pertaining to distribution of the software without specific,
10 * written prior permission. The copyright holders make no representations
11 * about the suitability of this software for any purpose. It is provided "as
12 * is" without express or implied warranty.
14 * THE COPYRIGHT HOLDERS DISCLAIM ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
15 * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
16 * EVENT SHALL THE COPYRIGHT HOLDERS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
17 * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE,
18 * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
19 * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE
30 #include "brw_context.h"
31 #include "brw_defines.h"
38 [BRW_OPCODE_MOV
] = { .name
= "mov", .nsrc
= 1, .ndst
= 1 },
39 [BRW_OPCODE_FRC
] = { .name
= "frc", .nsrc
= 1, .ndst
= 1 },
40 [BRW_OPCODE_RNDU
] = { .name
= "rndu", .nsrc
= 1, .ndst
= 1 },
41 [BRW_OPCODE_RNDD
] = { .name
= "rndd", .nsrc
= 1, .ndst
= 1 },
42 [BRW_OPCODE_RNDE
] = { .name
= "rnde", .nsrc
= 1, .ndst
= 1 },
43 [BRW_OPCODE_RNDZ
] = { .name
= "rndz", .nsrc
= 1, .ndst
= 1 },
44 [BRW_OPCODE_NOT
] = { .name
= "not", .nsrc
= 1, .ndst
= 1 },
45 [BRW_OPCODE_LZD
] = { .name
= "lzd", .nsrc
= 1, .ndst
= 1 },
47 [BRW_OPCODE_MUL
] = { .name
= "mul", .nsrc
= 2, .ndst
= 1 },
48 [BRW_OPCODE_MAC
] = { .name
= "mac", .nsrc
= 2, .ndst
= 1 },
49 [BRW_OPCODE_MACH
] = { .name
= "mach", .nsrc
= 2, .ndst
= 1 },
50 [BRW_OPCODE_LINE
] = { .name
= "line", .nsrc
= 2, .ndst
= 1 },
51 [BRW_OPCODE_SAD2
] = { .name
= "sad2", .nsrc
= 2, .ndst
= 1 },
52 [BRW_OPCODE_SADA2
] = { .name
= "sada2", .nsrc
= 2, .ndst
= 1 },
53 [BRW_OPCODE_DP4
] = { .name
= "dp4", .nsrc
= 2, .ndst
= 1 },
54 [BRW_OPCODE_DPH
] = { .name
= "dph", .nsrc
= 2, .ndst
= 1 },
55 [BRW_OPCODE_DP3
] = { .name
= "dp3", .nsrc
= 2, .ndst
= 1 },
56 [BRW_OPCODE_DP2
] = { .name
= "dp2", .nsrc
= 2, .ndst
= 1 },
58 [BRW_OPCODE_AVG
] = { .name
= "avg", .nsrc
= 2, .ndst
= 1 },
59 [BRW_OPCODE_ADD
] = { .name
= "add", .nsrc
= 2, .ndst
= 1 },
60 [BRW_OPCODE_SEL
] = { .name
= "sel", .nsrc
= 2, .ndst
= 1 },
61 [BRW_OPCODE_AND
] = { .name
= "and", .nsrc
= 2, .ndst
= 1 },
62 [BRW_OPCODE_OR
] = { .name
= "or", .nsrc
= 2, .ndst
= 1 },
63 [BRW_OPCODE_XOR
] = { .name
= "xor", .nsrc
= 2, .ndst
= 1 },
64 [BRW_OPCODE_SHR
] = { .name
= "shr", .nsrc
= 2, .ndst
= 1 },
65 [BRW_OPCODE_SHL
] = { .name
= "shl", .nsrc
= 2, .ndst
= 1 },
66 [BRW_OPCODE_ASR
] = { .name
= "asr", .nsrc
= 2, .ndst
= 1 },
67 [BRW_OPCODE_CMP
] = { .name
= "cmp", .nsrc
= 2, .ndst
= 1 },
68 [BRW_OPCODE_CMPN
] = { .name
= "cmpn", .nsrc
= 2, .ndst
= 1 },
70 [BRW_OPCODE_SEND
] = { .name
= "send", .nsrc
= 1, .ndst
= 1 },
71 [BRW_OPCODE_NOP
] = { .name
= "nop", .nsrc
= 0, .ndst
= 0 },
72 [BRW_OPCODE_JMPI
] = { .name
= "jmpi", .nsrc
= 1, .ndst
= 0 },
73 [BRW_OPCODE_IF
] = { .name
= "if", .nsrc
= 2, .ndst
= 0 },
74 [BRW_OPCODE_IFF
] = { .name
= "iff", .nsrc
= 1, .ndst
= 01 },
75 [BRW_OPCODE_WHILE
] = { .name
= "while", .nsrc
= 1, .ndst
= 0 },
76 [BRW_OPCODE_ELSE
] = { .name
= "else", .nsrc
= 2, .ndst
= 0 },
77 [BRW_OPCODE_BREAK
] = { .name
= "break", .nsrc
= 1, .ndst
= 0 },
78 [BRW_OPCODE_CONTINUE
] = { .name
= "cont", .nsrc
= 1, .ndst
= 0 },
79 [BRW_OPCODE_HALT
] = { .name
= "halt", .nsrc
= 1, .ndst
= 0 },
80 [BRW_OPCODE_MSAVE
] = { .name
= "msave", .nsrc
= 1, .ndst
= 1 },
81 [BRW_OPCODE_PUSH
] = { .name
= "push", .nsrc
= 1, .ndst
= 1 },
82 [BRW_OPCODE_MRESTORE
] = { .name
= "mrest", .nsrc
= 1, .ndst
= 1 },
83 [BRW_OPCODE_POP
] = { .name
= "pop", .nsrc
= 2, .ndst
= 0 },
84 [BRW_OPCODE_WAIT
] = { .name
= "wait", .nsrc
= 1, .ndst
= 0 },
85 [BRW_OPCODE_DO
] = { .name
= "do", .nsrc
= 0, .ndst
= 0 },
86 [BRW_OPCODE_ENDIF
] = { .name
= "endif", .nsrc
= 2, .ndst
= 0 },
89 char *conditional_modifier
[16] = {
90 [BRW_CONDITIONAL_NONE
] = "",
91 [BRW_CONDITIONAL_Z
] = ".e",
92 [BRW_CONDITIONAL_NZ
] = ".ne",
93 [BRW_CONDITIONAL_G
] = ".g",
94 [BRW_CONDITIONAL_GE
] = ".ge",
95 [BRW_CONDITIONAL_L
] = ".l",
96 [BRW_CONDITIONAL_LE
] = ".le",
97 [BRW_CONDITIONAL_R
] = ".r",
98 [BRW_CONDITIONAL_O
] = ".o",
99 [BRW_CONDITIONAL_U
] = ".u",
112 char *vert_stride
[16] = {
131 char *horiz_stride
[4] = {
138 char *chan_sel
[4] = {
145 char *dest_condmod
[16] = {
148 char *debug_ctrl
[2] = {
153 char *saturate
[2] = {
158 char *exec_size
[8] = {
167 char *pred_inv
[2] = {
172 char *pred_ctrl_align16
[16] = {
182 char *pred_ctrl_align1
[16] = {
196 char *thread_ctrl
[4] = {
201 char *compr_ctrl
[4] = {
207 char *dep_ctrl
[4] = {
211 [3] = "NoDDClr,NoDDChk",
214 char *mask_ctrl
[4] = {
219 char *access_mode
[2] = {
224 char *reg_encoding
[8] = {
234 char *imm_encoding
[8] = {
244 char *reg_file
[4] = {
251 char *writemask
[16] = {
270 char *end_of_thread
[2] = {
275 char *target_function
[16] = {
276 [BRW_MESSAGE_TARGET_NULL
] = "null",
277 [BRW_MESSAGE_TARGET_MATH
] = "math",
278 [BRW_MESSAGE_TARGET_SAMPLER
] = "sampler",
279 [BRW_MESSAGE_TARGET_GATEWAY
] = "gateway",
280 [BRW_MESSAGE_TARGET_DATAPORT_READ
] = "read",
281 [BRW_MESSAGE_TARGET_DATAPORT_WRITE
] = "write",
282 [BRW_MESSAGE_TARGET_URB
] = "urb",
283 [BRW_MESSAGE_TARGET_THREAD_SPAWNER
] = "thread_spawner"
286 char *math_function
[16] = {
287 [BRW_MATH_FUNCTION_INV
] = "inv",
288 [BRW_MATH_FUNCTION_LOG
] = "log",
289 [BRW_MATH_FUNCTION_EXP
] = "exp",
290 [BRW_MATH_FUNCTION_SQRT
] = "sqrt",
291 [BRW_MATH_FUNCTION_RSQ
] = "rsq",
292 [BRW_MATH_FUNCTION_SIN
] = "sin",
293 [BRW_MATH_FUNCTION_COS
] = "cos",
294 [BRW_MATH_FUNCTION_SINCOS
] = "sincos",
295 [BRW_MATH_FUNCTION_TAN
] = "tan",
296 [BRW_MATH_FUNCTION_POW
] = "pow",
297 [BRW_MATH_FUNCTION_INT_DIV_QUOTIENT_AND_REMAINDER
] = "intdivmod",
298 [BRW_MATH_FUNCTION_INT_DIV_QUOTIENT
] = "intmod",
299 [BRW_MATH_FUNCTION_INT_DIV_REMAINDER
] = "intdiv",
302 char *math_saturate
[2] = {
307 char *math_signed
[2] = {
312 char *math_scalar
[2] = {
317 char *math_precision
[2] = {
319 [1] = "partial_precision"
322 char *urb_swizzle
[4] = {
323 [BRW_URB_SWIZZLE_NONE
] = "",
324 [BRW_URB_SWIZZLE_INTERLEAVE
] = "interleave",
325 [BRW_URB_SWIZZLE_TRANSPOSE
] = "transpose",
328 char *urb_allocate
[2] = {
333 char *urb_used
[2] = {
338 char *urb_complete
[2] = {
343 char *sampler_target_format
[4] = {
352 static int string (FILE *file
, char *string
)
354 fputs (string
, file
);
355 column
+= strlen (string
);
359 static int format (FILE *f
, char *format
, ...)
363 va_start (args
, format
);
365 vsnprintf (buf
, sizeof (buf
) - 1, format
, args
);
370 static int newline (FILE *f
)
377 static int pad (FILE *f
, int c
)
385 static int control (FILE *file
, char *name
, char *ctrl
[], GLuint id
, int *space
)
388 fprintf (file
, "*** invalid %s value %d ",
396 string (file
, ctrl
[id
]);
403 static int print_opcode (FILE *file
, int id
)
405 if (!opcode
[id
].name
) {
406 format (file
, "*** invalid opcode value %d ", id
);
409 string (file
, opcode
[id
].name
);
413 static int reg (FILE *file
, GLuint _reg_file
, GLuint _reg_nr
)
416 if (_reg_file
== BRW_ARCHITECTURE_REGISTER_FILE
) {
417 switch (_reg_nr
& 0xf0) {
419 string (file
, "null");
421 case BRW_ARF_ADDRESS
:
422 format (file
, "a%d", _reg_nr
& 0x0f);
424 case BRW_ARF_ACCUMULATOR
:
425 format (file
, "acc%d", _reg_nr
& 0x0f);
428 format (file
, "mask%d", _reg_nr
& 0x0f);
430 case BRW_ARF_MASK_STACK
:
431 format (file
, "msd%d", _reg_nr
& 0x0f);
434 format (file
, "sr%d", _reg_nr
& 0x0f);
436 case BRW_ARF_CONTROL
:
437 format (file
, "cr%d", _reg_nr
& 0x0f);
439 case BRW_ARF_NOTIFICATION_COUNT
:
440 format (file
, "n%d", _reg_nr
& 0x0f);
447 format (file
, "ARF%d", _reg_nr
);
451 err
|= control (file
, "src reg file", reg_file
, _reg_file
, NULL
);
452 format (file
, "%d", _reg_nr
);
457 static int dest (FILE *file
, struct brw_instruction
*inst
)
461 if (inst
->header
.access_mode
== BRW_ALIGN_1
)
463 if (inst
->bits1
.da1
.dest_address_mode
== BRW_ADDRESS_DIRECT
)
465 err
|= reg (file
, inst
->bits1
.da1
.dest_reg_file
, inst
->bits1
.da1
.dest_reg_nr
);
468 if (inst
->bits1
.da1
.dest_subreg_nr
)
469 format (file
, ".%d", inst
->bits1
.da1
.dest_subreg_nr
);
470 format (file
, "<%d>", inst
->bits1
.da1
.dest_horiz_stride
);
471 err
|= control (file
, "dest reg encoding", reg_encoding
, inst
->bits1
.da1
.dest_reg_type
, NULL
);
475 string (file
, "g[a0");
476 if (inst
->bits1
.ia1
.dest_subreg_nr
)
477 format (file
, ".%d", inst
->bits1
.ia1
.dest_subreg_nr
);
478 if (inst
->bits1
.ia1
.dest_indirect_offset
)
479 format (file
, " %d", inst
->bits1
.ia1
.dest_indirect_offset
);
481 format (file
, "<%d>", inst
->bits1
.ia1
.dest_horiz_stride
);
482 err
|= control (file
, "dest reg encoding", reg_encoding
, inst
->bits1
.ia1
.dest_reg_type
, NULL
);
487 if (inst
->bits1
.da16
.dest_address_mode
== BRW_ADDRESS_DIRECT
)
489 err
|= reg (file
, inst
->bits1
.da16
.dest_reg_file
, inst
->bits1
.da16
.dest_reg_nr
);
492 if (inst
->bits1
.da16
.dest_subreg_nr
)
493 format (file
, ".%d", inst
->bits1
.da16
.dest_subreg_nr
);
494 string (file
, "<1>");
495 err
|= control (file
, "writemask", writemask
, inst
->bits1
.da16
.dest_writemask
, NULL
);
496 err
|= control (file
, "dest reg encoding", reg_encoding
, inst
->bits1
.da16
.dest_reg_type
, NULL
);
501 string (file
, "Indirect align16 address mode not supported");
508 static int src_align1_region (FILE *file
,
509 GLuint _vert_stride
, GLuint _width
, GLuint _horiz_stride
)
513 err
|= control (file
, "vert stride", vert_stride
, _vert_stride
, NULL
);
515 err
|= control (file
, "width", width
, _width
, NULL
);
517 err
|= control (file
, "horiz_stride", horiz_stride
, _horiz_stride
, NULL
);
522 static int src_da1 (FILE *file
, GLuint type
, GLuint _reg_file
,
523 GLuint _vert_stride
, GLuint _width
, GLuint _horiz_stride
,
524 GLuint reg_num
, GLuint sub_reg_num
, GLuint __abs
, GLuint _negate
)
527 err
|= control (file
, "negate", negate
, _negate
, NULL
);
528 err
|= control (file
, "abs", _abs
, __abs
, NULL
);
530 err
|= reg (file
, _reg_file
, reg_num
);
534 format (file
, ".%d", sub_reg_num
);
535 src_align1_region (file
, _vert_stride
, _width
, _horiz_stride
);
536 err
|= control (file
, "src reg encoding", reg_encoding
, type
, NULL
);
540 static int src_ia1 (FILE *file
,
544 GLuint _addr_subreg_nr
,
548 GLuint _horiz_stride
,
553 err
|= control (file
, "negate", negate
, _negate
, NULL
);
554 err
|= control (file
, "abs", _abs
, __abs
, NULL
);
556 string (file
, "g[a0");
558 format (file
, ".%d", _addr_subreg_nr
);
560 format (file
, " %d", _addr_imm
);
562 src_align1_region (file
, _vert_stride
, _width
, _horiz_stride
);
563 err
|= control (file
, "src reg encoding", reg_encoding
, type
, NULL
);
567 static int src_da16 (FILE *file
,
581 err
|= control (file
, "negate", negate
, _negate
, NULL
);
582 err
|= control (file
, "abs", _abs
, __abs
, NULL
);
584 err
|= reg (file
, _reg_file
, _reg_nr
);
588 format (file
, ".%d", _subreg_nr
);
590 err
|= control (file
, "vert stride", vert_stride
, _vert_stride
, NULL
);
591 string (file
, ",1,1>");
592 err
|= control (file
, "src da16 reg type", reg_encoding
, _reg_type
, NULL
);
594 * Three kinds of swizzle display:
595 * identity - nothing printed
596 * 1->all - print the single channel
597 * 1->1 - print the mapping
599 if (swz_x
== BRW_CHANNEL_X
&&
600 swz_y
== BRW_CHANNEL_Y
&&
601 swz_z
== BRW_CHANNEL_Z
&&
602 swz_w
== BRW_CHANNEL_W
)
606 else if (swz_x
== swz_y
&& swz_x
== swz_z
&& swz_x
== swz_w
)
609 err
|= control (file
, "channel select", chan_sel
, swz_x
, NULL
);
614 err
|= control (file
, "channel select", chan_sel
, swz_x
, NULL
);
615 err
|= control (file
, "channel select", chan_sel
, swz_y
, NULL
);
616 err
|= control (file
, "channel select", chan_sel
, swz_z
, NULL
);
617 err
|= control (file
, "channel select", chan_sel
, swz_w
, NULL
);
623 static int imm (FILE *file
, GLuint type
, struct brw_instruction
*inst
) {
625 case BRW_REGISTER_TYPE_UD
:
626 format (file
, "0x%08xUD", inst
->bits3
.ud
);
628 case BRW_REGISTER_TYPE_D
:
629 format (file
, "%dD", inst
->bits3
.d
);
631 case BRW_REGISTER_TYPE_UW
:
632 format (file
, "0x%04xUW", (uint16_t) inst
->bits3
.ud
);
634 case BRW_REGISTER_TYPE_W
:
635 format (file
, "%dW", (int16_t) inst
->bits3
.d
);
637 case BRW_REGISTER_TYPE_UB
:
638 format (file
, "0x%02xUB", (int8_t) inst
->bits3
.ud
);
640 case BRW_REGISTER_TYPE_VF
:
641 format (file
, "Vector Float");
643 case BRW_REGISTER_TYPE_V
:
644 format (file
, "0x%08xV", inst
->bits3
.ud
);
646 case BRW_REGISTER_TYPE_F
:
647 format (file
, "%-gF", inst
->bits3
.f
);
652 static int src0 (FILE *file
, struct brw_instruction
*inst
)
654 if (inst
->bits1
.da1
.src0_reg_file
== BRW_IMMEDIATE_VALUE
)
655 return imm (file
, inst
->bits1
.da1
.src0_reg_type
,
657 else if (inst
->header
.access_mode
== BRW_ALIGN_1
)
659 if (inst
->bits2
.da1
.src0_address_mode
== BRW_ADDRESS_DIRECT
)
661 return src_da1 (file
,
662 inst
->bits1
.da1
.src0_reg_type
,
663 inst
->bits1
.da1
.src0_reg_file
,
664 inst
->bits2
.da1
.src0_vert_stride
,
665 inst
->bits2
.da1
.src0_width
,
666 inst
->bits2
.da1
.src0_horiz_stride
,
667 inst
->bits2
.da1
.src0_reg_nr
,
668 inst
->bits2
.da1
.src0_subreg_nr
,
669 inst
->bits2
.da1
.src0_abs
,
670 inst
->bits2
.da1
.src0_negate
);
674 return src_ia1 (file
,
675 inst
->bits1
.ia1
.src0_reg_type
,
676 inst
->bits1
.ia1
.src0_reg_file
,
677 inst
->bits2
.ia1
.src0_indirect_offset
,
678 inst
->bits2
.ia1
.src0_subreg_nr
,
679 inst
->bits2
.ia1
.src0_negate
,
680 inst
->bits2
.ia1
.src0_abs
,
681 inst
->bits2
.ia1
.src0_address_mode
,
682 inst
->bits2
.ia1
.src0_horiz_stride
,
683 inst
->bits2
.ia1
.src0_width
,
684 inst
->bits2
.ia1
.src0_vert_stride
);
689 if (inst
->bits2
.da16
.src0_address_mode
== BRW_ADDRESS_DIRECT
)
691 return src_da16 (file
,
692 inst
->bits1
.da16
.src0_reg_type
,
693 inst
->bits1
.da16
.src0_reg_file
,
694 inst
->bits2
.da16
.src0_vert_stride
,
695 inst
->bits2
.da16
.src0_reg_nr
,
696 inst
->bits2
.da16
.src0_subreg_nr
,
697 inst
->bits2
.da16
.src0_abs
,
698 inst
->bits2
.da16
.src0_negate
,
699 inst
->bits2
.da16
.src0_swz_x
,
700 inst
->bits2
.da16
.src0_swz_y
,
701 inst
->bits2
.da16
.src0_swz_z
,
702 inst
->bits2
.da16
.src0_swz_w
);
706 string (file
, "Indirect align16 address mode not supported");
712 static int src1 (FILE *file
, struct brw_instruction
*inst
)
714 if (inst
->bits1
.da1
.src1_reg_file
== BRW_IMMEDIATE_VALUE
)
715 return imm (file
, inst
->bits1
.da1
.src1_reg_type
,
717 else if (inst
->header
.access_mode
== BRW_ALIGN_1
)
719 if (inst
->bits3
.da1
.src1_address_mode
== BRW_ADDRESS_DIRECT
)
721 return src_da1 (file
,
722 inst
->bits1
.da1
.src1_reg_type
,
723 inst
->bits1
.da1
.src1_reg_file
,
724 inst
->bits3
.da1
.src1_vert_stride
,
725 inst
->bits3
.da1
.src1_width
,
726 inst
->bits3
.da1
.src1_horiz_stride
,
727 inst
->bits3
.da1
.src1_reg_nr
,
728 inst
->bits3
.da1
.src1_subreg_nr
,
729 inst
->bits3
.da1
.src1_abs
,
730 inst
->bits3
.da1
.src1_negate
);
734 return src_ia1 (file
,
735 inst
->bits1
.ia1
.src1_reg_type
,
736 inst
->bits1
.ia1
.src1_reg_file
,
737 inst
->bits3
.ia1
.src1_indirect_offset
,
738 inst
->bits3
.ia1
.src1_subreg_nr
,
739 inst
->bits3
.ia1
.src1_negate
,
740 inst
->bits3
.ia1
.src1_abs
,
741 inst
->bits3
.ia1
.src1_address_mode
,
742 inst
->bits3
.ia1
.src1_horiz_stride
,
743 inst
->bits3
.ia1
.src1_width
,
744 inst
->bits3
.ia1
.src1_vert_stride
);
749 if (inst
->bits3
.da16
.src1_address_mode
== BRW_ADDRESS_DIRECT
)
751 return src_da16 (file
,
752 inst
->bits1
.da16
.src1_reg_type
,
753 inst
->bits1
.da16
.src1_reg_file
,
754 inst
->bits3
.da16
.src1_vert_stride
,
755 inst
->bits3
.da16
.src1_reg_nr
,
756 inst
->bits3
.da16
.src1_subreg_nr
,
757 inst
->bits3
.da16
.src1_abs
,
758 inst
->bits3
.da16
.src1_negate
,
759 inst
->bits3
.da16
.src1_swz_x
,
760 inst
->bits3
.da16
.src1_swz_y
,
761 inst
->bits3
.da16
.src1_swz_z
,
762 inst
->bits3
.da16
.src1_swz_w
);
766 string (file
, "Indirect align16 address mode not supported");
772 int brw_disasm (FILE *file
, struct brw_instruction
*inst
)
777 if (inst
->header
.predicate_control
) {
779 err
|= control (file
, "predicate inverse", pred_inv
, inst
->header
.predicate_inverse
, NULL
);
781 if (inst
->bits2
.da1
.flag_reg_nr
)
782 format (file
, ".%d", inst
->bits2
.da1
.flag_reg_nr
);
783 if (inst
->header
.access_mode
== BRW_ALIGN_1
)
784 err
|= control (file
, "predicate control align1", pred_ctrl_align1
,
785 inst
->header
.predicate_control
, NULL
);
787 err
|= control (file
, "predicate control align16", pred_ctrl_align16
,
788 inst
->header
.predicate_control
, NULL
);
792 err
|= print_opcode (file
, inst
->header
.opcode
);
793 err
|= control (file
, "saturate", saturate
, inst
->header
.saturate
, NULL
);
794 err
|= control (file
, "debug control", debug_ctrl
, inst
->header
.debug_control
, NULL
);
796 if (inst
->header
.opcode
!= BRW_OPCODE_SEND
)
797 err
|= control (file
, "conditional modifier", conditional_modifier
,
798 inst
->header
.destreg__conditionalmod
, NULL
);
800 if (inst
->header
.opcode
!= BRW_OPCODE_NOP
) {
802 err
|= control (file
, "execution size", exec_size
, inst
->header
.execution_size
, NULL
);
806 if (inst
->header
.opcode
== BRW_OPCODE_SEND
)
807 format (file
, " %d", inst
->header
.destreg__conditionalmod
);
809 if (opcode
[inst
->header
.opcode
].ndst
> 0) {
811 err
|= dest (file
, inst
);
813 if (opcode
[inst
->header
.opcode
].nsrc
> 0) {
815 err
|= src0 (file
, inst
);
817 if (opcode
[inst
->header
.opcode
].nsrc
> 1) {
819 err
|= src1 (file
, inst
);
822 if (inst
->header
.opcode
== BRW_OPCODE_SEND
) {
826 err
|= control (file
, "target function", target_function
,
827 inst
->bits3
.generic
.msg_target
, &space
);
828 switch (inst
->bits3
.generic
.msg_target
) {
829 case BRW_MESSAGE_TARGET_MATH
:
830 err
|= control (file
, "math function", math_function
,
831 inst
->bits3
.math
.function
, &space
);
832 err
|= control (file
, "math saturate", math_saturate
,
833 inst
->bits3
.math
.saturate
, &space
);
834 err
|= control (file
, "math signed", math_signed
,
835 inst
->bits3
.math
.int_type
, &space
);
836 err
|= control (file
, "math scalar", math_scalar
,
837 inst
->bits3
.math
.data_type
, &space
);
838 err
|= control (file
, "math precision", math_precision
,
839 inst
->bits3
.math
.precision
, &space
);
841 case BRW_MESSAGE_TARGET_SAMPLER
:
842 format (file
, " (%d, %d, ",
843 inst
->bits3
.sampler
.binding_table_index
,
844 inst
->bits3
.sampler
.sampler
);
845 err
|= control (file
, "sampler target format", sampler_target_format
,
846 inst
->bits3
.sampler
.return_format
, NULL
);
849 case BRW_MESSAGE_TARGET_DATAPORT_WRITE
:
850 format (file
, " (%d, %d, %d, %d)",
851 inst
->bits3
.dp_write
.binding_table_index
,
852 (inst
->bits3
.dp_write
.pixel_scoreboard_clear
<< 3) |
853 inst
->bits3
.dp_write
.msg_control
,
854 inst
->bits3
.dp_write
.msg_type
,
855 inst
->bits3
.dp_write
.send_commit_msg
);
857 case BRW_MESSAGE_TARGET_URB
:
858 format (file
, " %d", inst
->bits3
.urb
.offset
);
860 err
|= control (file
, "urb swizzle", urb_swizzle
,
861 inst
->bits3
.urb
.swizzle_control
, &space
);
862 err
|= control (file
, "urb allocate", urb_allocate
,
863 inst
->bits3
.urb
.allocate
, &space
);
864 err
|= control (file
, "urb used", urb_used
,
865 inst
->bits3
.urb
.used
, &space
);
866 err
|= control (file
, "urb complete", urb_complete
,
867 inst
->bits3
.urb
.complete
, &space
);
869 case BRW_MESSAGE_TARGET_THREAD_SPAWNER
:
872 format (file
, "unsupported target %d", inst
->bits3
.generic
.msg_target
);
877 format (file
, "mlen %d",
878 inst
->bits3
.generic
.msg_length
);
879 format (file
, " rlen %d",
880 inst
->bits3
.generic
.response_length
);
883 if (inst
->header
.opcode
!= BRW_OPCODE_NOP
) {
886 err
|= control(file
, "access mode", access_mode
, inst
->header
.access_mode
, &space
);
887 err
|= control (file
, "mask control", mask_ctrl
, inst
->header
.mask_control
, &space
);
888 err
|= control (file
, "dependency control", dep_ctrl
, inst
->header
.dependency_control
, &space
);
889 err
|= control (file
, "compression control", compr_ctrl
, inst
->header
.compression_control
, &space
);
890 err
|= control (file
, "thread control", thread_ctrl
, inst
->header
.thread_control
, &space
);
891 if (inst
->header
.opcode
== BRW_OPCODE_SEND
)
892 err
|= control (file
, "end of thread", end_of_thread
,
893 inst
->bits3
.generic
.end_of_thread
, &space
);