r600g: add support for s3tc formats.
[mesa.git] / src / gallium / drivers / i965 / brw_draw.c
1 /**************************************************************************
2 *
3 * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 **************************************************************************/
27
28
29 #include "util/u_inlines.h"
30 #include "util/u_prim.h"
31 #include "util/u_upload_mgr.h"
32
33 #include "brw_draw.h"
34 #include "brw_defines.h"
35 #include "brw_context.h"
36 #include "brw_state.h"
37 #include "brw_debug.h"
38
39 #include "brw_batchbuffer.h"
40
41
42 static uint32_t prim_to_hw_prim[PIPE_PRIM_POLYGON+1] = {
43 _3DPRIM_POINTLIST,
44 _3DPRIM_LINELIST,
45 _3DPRIM_LINELOOP,
46 _3DPRIM_LINESTRIP,
47 _3DPRIM_TRILIST,
48 _3DPRIM_TRISTRIP,
49 _3DPRIM_TRIFAN,
50 _3DPRIM_QUADLIST,
51 _3DPRIM_QUADSTRIP,
52 _3DPRIM_POLYGON
53 };
54
55
56
57 /* When the primitive changes, set a state bit and re-validate. Not
58 * the nicest and would rather deal with this by having all the
59 * programs be immune to the active primitive (ie. cope with all
60 * possibilities). That may not be realistic however.
61 */
62 static int brw_set_prim(struct brw_context *brw, unsigned prim )
63 {
64
65 if (BRW_DEBUG & DEBUG_PRIMS)
66 debug_printf("PRIM: %s\n", u_prim_name(prim));
67
68 if (prim != brw->primitive) {
69 unsigned reduced_prim;
70
71 brw->primitive = prim;
72 brw->state.dirty.brw |= BRW_NEW_PRIMITIVE;
73
74 reduced_prim = u_reduced_prim(prim);
75 if (reduced_prim != brw->reduced_primitive) {
76 brw->reduced_primitive = reduced_prim;
77 brw->state.dirty.brw |= BRW_NEW_REDUCED_PRIMITIVE;
78 }
79 }
80
81 return prim_to_hw_prim[prim];
82 }
83
84
85
86 static int brw_emit_prim(struct brw_context *brw,
87 unsigned start,
88 unsigned count,
89 boolean indexed,
90 uint32_t hw_prim)
91 {
92 struct brw_3d_primitive prim_packet;
93 int ret;
94
95 if (BRW_DEBUG & DEBUG_PRIMS)
96 debug_printf("%s start %d count %d indexed %d hw_prim %d\n",
97 __FUNCTION__, start, count, indexed, hw_prim);
98
99 prim_packet.header.opcode = CMD_3D_PRIM;
100 prim_packet.header.length = sizeof(prim_packet)/4 - 2;
101 prim_packet.header.pad = 0;
102 prim_packet.header.topology = hw_prim;
103 prim_packet.header.indexed = indexed;
104
105 prim_packet.verts_per_instance = count;
106 prim_packet.start_vert_location = start;
107 if (indexed)
108 prim_packet.start_vert_location += brw->ib.start_vertex_offset;
109 prim_packet.instance_count = 1;
110 prim_packet.start_instance_location = 0;
111 prim_packet.base_vert_location = 0; /* prim->basevertex; XXX: add this to gallium */
112
113
114 /* If we're set to always flush, do it before and after the primitive emit.
115 * We want to catch both missed flushes that hurt instruction/state cache
116 * and missed flushes of the render cache as it heads to other parts of
117 * the besides the draw code.
118 */
119 if (0) {
120 BEGIN_BATCH(1, IGNORE_CLIPRECTS);
121 OUT_BATCH((CMD_MI_FLUSH << 16) | BRW_FLUSH_STATE_CACHE);
122 ADVANCE_BATCH();
123 }
124 if (prim_packet.verts_per_instance) {
125 ret = brw_batchbuffer_data( brw->batch, &prim_packet,
126 sizeof(prim_packet), LOOP_CLIPRECTS);
127 if (ret)
128 return ret;
129 }
130 if (0) {
131 BEGIN_BATCH(1, IGNORE_CLIPRECTS);
132 OUT_BATCH((CMD_MI_FLUSH << 16) | BRW_FLUSH_STATE_CACHE);
133 ADVANCE_BATCH();
134 }
135
136 return 0;
137 }
138
139
140 /* May fail if out of video memory for texture or vbo upload, or on
141 * fallback conditions.
142 */
143 static int
144 try_draw_range_elements(struct brw_context *brw,
145 boolean indexed,
146 unsigned hw_prim,
147 unsigned start, unsigned count)
148 {
149 int ret;
150
151 ret = brw_validate_state(brw);
152 if (ret)
153 return ret;
154
155 /* Check that we can fit our state in with our existing batchbuffer, or
156 * flush otherwise.
157 */
158 ret = brw->sws->check_aperture_space(brw->sws,
159 brw->state.validated_bos,
160 brw->state.validated_bo_count);
161 if (ret)
162 return ret;
163
164 ret = brw_upload_state(brw);
165 if (ret)
166 return ret;
167
168 ret = brw_emit_prim(brw, start, count, indexed, hw_prim);
169 if (ret)
170 return ret;
171
172 if (brw->flags.always_flush_batch)
173 brw_context_flush( brw );
174
175 return 0;
176 }
177
178
179 static void
180 brw_draw_vbo(struct pipe_context *pipe, const struct pipe_draw_info *info)
181 {
182 struct brw_context *brw = brw_context(pipe);
183 int ret;
184 uint32_t hw_prim;
185
186 hw_prim = brw_set_prim(brw, info->mode);
187
188 if (BRW_DEBUG & DEBUG_PRIMS)
189 debug_printf("PRIM: %s start %d count %d index_buffer %p\n",
190 u_prim_name(info->mode), info->start, info->count,
191 (void *) brw->curr.index_buffer);
192
193 assert(info->index_bias == 0);
194
195 /* Potentially trigger upload of new index buffer range.
196 * XXX: do we really care?
197 */
198 if (brw->curr.min_index != info->min_index ||
199 brw->curr.max_index != info->max_index)
200 {
201 brw->curr.min_index = info->min_index;
202 brw->curr.max_index = info->max_index;
203 brw->state.dirty.mesa |= PIPE_NEW_INDEX_RANGE;
204 }
205
206
207 /* Make a first attempt at drawing:
208 */
209 ret = try_draw_range_elements(brw, info->indexed,
210 hw_prim, info->start, info->count);
211
212 /* Otherwise, flush and retry:
213 */
214 if (ret != 0) {
215 brw_context_flush( brw );
216 ret = try_draw_range_elements(brw, info->indexed,
217 hw_prim, info->start, info->count);
218 assert(ret == 0);
219 }
220 }
221
222
223 boolean brw_draw_init( struct brw_context *brw )
224 {
225 /* Register our drawing function:
226 */
227 brw->base.draw_vbo = brw_draw_vbo;
228
229 /* Create helpers for uploading data in user buffers:
230 */
231 brw->vb.upload_vertex = u_upload_create( &brw->base,
232 128 * 1024,
233 64,
234 PIPE_BIND_VERTEX_BUFFER );
235 if (brw->vb.upload_vertex == NULL)
236 return FALSE;
237
238 brw->vb.upload_index = u_upload_create( &brw->base,
239 32 * 1024,
240 64,
241 PIPE_BIND_INDEX_BUFFER );
242 if (brw->vb.upload_index == NULL)
243 return FALSE;
244
245 return TRUE;
246 }
247
248 void brw_draw_cleanup( struct brw_context *brw )
249 {
250 u_upload_destroy( brw->vb.upload_vertex );
251 u_upload_destroy( brw->vb.upload_index );
252
253 bo_reference(&brw->ib.bo, NULL);
254 }