1 /**************************************************************************
3 * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
26 **************************************************************************/
28 #include "pipe/p_context.h"
30 #include "util/u_upload_mgr.h"
31 #include "util/u_math.h"
34 #include "brw_defines.h"
35 #include "brw_context.h"
36 #include "brw_state.h"
37 #include "brw_screen.h"
38 #include "brw_batchbuffer.h"
39 #include "brw_debug.h"
44 static unsigned brw_translate_surface_format( unsigned id
)
47 case PIPE_FORMAT_R64_FLOAT
:
48 return BRW_SURFACEFORMAT_R64_FLOAT
;
49 case PIPE_FORMAT_R64G64_FLOAT
:
50 return BRW_SURFACEFORMAT_R64G64_FLOAT
;
51 case PIPE_FORMAT_R64G64B64_FLOAT
:
52 return BRW_SURFACEFORMAT_R64G64B64_FLOAT
;
53 case PIPE_FORMAT_R64G64B64A64_FLOAT
:
54 return BRW_SURFACEFORMAT_R64G64B64A64_FLOAT
;
56 case PIPE_FORMAT_R32_FLOAT
:
57 return BRW_SURFACEFORMAT_R32_FLOAT
;
58 case PIPE_FORMAT_R32G32_FLOAT
:
59 return BRW_SURFACEFORMAT_R32G32_FLOAT
;
60 case PIPE_FORMAT_R32G32B32_FLOAT
:
61 return BRW_SURFACEFORMAT_R32G32B32_FLOAT
;
62 case PIPE_FORMAT_R32G32B32A32_FLOAT
:
63 return BRW_SURFACEFORMAT_R32G32B32A32_FLOAT
;
65 case PIPE_FORMAT_R32_UNORM
:
66 return BRW_SURFACEFORMAT_R32_UNORM
;
67 case PIPE_FORMAT_R32G32_UNORM
:
68 return BRW_SURFACEFORMAT_R32G32_UNORM
;
69 case PIPE_FORMAT_R32G32B32_UNORM
:
70 return BRW_SURFACEFORMAT_R32G32B32_UNORM
;
71 case PIPE_FORMAT_R32G32B32A32_UNORM
:
72 return BRW_SURFACEFORMAT_R32G32B32A32_UNORM
;
74 case PIPE_FORMAT_R32_USCALED
:
75 return BRW_SURFACEFORMAT_R32_USCALED
;
76 case PIPE_FORMAT_R32G32_USCALED
:
77 return BRW_SURFACEFORMAT_R32G32_USCALED
;
78 case PIPE_FORMAT_R32G32B32_USCALED
:
79 return BRW_SURFACEFORMAT_R32G32B32_USCALED
;
80 case PIPE_FORMAT_R32G32B32A32_USCALED
:
81 return BRW_SURFACEFORMAT_R32G32B32A32_USCALED
;
83 case PIPE_FORMAT_R32_SNORM
:
84 return BRW_SURFACEFORMAT_R32_SNORM
;
85 case PIPE_FORMAT_R32G32_SNORM
:
86 return BRW_SURFACEFORMAT_R32G32_SNORM
;
87 case PIPE_FORMAT_R32G32B32_SNORM
:
88 return BRW_SURFACEFORMAT_R32G32B32_SNORM
;
89 case PIPE_FORMAT_R32G32B32A32_SNORM
:
90 return BRW_SURFACEFORMAT_R32G32B32A32_SNORM
;
92 case PIPE_FORMAT_R32_SSCALED
:
93 return BRW_SURFACEFORMAT_R32_SSCALED
;
94 case PIPE_FORMAT_R32G32_SSCALED
:
95 return BRW_SURFACEFORMAT_R32G32_SSCALED
;
96 case PIPE_FORMAT_R32G32B32_SSCALED
:
97 return BRW_SURFACEFORMAT_R32G32B32_SSCALED
;
98 case PIPE_FORMAT_R32G32B32A32_SSCALED
:
99 return BRW_SURFACEFORMAT_R32G32B32A32_SSCALED
;
101 case PIPE_FORMAT_R16_UNORM
:
102 return BRW_SURFACEFORMAT_R16_UNORM
;
103 case PIPE_FORMAT_R16G16_UNORM
:
104 return BRW_SURFACEFORMAT_R16G16_UNORM
;
105 case PIPE_FORMAT_R16G16B16_UNORM
:
106 return BRW_SURFACEFORMAT_R16G16B16_UNORM
;
107 case PIPE_FORMAT_R16G16B16A16_UNORM
:
108 return BRW_SURFACEFORMAT_R16G16B16A16_UNORM
;
110 case PIPE_FORMAT_R16_USCALED
:
111 return BRW_SURFACEFORMAT_R16_USCALED
;
112 case PIPE_FORMAT_R16G16_USCALED
:
113 return BRW_SURFACEFORMAT_R16G16_USCALED
;
114 case PIPE_FORMAT_R16G16B16_USCALED
:
115 return BRW_SURFACEFORMAT_R16G16B16_USCALED
;
116 case PIPE_FORMAT_R16G16B16A16_USCALED
:
117 return BRW_SURFACEFORMAT_R16G16B16A16_USCALED
;
119 case PIPE_FORMAT_R16_SNORM
:
120 return BRW_SURFACEFORMAT_R16_SNORM
;
121 case PIPE_FORMAT_R16G16_SNORM
:
122 return BRW_SURFACEFORMAT_R16G16_SNORM
;
123 case PIPE_FORMAT_R16G16B16_SNORM
:
124 return BRW_SURFACEFORMAT_R16G16B16_SNORM
;
125 case PIPE_FORMAT_R16G16B16A16_SNORM
:
126 return BRW_SURFACEFORMAT_R16G16B16A16_SNORM
;
128 case PIPE_FORMAT_R16_SSCALED
:
129 return BRW_SURFACEFORMAT_R16_SSCALED
;
130 case PIPE_FORMAT_R16G16_SSCALED
:
131 return BRW_SURFACEFORMAT_R16G16_SSCALED
;
132 case PIPE_FORMAT_R16G16B16_SSCALED
:
133 return BRW_SURFACEFORMAT_R16G16B16_SSCALED
;
134 case PIPE_FORMAT_R16G16B16A16_SSCALED
:
135 return BRW_SURFACEFORMAT_R16G16B16A16_SSCALED
;
137 case PIPE_FORMAT_R8_UNORM
:
138 return BRW_SURFACEFORMAT_R8_UNORM
;
139 case PIPE_FORMAT_R8G8_UNORM
:
140 return BRW_SURFACEFORMAT_R8G8_UNORM
;
141 case PIPE_FORMAT_R8G8B8_UNORM
:
142 return BRW_SURFACEFORMAT_R8G8B8_UNORM
;
143 case PIPE_FORMAT_R8G8B8A8_UNORM
:
144 return BRW_SURFACEFORMAT_R8G8B8A8_UNORM
;
146 case PIPE_FORMAT_R8_USCALED
:
147 return BRW_SURFACEFORMAT_R8_USCALED
;
148 case PIPE_FORMAT_R8G8_USCALED
:
149 return BRW_SURFACEFORMAT_R8G8_USCALED
;
150 case PIPE_FORMAT_R8G8B8_USCALED
:
151 return BRW_SURFACEFORMAT_R8G8B8_USCALED
;
152 case PIPE_FORMAT_R8G8B8A8_USCALED
:
153 return BRW_SURFACEFORMAT_R8G8B8A8_USCALED
;
155 case PIPE_FORMAT_R8_SNORM
:
156 return BRW_SURFACEFORMAT_R8_SNORM
;
157 case PIPE_FORMAT_R8G8_SNORM
:
158 return BRW_SURFACEFORMAT_R8G8_SNORM
;
159 case PIPE_FORMAT_R8G8B8_SNORM
:
160 return BRW_SURFACEFORMAT_R8G8B8_SNORM
;
161 case PIPE_FORMAT_R8G8B8A8_SNORM
:
162 return BRW_SURFACEFORMAT_R8G8B8A8_SNORM
;
164 case PIPE_FORMAT_R8_SSCALED
:
165 return BRW_SURFACEFORMAT_R8_SSCALED
;
166 case PIPE_FORMAT_R8G8_SSCALED
:
167 return BRW_SURFACEFORMAT_R8G8_SSCALED
;
168 case PIPE_FORMAT_R8G8B8_SSCALED
:
169 return BRW_SURFACEFORMAT_R8G8B8_SSCALED
;
170 case PIPE_FORMAT_R8G8B8A8_SSCALED
:
171 return BRW_SURFACEFORMAT_R8G8B8A8_SSCALED
;
179 static unsigned get_index_type(int type
)
182 case 1: return BRW_INDEX_BYTE
;
183 case 2: return BRW_INDEX_WORD
;
184 case 4: return BRW_INDEX_DWORD
;
185 default: assert(0); return 0;
190 static int brw_prepare_vertices(struct brw_context
*brw
)
192 unsigned int min_index
= brw
->curr
.min_index
;
193 unsigned int max_index
= brw
->curr
.max_index
;
197 if (BRW_DEBUG
& DEBUG_VERTS
)
198 debug_printf("%s %d..%d\n", __FUNCTION__
, min_index
, max_index
);
201 for (i
= 0; i
< brw
->curr
.num_vertex_buffers
; i
++) {
202 struct pipe_vertex_buffer
*vb
= &brw
->curr
.vertex_buffer
[i
];
203 struct brw_winsys_buffer
*bo
;
204 struct pipe_buffer
*upload_buf
= NULL
;
207 if (BRW_DEBUG
& DEBUG_VERTS
)
208 debug_printf("%s vb[%d] user:%d offset:0x%x sz:0x%x stride:0x%x\n",
210 brw_buffer_is_user_buffer(vb
->buffer
),
215 if (brw_buffer_is_user_buffer(vb
->buffer
)) {
217 /* XXX: simplify this. Stop the state trackers from generating
218 * zero-stride buffers & have them use additional constants (or
219 * add support for >1 constant buffer) instead.
221 unsigned size
= (vb
->stride
== 0 ?
222 vb
->buffer
->size
- vb
->buffer_offset
:
223 MAX2(vb
->buffer
->size
- vb
->buffer_offset
,
224 vb
->stride
* (max_index
+ 1 - min_index
)));
226 ret
= u_upload_buffer( brw
->vb
.upload_vertex
,
227 vb
->buffer_offset
+ min_index
* vb
->stride
,
235 bo
= brw_buffer(upload_buf
)->bo
;
237 assert(offset
+ size
<= bo
->size
);
241 offset
= vb
->buffer_offset
;
242 bo
= brw_buffer(vb
->buffer
)->bo
;
245 assert(offset
< bo
->size
);
247 /* Set up post-upload info about this vertex buffer:
249 brw
->vb
.vb
[i
].offset
= offset
;
250 brw
->vb
.vb
[i
].stride
= vb
->stride
;
251 brw
->vb
.vb
[i
].vertex_count
= (vb
->stride
== 0 ?
253 (bo
->size
- offset
) / vb
->stride
);
255 bo_reference( &brw
->vb
.vb
[i
].bo
, bo
);
257 /* Don't need to retain this reference. We have a reference on
258 * the underlying winsys buffer:
260 pipe_buffer_reference( &upload_buf
, NULL
);
264 brw_prepare_query_begin(brw
);
266 for (i
= 0; i
< brw
->vb
.nr_vb
; i
++) {
267 brw_add_validated_bo(brw
, brw
->vb
.vb
[i
].bo
);
273 static int brw_emit_vertex_buffers( struct brw_context
*brw
)
277 /* If the VS doesn't read any inputs (calculating vertex position from
278 * a state variable for some reason, for example), just bail.
280 * The stale VB state stays in place, but they don't do anything unless
281 * a VE loads from them.
283 if (brw
->vb
.nr_vb
== 0) {
284 if (BRW_DEBUG
& DEBUG_VERTS
)
285 debug_printf("%s: no active vertex buffers\n", __FUNCTION__
);
290 /* Emit VB state packets.
292 BEGIN_BATCH(1 + brw
->vb
.nr_vb
* 4, IGNORE_CLIPRECTS
);
293 OUT_BATCH((CMD_VERTEX_BUFFER
<< 16) |
294 ((1 + brw
->vb
.nr_vb
* 4) - 2));
296 for (i
= 0; i
< brw
->vb
.nr_vb
; i
++) {
297 OUT_BATCH((i
<< BRW_VB0_INDEX_SHIFT
) |
298 BRW_VB0_ACCESS_VERTEXDATA
|
299 (brw
->vb
.vb
[i
].stride
<< BRW_VB0_PITCH_SHIFT
));
300 OUT_RELOC(brw
->vb
.vb
[i
].bo
,
302 brw
->vb
.vb
[i
].offset
);
303 if (BRW_IS_IGDNG(brw
)) {
304 OUT_RELOC(brw
->vb
.vb
[i
].bo
,
306 brw
->vb
.vb
[i
].bo
->size
- 1);
308 OUT_BATCH(brw
->vb
.vb
[i
].stride
? brw
->vb
.vb
[i
].vertex_count
: 0);
309 OUT_BATCH(0); /* Instance data step rate */
318 static int brw_emit_vertex_elements(struct brw_context
*brw
)
320 GLuint nr
= brw
->curr
.num_vertex_elements
;
323 brw_emit_query_begin(brw
);
325 /* If the VS doesn't read any inputs (calculating vertex position from
326 * a state variable for some reason, for example), emit a single pad
327 * VERTEX_ELEMENT struct and bail.
329 * The stale VB state stays in place, but they don't do anything unless
330 * a VE loads from them.
333 BEGIN_BATCH(3, IGNORE_CLIPRECTS
);
334 OUT_BATCH((CMD_VERTEX_ELEMENT
<< 16) | 1);
335 OUT_BATCH((0 << BRW_VE0_INDEX_SHIFT
) |
337 (BRW_SURFACEFORMAT_R32G32B32A32_FLOAT
<< BRW_VE0_FORMAT_SHIFT
) |
338 (0 << BRW_VE0_SRC_OFFSET_SHIFT
));
339 OUT_BATCH((BRW_VE1_COMPONENT_STORE_0
<< BRW_VE1_COMPONENT_0_SHIFT
) |
340 (BRW_VE1_COMPONENT_STORE_0
<< BRW_VE1_COMPONENT_1_SHIFT
) |
341 (BRW_VE1_COMPONENT_STORE_0
<< BRW_VE1_COMPONENT_2_SHIFT
) |
342 (BRW_VE1_COMPONENT_STORE_1_FLT
<< BRW_VE1_COMPONENT_3_SHIFT
));
347 /* Now emit vertex element (VEP) state packets.
350 BEGIN_BATCH(1 + nr
* 2, IGNORE_CLIPRECTS
);
351 OUT_BATCH((CMD_VERTEX_ELEMENT
<< 16) | ((1 + nr
* 2) - 2));
352 for (i
= 0; i
< nr
; i
++) {
353 const struct pipe_vertex_element
*input
= &brw
->curr
.vertex_element
[i
];
354 uint32_t format
= brw_translate_surface_format( input
->src_format
);
355 uint32_t comp0
= BRW_VE1_COMPONENT_STORE_SRC
;
356 uint32_t comp1
= BRW_VE1_COMPONENT_STORE_SRC
;
357 uint32_t comp2
= BRW_VE1_COMPONENT_STORE_SRC
;
358 uint32_t comp3
= BRW_VE1_COMPONENT_STORE_SRC
;
360 switch (input
->nr_components
) {
361 case 0: comp0
= BRW_VE1_COMPONENT_STORE_0
;
362 case 1: comp1
= BRW_VE1_COMPONENT_STORE_0
;
363 case 2: comp2
= BRW_VE1_COMPONENT_STORE_0
;
364 case 3: comp3
= BRW_VE1_COMPONENT_STORE_1_FLT
;
368 OUT_BATCH((input
->vertex_buffer_index
<< BRW_VE0_INDEX_SHIFT
) |
370 (format
<< BRW_VE0_FORMAT_SHIFT
) |
371 (input
->src_offset
<< BRW_VE0_SRC_OFFSET_SHIFT
));
373 if (BRW_IS_IGDNG(brw
))
374 OUT_BATCH((comp0
<< BRW_VE1_COMPONENT_0_SHIFT
) |
375 (comp1
<< BRW_VE1_COMPONENT_1_SHIFT
) |
376 (comp2
<< BRW_VE1_COMPONENT_2_SHIFT
) |
377 (comp3
<< BRW_VE1_COMPONENT_3_SHIFT
));
379 OUT_BATCH((comp0
<< BRW_VE1_COMPONENT_0_SHIFT
) |
380 (comp1
<< BRW_VE1_COMPONENT_1_SHIFT
) |
381 (comp2
<< BRW_VE1_COMPONENT_2_SHIFT
) |
382 (comp3
<< BRW_VE1_COMPONENT_3_SHIFT
) |
383 ((i
* 4) << BRW_VE1_DST_OFFSET_SHIFT
));
390 static int brw_emit_vertices( struct brw_context
*brw
)
394 ret
= brw_emit_vertex_buffers( brw
);
398 ret
= brw_emit_vertex_elements( brw
);
406 const struct brw_tracked_state brw_vertices
= {
408 .mesa
= PIPE_NEW_INDEX_RANGE
,
409 .brw
= BRW_NEW_BATCH
| BRW_NEW_VERTICES
,
412 .prepare
= brw_prepare_vertices
,
413 .emit
= brw_emit_vertices
,
417 static int brw_prepare_indices(struct brw_context
*brw
)
419 struct pipe_buffer
*index_buffer
= brw
->curr
.index_buffer
;
420 struct pipe_buffer
*upload_buf
= NULL
;
421 struct brw_winsys_buffer
*bo
= NULL
;
427 if (index_buffer
== NULL
)
430 if (BRW_DEBUG
& DEBUG_VERTS
)
431 debug_printf("%s: index_size:%d index_buffer->size:%d\n",
433 brw
->curr
.index_size
,
434 brw
->curr
.index_buffer
->size
);
436 ib_size
= index_buffer
->size
;
437 index_size
= brw
->curr
.index_size
;
439 /* Turn userbuffer into a proper hardware buffer?
441 if (brw_buffer_is_user_buffer(index_buffer
)) {
443 ret
= u_upload_buffer( brw
->vb
.upload_index
,
452 bo
= brw_buffer(upload_buf
)->bo
;
454 /* XXX: annotate the userbuffer with the upload information so
455 * that successive calls don't get re-uploaded.
459 bo
= brw_buffer(index_buffer
)->bo
;
464 /* Use CMD_3D_PRIM's start_vertex_offset to avoid re-uploading the
465 * index buffer state when we're just moving the start index of our
468 * In gallium this will happen in the case where successive draw
469 * calls are made with (distinct?) userbuffers, but the upload_mgr
470 * places the data into a single winsys buffer.
472 * This statechange doesn't raise any state flags and is always
473 * just merged into the final draw packet:
476 assert((offset
& (index_size
- 1)) == 0);
477 brw
->ib
.start_vertex_offset
= offset
/ index_size
;
480 /* These statechanges trigger a new CMD_INDEX_BUFFER packet:
482 if (brw
->ib
.bo
!= bo
||
483 brw
->ib
.size
!= ib_size
)
485 bo_reference(&brw
->ib
.bo
, bo
);
486 brw
->ib
.size
= ib_size
;
487 brw
->state
.dirty
.brw
|= BRW_NEW_INDEX_BUFFER
;
490 pipe_buffer_reference( &upload_buf
, NULL
);
491 brw_add_validated_bo(brw
, brw
->ib
.bo
);
495 const struct brw_tracked_state brw_indices
= {
497 .mesa
= PIPE_NEW_INDEX_BUFFER
,
501 .prepare
= brw_prepare_indices
,
504 static int brw_emit_index_buffer(struct brw_context
*brw
)
506 /* Emit the indexbuffer packet:
510 struct brw_indexbuffer ib
;
512 memset(&ib
, 0, sizeof(ib
));
514 ib
.header
.bits
.opcode
= CMD_INDEX_BUFFER
;
515 ib
.header
.bits
.length
= sizeof(ib
)/4 - 2;
516 ib
.header
.bits
.index_format
= get_index_type(brw
->ib
.size
);
517 ib
.header
.bits
.cut_index_enable
= 0;
519 BEGIN_BATCH(4, IGNORE_CLIPRECTS
);
520 OUT_BATCH( ib
.header
.dword
);
521 OUT_RELOC(brw
->ib
.bo
,
524 OUT_RELOC(brw
->ib
.bo
,
526 brw
->ib
.offset
+ brw
->ib
.size
- 1);
534 const struct brw_tracked_state brw_index_buffer
= {
537 .brw
= BRW_NEW_BATCH
| BRW_NEW_INDEX_BUFFER
,
540 .emit
= brw_emit_index_buffer
,