src/gallium/drivers/i965/brw_screen.c

   1 /**************************************************************************
   2  *
   3  * Copyright 2008 Tungsten Graphics, Inc., Cedar Park, Texas.
   4  * All Rights Reserved.
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the
   8  * "Software"), to deal in the Software without restriction, including
   9  * without limitation the rights to use, copy, modify, merge, publish,
  10  * distribute, sub license, and/or sell copies of the Software, and to
  11  * permit persons to whom the Software is furnished to do so, subject to
  12  * the following conditions:
  13  *
  14  * The above copyright notice and this permission notice (including the
  15  * next paragraph) shall be included in all copies or substantial portions
  16  * of the Software.
  17  *
  18  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  19  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  20  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
  21  * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
  22  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
  23  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
  24  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25  *
  26  **************************************************************************/
  27
  28
  29 #include "pipe/p_inlines.h"
  30 #include "util/u_memory.h"
  31 #include "util/u_string.h"
  32
  33 #include "brw_reg.h"
  34 #include "brw_context.h"
  35 #include "brw_screen.h"
  36 #include "brw_winsys.h"
  37 #include "brw_debug.h"
  38
  39 #ifdef DEBUG
  40 static const struct debug_named_value debug_names[] = {
  41    { "tex",   DEBUG_TEXTURE},
  42    { "state", DEBUG_STATE},
  43    { "ioctl", DEBUG_IOCTL},
  44    { "blit",  DEBUG_BLIT},
  45    { "curbe", DEBUG_CURBE},
  46    { "fall",  DEBUG_FALLBACKS},
  47    { "verb",  DEBUG_VERBOSE},
  48    { "bat",   DEBUG_BATCH},
  49    { "pix",   DEBUG_PIXEL},
  50    { "buf",   DEBUG_BUFMGR},
  51    { "min",   DEBUG_MIN_URB},
  52    { "sync",  DEBUG_SYNC},
  53    { "prim",  DEBUG_PRIMS },
  54    { "vert",  DEBUG_VERTS },
  55    { "dma",   DEBUG_DMA },
  56    { "san",   DEBUG_SANITY },
  57    { "sleep", DEBUG_SLEEP },
  58    { "stats", DEBUG_STATS },
  59    { "sing",  DEBUG_SINGLE_THREAD },
  60    { "thre",  DEBUG_SINGLE_THREAD },
  61    { "wm",    DEBUG_WM },
  62    { "urb",   DEBUG_URB },
  63    { "vs",    DEBUG_VS },
  64    { NULL,    0 }
  65 };
  66
  67 int BRW_DEBUG = 0;
  68 #endif
  69
  70
  71 /*
  72  * Probe functions
  73  */
  74
  75
  76 static const char *
  77 brw_get_vendor(struct pipe_screen *screen)
  78 {
  79    return "VMware, Inc.";
  80 }
  81
  82 static const char *
  83 brw_get_name(struct pipe_screen *screen)
  84 {
  85    static char buffer[128];
  86    const char *chipset;
  87
  88    switch (brw_screen(screen)->chipset.pci_id) {
  89    case PCI_CHIP_I965_G:
  90       chipset = "I965_G";
  91       break;
  92    case PCI_CHIP_I965_Q:
  93       chipset = "I965_Q";
  94       break;
  95    case PCI_CHIP_I965_G_1:
  96       chipset = "I965_G_1";
  97       break;
  98    case PCI_CHIP_I946_GZ:
  99       chipset = "I946_GZ";
 100       break;
 101    case PCI_CHIP_I965_GM:
 102       chipset = "I965_GM";
 103       break;
 104    case PCI_CHIP_I965_GME:
 105       chipset = "I965_GME";
 106       break;
 107    case PCI_CHIP_GM45_GM:
 108       chipset = "GM45_GM";
 109       break;
 110    case PCI_CHIP_IGD_E_G:
 111       chipset = "IGD_E_G";
 112       break;
 113    case PCI_CHIP_Q45_G:
 114       chipset = "Q45_G";
 115       break;
 116    case PCI_CHIP_G45_G:
 117       chipset = "G45_G";
 118       break;
 119    case PCI_CHIP_G41_G:
 120       chipset = "G41_G";
 121       break;
 122    case PCI_CHIP_B43_G:
 123       chipset = "B43_G";
 124       break;
 125    case PCI_CHIP_ILD_G:
 126       chipset = "ILD_G";
 127       break;
 128    case PCI_CHIP_ILM_G:
 129       chipset = "ILM_G";
 130       break;
 131    }
 132
 133    util_snprintf(buffer, sizeof(buffer), "i965 (chipset: %s)", chipset);
 134    return buffer;
 135 }
 136
 137 static int
 138 brw_get_param(struct pipe_screen *screen, int param)
 139 {
 140    switch (param) {
 141    case PIPE_CAP_MAX_TEXTURE_IMAGE_UNITS:
 142       return 8;
 143    case PIPE_CAP_NPOT_TEXTURES:
 144       return 1;
 145    case PIPE_CAP_TWO_SIDED_STENCIL:
 146       return 1;
 147    case PIPE_CAP_GLSL:
 148       return 0;
 149    case PIPE_CAP_ANISOTROPIC_FILTER:
 150       return 0;
 151    case PIPE_CAP_POINT_SPRITE:
 152       return 0;
 153    case PIPE_CAP_MAX_RENDER_TARGETS:
 154       return 1;
 155    case PIPE_CAP_OCCLUSION_QUERY:
 156       return 0;
 157    case PIPE_CAP_TEXTURE_SHADOW_MAP:
 158       return 1;
 159    case PIPE_CAP_MAX_TEXTURE_2D_LEVELS:
 160       return 11; /* max 1024x1024 */
 161    case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
 162       return 8;  /* max 128x128x128 */
 163    case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
 164       return 11; /* max 1024x1024 */
 165    default:
 166       return 0;
 167    }
 168 }
 169
 170 static float
 171 brw_get_paramf(struct pipe_screen *screen, int param)
 172 {
 173    switch (param) {
 174    case PIPE_CAP_MAX_LINE_WIDTH:
 175       /* fall-through */
 176    case PIPE_CAP_MAX_LINE_WIDTH_AA:
 177       return 7.5;
 178
 179    case PIPE_CAP_MAX_POINT_WIDTH:
 180       /* fall-through */
 181    case PIPE_CAP_MAX_POINT_WIDTH_AA:
 182       return 255.0;
 183
 184    case PIPE_CAP_MAX_TEXTURE_ANISOTROPY:
 185       return 4.0;
 186
 187    case PIPE_CAP_MAX_TEXTURE_LOD_BIAS:
 188       return 16.0;
 189
 190    default:
 191       return 0;
 192    }
 193 }
 194
 195 static boolean
 196 brw_is_format_supported(struct pipe_screen *screen,
 197                          enum pipe_format format,
 198                          enum pipe_texture_target target,
 199                          unsigned tex_usage,
 200                          unsigned geom_flags)
 201 {
 202    static const enum pipe_format tex_supported[] = {
 203       PIPE_FORMAT_R8G8B8A8_UNORM,
 204       PIPE_FORMAT_A8R8G8B8_UNORM,
 205       PIPE_FORMAT_R5G6B5_UNORM,
 206       PIPE_FORMAT_L8_UNORM,
 207       PIPE_FORMAT_A8_UNORM,
 208       PIPE_FORMAT_I8_UNORM,
 209       PIPE_FORMAT_A8L8_UNORM,
 210       PIPE_FORMAT_YCBCR,
 211       PIPE_FORMAT_YCBCR_REV,
 212       PIPE_FORMAT_S8Z24_UNORM,
 213       PIPE_FORMAT_NONE  /* list terminator */
 214    };
 215    static const enum pipe_format surface_supported[] = {
 216       PIPE_FORMAT_A8R8G8B8_UNORM,
 217       PIPE_FORMAT_R5G6B5_UNORM,
 218       PIPE_FORMAT_S8Z24_UNORM,
 219       PIPE_FORMAT_NONE  /* list terminator */
 220    };
 221    const enum pipe_format *list;
 222    uint i;
 223
 224    if(tex_usage & PIPE_TEXTURE_USAGE_RENDER_TARGET)
 225       list = surface_supported;
 226    else
 227       list = tex_supported;
 228
 229    for (i = 0; list[i] != PIPE_FORMAT_NONE; i++) {
 230       if (list[i] == format)
 231          return TRUE;
 232    }
 233
 234    return FALSE;
 235 }
 236
 237
 238 /*
 239  * Fence functions
 240  */
 241
 242
 243 static void
 244 brw_fence_reference(struct pipe_screen *screen,
 245                      struct pipe_fence_handle **ptr,
 246                      struct pipe_fence_handle *fence)
 247 {
 248 }
 249
 250 static int
 251 brw_fence_signalled(struct pipe_screen *screen,
 252                      struct pipe_fence_handle *fence,
 253                      unsigned flags)
 254 {
 255    return 0;                    /* XXX shouldn't this be a boolean? */
 256 }
 257
 258 static int
 259 brw_fence_finish(struct pipe_screen *screen,
 260                  struct pipe_fence_handle *fence,
 261                  unsigned flags)
 262 {
 263    return 0;
 264 }
 265
 266
 267 /*
 268  * Generic functions
 269  */
 270
 271
 272 static void
 273 brw_destroy_screen(struct pipe_screen *screen)
 274 {
 275    struct brw_screen *bscreen = brw_screen(screen);
 276
 277    if (bscreen->sws)
 278       bscreen->sws->destroy(bscreen->sws);
 279
 280    FREE(bscreen);
 281 }
 282
 283 /**
 284  * Create a new brw_screen object
 285  */
 286 struct pipe_screen *
 287 brw_create_screen(struct brw_winsys_screen *sws, uint pci_id)
 288 {
 289    struct brw_screen *bscreen;
 290    struct brw_chipset chipset;
 291
 292 #ifdef DEBUG
 293    BRW_DEBUG = debug_get_flags_option("BRW_DEBUG", debug_names, 0);
 294    BRW_DEBUG |= debug_get_flags_option("INTEL_DEBUG", debug_names, 0);
 295    BRW_DEBUG |= DEBUG_STATS | DEBUG_MIN_URB;
 296 #endif
 297
 298    memset(&chipset, 0, sizeof chipset);
 299
 300    chipset.pci_id = pci_id;
 301
 302    switch (pci_id) {
 303    case PCI_CHIP_I965_G:
 304    case PCI_CHIP_I965_Q:
 305    case PCI_CHIP_I965_G_1:
 306    case PCI_CHIP_I946_GZ:
 307    case PCI_CHIP_I965_GM:
 308    case PCI_CHIP_I965_GME:
 309       chipset.is_965 = TRUE;
 310       break;
 311
 312    case PCI_CHIP_GM45_GM:
 313    case PCI_CHIP_IGD_E_G:
 314    case PCI_CHIP_Q45_G:
 315    case PCI_CHIP_G45_G:
 316    case PCI_CHIP_G41_G:
 317    case PCI_CHIP_B43_G:
 318       chipset.is_g4x = TRUE;
 319       break;
 320
 321    case PCI_CHIP_ILD_G:
 322    case PCI_CHIP_ILM_G:
 323       chipset.is_igdng = TRUE;
 324       break;
 325
 326    default:
 327       debug_printf("%s: unknown pci id 0x%x, cannot create screen\n",
 328                    __FUNCTION__, pci_id);
 329       return NULL;
 330    }
 331
 332
 333    bscreen = CALLOC_STRUCT(brw_screen);
 334    if (!bscreen)
 335       return NULL;
 336
 337    bscreen->chipset = chipset;
 338    bscreen->sws = sws;
 339    bscreen->base.winsys = NULL;
 340    bscreen->base.destroy = brw_destroy_screen;
 341    bscreen->base.get_name = brw_get_name;
 342    bscreen->base.get_vendor = brw_get_vendor;
 343    bscreen->base.get_param = brw_get_param;
 344    bscreen->base.get_paramf = brw_get_paramf;
 345    bscreen->base.is_format_supported = brw_is_format_supported;
 346    bscreen->base.fence_reference = brw_fence_reference;
 347    bscreen->base.fence_signalled = brw_fence_signalled;
 348    bscreen->base.fence_finish = brw_fence_finish;
 349
 350    brw_screen_tex_init(bscreen);
 351    brw_screen_tex_surface_init(bscreen);
 352    brw_screen_buffer_init(bscreen);
 353
 354    return &bscreen->base;
 355 }