src/gallium/drivers/i965/brw_screen.c

   1 /**************************************************************************
   2  *
   3  * Copyright 2008 Tungsten Graphics, Inc., Cedar Park, Texas.
   4  * All Rights Reserved.
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the
   8  * "Software"), to deal in the Software without restriction, including
   9  * without limitation the rights to use, copy, modify, merge, publish,
  10  * distribute, sub license, and/or sell copies of the Software, and to
  11  * permit persons to whom the Software is furnished to do so, subject to
  12  * the following conditions:
  13  *
  14  * The above copyright notice and this permission notice (including the
  15  * next paragraph) shall be included in all copies or substantial portions
  16  * of the Software.
  17  *
  18  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  19  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  20  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
  21  * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
  22  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
  23  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
  24  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25  *
  26  **************************************************************************/
  27
  28
  29 #include "pipe/p_inlines.h"
  30 #include "util/u_memory.h"
  31 #include "util/u_string.h"
  32
  33 #include "brw_reg.h"
  34 #include "brw_context.h"
  35 #include "brw_screen.h"
  36 #include "brw_winsys.h"
  37 #include "brw_debug.h"
  38
  39 #ifdef DEBUG
  40 static const struct debug_named_value debug_names[] = {
  41    { "tex",   DEBUG_TEXTURE},
  42    { "state", DEBUG_STATE},
  43    { "ioctl", DEBUG_IOCTL},
  44    { "blit",  DEBUG_BLIT},
  45    { "curbe", DEBUG_CURBE},
  46    { "fall",  DEBUG_FALLBACKS},
  47    { "verb",  DEBUG_VERBOSE},
  48    { "bat",   DEBUG_BATCH},
  49    { "pix",   DEBUG_PIXEL},
  50    { "buf",   DEBUG_BUFMGR},
  51    { "min",   DEBUG_MIN_URB},
  52    { "dis",   DEBUG_DISASSEM},
  53    { "sync",  DEBUG_SYNC},
  54    { "prim",  DEBUG_PRIMS },
  55    { "vert",  DEBUG_VERTS },
  56    { "dma",   DEBUG_DMA },
  57    { "san",   DEBUG_SANITY },
  58    { "sleep", DEBUG_SLEEP },
  59    { "stats", DEBUG_STATS },
  60    { "sing",  DEBUG_SINGLE_THREAD },
  61    { "thre",  DEBUG_SINGLE_THREAD },
  62    { "wm",    DEBUG_WM },
  63    { "urb",   DEBUG_URB },
  64    { "vs",    DEBUG_VS },
  65    { NULL,    0 }
  66 };
  67
  68 int BRW_DEBUG = 0;
  69 #endif
  70
  71
  72 /*
  73  * Probe functions
  74  */
  75
  76
  77 static const char *
  78 brw_get_vendor(struct pipe_screen *screen)
  79 {
  80    return "VMware, Inc.";
  81 }
  82
  83 static const char *
  84 brw_get_name(struct pipe_screen *screen)
  85 {
  86    static char buffer[128];
  87    const char *chipset;
  88
  89    switch (brw_screen(screen)->chipset.pci_id) {
  90    case PCI_CHIP_I965_G:
  91       chipset = "I965_G";
  92       break;
  93    case PCI_CHIP_I965_Q:
  94       chipset = "I965_Q";
  95       break;
  96    case PCI_CHIP_I965_G_1:
  97       chipset = "I965_G_1";
  98       break;
  99    case PCI_CHIP_I946_GZ:
 100       chipset = "I946_GZ";
 101       break;
 102    case PCI_CHIP_I965_GM:
 103       chipset = "I965_GM";
 104       break;
 105    case PCI_CHIP_I965_GME:
 106       chipset = "I965_GME";
 107       break;
 108    case PCI_CHIP_GM45_GM:
 109       chipset = "GM45_GM";
 110       break;
 111    case PCI_CHIP_IGD_E_G:
 112       chipset = "IGD_E_G";
 113       break;
 114    case PCI_CHIP_Q45_G:
 115       chipset = "Q45_G";
 116       break;
 117    case PCI_CHIP_G45_G:
 118       chipset = "G45_G";
 119       break;
 120    case PCI_CHIP_G41_G:
 121       chipset = "G41_G";
 122       break;
 123    case PCI_CHIP_B43_G:
 124       chipset = "B43_G";
 125       break;
 126    case PCI_CHIP_ILD_G:
 127       chipset = "ILD_G";
 128       break;
 129    case PCI_CHIP_ILM_G:
 130       chipset = "ILM_G";
 131       break;
 132    }
 133
 134    util_snprintf(buffer, sizeof(buffer), "i965 (chipset: %s)", chipset);
 135    return buffer;
 136 }
 137
 138 static int
 139 brw_get_param(struct pipe_screen *screen, int param)
 140 {
 141    switch (param) {
 142    case PIPE_CAP_MAX_TEXTURE_IMAGE_UNITS:
 143       return 8;
 144    case PIPE_CAP_NPOT_TEXTURES:
 145       return 1;
 146    case PIPE_CAP_TWO_SIDED_STENCIL:
 147       return 1;
 148    case PIPE_CAP_GLSL:
 149       return 0;
 150    case PIPE_CAP_ANISOTROPIC_FILTER:
 151       return 0;
 152    case PIPE_CAP_POINT_SPRITE:
 153       return 0;
 154    case PIPE_CAP_MAX_RENDER_TARGETS:
 155       return 1;
 156    case PIPE_CAP_OCCLUSION_QUERY:
 157       return 0;
 158    case PIPE_CAP_TEXTURE_SHADOW_MAP:
 159       return 1;
 160    case PIPE_CAP_MAX_TEXTURE_2D_LEVELS:
 161       return 11; /* max 1024x1024 */
 162    case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
 163       return 8;  /* max 128x128x128 */
 164    case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
 165       return 11; /* max 1024x1024 */
 166    default:
 167       return 0;
 168    }
 169 }
 170
 171 static float
 172 brw_get_paramf(struct pipe_screen *screen, int param)
 173 {
 174    switch (param) {
 175    case PIPE_CAP_MAX_LINE_WIDTH:
 176       /* fall-through */
 177    case PIPE_CAP_MAX_LINE_WIDTH_AA:
 178       return 7.5;
 179
 180    case PIPE_CAP_MAX_POINT_WIDTH:
 181       /* fall-through */
 182    case PIPE_CAP_MAX_POINT_WIDTH_AA:
 183       return 255.0;
 184
 185    case PIPE_CAP_MAX_TEXTURE_ANISOTROPY:
 186       return 4.0;
 187
 188    case PIPE_CAP_MAX_TEXTURE_LOD_BIAS:
 189       return 16.0;
 190
 191    default:
 192       return 0;
 193    }
 194 }
 195
 196 static boolean
 197 brw_is_format_supported(struct pipe_screen *screen,
 198                          enum pipe_format format,
 199                          enum pipe_texture_target target,
 200                          unsigned tex_usage,
 201                          unsigned geom_flags)
 202 {
 203    static const enum pipe_format tex_supported[] = {
 204       PIPE_FORMAT_R8G8B8A8_UNORM,
 205       PIPE_FORMAT_A8R8G8B8_UNORM,
 206       PIPE_FORMAT_R5G6B5_UNORM,
 207       PIPE_FORMAT_L8_UNORM,
 208       PIPE_FORMAT_A8_UNORM,
 209       PIPE_FORMAT_I8_UNORM,
 210       PIPE_FORMAT_A8L8_UNORM,
 211       PIPE_FORMAT_YCBCR,
 212       PIPE_FORMAT_YCBCR_REV,
 213       PIPE_FORMAT_S8Z24_UNORM,
 214       PIPE_FORMAT_NONE  /* list terminator */
 215    };
 216    static const enum pipe_format surface_supported[] = {
 217       PIPE_FORMAT_A8R8G8B8_UNORM,
 218       PIPE_FORMAT_R5G6B5_UNORM,
 219       PIPE_FORMAT_S8Z24_UNORM,
 220       PIPE_FORMAT_NONE  /* list terminator */
 221    };
 222    const enum pipe_format *list;
 223    uint i;
 224
 225    if(tex_usage & PIPE_TEXTURE_USAGE_RENDER_TARGET)
 226       list = surface_supported;
 227    else
 228       list = tex_supported;
 229
 230    for (i = 0; list[i] != PIPE_FORMAT_NONE; i++) {
 231       if (list[i] == format)
 232          return TRUE;
 233    }
 234
 235    return FALSE;
 236 }
 237
 238
 239 /*
 240  * Fence functions
 241  */
 242
 243
 244 static void
 245 brw_fence_reference(struct pipe_screen *screen,
 246                      struct pipe_fence_handle **ptr,
 247                      struct pipe_fence_handle *fence)
 248 {
 249 }
 250
 251 static int
 252 brw_fence_signalled(struct pipe_screen *screen,
 253                      struct pipe_fence_handle *fence,
 254                      unsigned flags)
 255 {
 256    return 0;                    /* XXX shouldn't this be a boolean? */
 257 }
 258
 259 static int
 260 brw_fence_finish(struct pipe_screen *screen,
 261                  struct pipe_fence_handle *fence,
 262                  unsigned flags)
 263 {
 264    return 0;
 265 }
 266
 267
 268 /*
 269  * Generic functions
 270  */
 271
 272
 273 static void
 274 brw_destroy_screen(struct pipe_screen *screen)
 275 {
 276    struct brw_screen *bscreen = brw_screen(screen);
 277
 278    if (bscreen->sws)
 279       bscreen->sws->destroy(bscreen->sws);
 280
 281    FREE(bscreen);
 282 }
 283
 284 /**
 285  * Create a new brw_screen object
 286  */
 287 struct pipe_screen *
 288 brw_create_screen(struct brw_winsys_screen *sws, uint pci_id)
 289 {
 290    struct brw_screen *bscreen;
 291    struct brw_chipset chipset;
 292
 293 #ifdef DEBUG
 294    BRW_DEBUG = debug_get_flags_option("BRW_DEBUG", debug_names, 0);
 295    BRW_DEBUG |= debug_get_flags_option("INTEL_DEBUG", debug_names, 0);
 296    BRW_DEBUG |= DEBUG_STATS | DEBUG_MIN_URB;
 297 #endif
 298
 299    memset(&chipset, 0, sizeof chipset);
 300
 301    chipset.pci_id = pci_id;
 302
 303    switch (pci_id) {
 304    case PCI_CHIP_I965_G:
 305    case PCI_CHIP_I965_Q:
 306    case PCI_CHIP_I965_G_1:
 307    case PCI_CHIP_I946_GZ:
 308    case PCI_CHIP_I965_GM:
 309    case PCI_CHIP_I965_GME:
 310       chipset.is_965 = TRUE;
 311       break;
 312
 313    case PCI_CHIP_GM45_GM:
 314    case PCI_CHIP_IGD_E_G:
 315    case PCI_CHIP_Q45_G:
 316    case PCI_CHIP_G45_G:
 317    case PCI_CHIP_G41_G:
 318    case PCI_CHIP_B43_G:
 319       chipset.is_g4x = TRUE;
 320       break;
 321
 322    case PCI_CHIP_ILD_G:
 323    case PCI_CHIP_ILM_G:
 324       chipset.is_igdng = TRUE;
 325       break;
 326
 327    default:
 328       debug_printf("%s: unknown pci id 0x%x, cannot create screen\n",
 329                    __FUNCTION__, pci_id);
 330       return NULL;
 331    }
 332
 333
 334    bscreen = CALLOC_STRUCT(brw_screen);
 335    if (!bscreen)
 336       return NULL;
 337
 338    bscreen->chipset = chipset;
 339    bscreen->sws = sws;
 340    bscreen->base.winsys = NULL;
 341    bscreen->base.destroy = brw_destroy_screen;
 342    bscreen->base.get_name = brw_get_name;
 343    bscreen->base.get_vendor = brw_get_vendor;
 344    bscreen->base.get_param = brw_get_param;
 345    bscreen->base.get_paramf = brw_get_paramf;
 346    bscreen->base.is_format_supported = brw_is_format_supported;
 347    bscreen->base.fence_reference = brw_fence_reference;
 348    bscreen->base.fence_signalled = brw_fence_signalled;
 349    bscreen->base.fence_finish = brw_fence_finish;
 350
 351    brw_screen_tex_init(bscreen);
 352    brw_screen_tex_surface_init(bscreen);
 353    brw_screen_buffer_init(bscreen);
 354
 355    return &bscreen->base;
 356 }