src/gallium/drivers/i965/brw_screen.c

   1 /**************************************************************************
   2  *
   3  * Copyright 2008 Tungsten Graphics, Inc., Cedar Park, Texas.
   4  * All Rights Reserved.
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the
   8  * "Software"), to deal in the Software without restriction, including
   9  * without limitation the rights to use, copy, modify, merge, publish,
  10  * distribute, sub license, and/or sell copies of the Software, and to
  11  * permit persons to whom the Software is furnished to do so, subject to
  12  * the following conditions:
  13  *
  14  * The above copyright notice and this permission notice (including the
  15  * next paragraph) shall be included in all copies or substantial portions
  16  * of the Software.
  17  *
  18  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  19  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  20  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
  21  * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
  22  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
  23  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
  24  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25  *
  26  **************************************************************************/
  27
  28
  29 #include "pipe/p_inlines.h"
  30 #include "util/u_memory.h"
  31 #include "util/u_string.h"
  32
  33 #include "brw_reg.h"
  34 #include "brw_context.h"
  35 #include "brw_screen.h"
  36 #include "brw_buffer.h"
  37 #include "brw_texture.h"
  38 #include "brw_winsys.h"
  39
  40 #ifdef DEBUG
  41 static const struct debug_named_value debug_names[] = {
  42    { "tex",   DEBUG_TEXTURE},
  43    { "state", DEBUG_STATE},
  44    { "ioctl", DEBUG_IOCTL},
  45    { "blit",  DEBUG_BLIT},
  46    { "curbe", DEBUG_CURBE},
  47    { "fall",  DEBUG_FALLBACKS},
  48    { "verb",  DEBUG_VERBOSE},
  49    { "bat",   DEBUG_BATCH},
  50    { "pix",   DEBUG_PIXEL},
  51    { "buf",   DEBUG_BUFMGR},
  52    { "reg",   DEBUG_REGION},
  53    { "fbo",   DEBUG_FBO},
  54    { "lock",  DEBUG_LOCK},
  55    { "sync",  DEBUG_SYNC},
  56    { "prim",  DEBUG_PRIMS },
  57    { "vert",  DEBUG_VERTS },
  58    { "dri",   DEBUG_DRI },
  59    { "dma",   DEBUG_DMA },
  60    { "san",   DEBUG_SANITY },
  61    { "sleep", DEBUG_SLEEP },
  62    { "stats", DEBUG_STATS },
  63    { "tile",  DEBUG_TILE },
  64    { "sing",  DEBUG_SINGLE_THREAD },
  65    { "thre",  DEBUG_SINGLE_THREAD },
  66    { "wm",    DEBUG_WM },
  67    { "urb",   DEBUG_URB },
  68    { "vs",    DEBUG_VS },
  69    { NULL,    0 }
  70 };
  71
  72 int BRW_DEBUG = 0;
  73 #endif
  74
  75
  76 /*
  77  * Probe functions
  78  */
  79
  80
  81 static const char *
  82 brw_get_vendor(struct pipe_screen *screen)
  83 {
  84    return "VMware, Inc.";
  85 }
  86
  87 static const char *
  88 brw_get_name(struct pipe_screen *screen)
  89 {
  90    static char buffer[128];
  91    const char *chipset;
  92
  93    switch (brw_screen(screen)->pci_id) {
  94    case PCI_CHIP_I965_G:
  95       chipset = "I965_G";
  96       break;
  97    case PCI_CHIP_I965_Q:
  98       chipset = "I965_Q";
  99       break;
 100    case PCI_CHIP_I965_G_1:
 101       chipset = "I965_G_1";
 102       break;
 103    case PCI_CHIP_I946_GZ:
 104       chipset = "I946_GZ";
 105       break;
 106    case PCI_CHIP_I965_GM:
 107       chipset = "I965_GM";
 108       break;
 109    case PCI_CHIP_I965_GME:
 110       chipset = "I965_GME";
 111       break;
 112    case PCI_CHIP_GM45_GM:
 113       chipset = "GM45_GM";
 114       break;
 115    case PCI_CHIP_IGD_E_G:
 116       chipset = "IGD_E_G";
 117       break;
 118    case PCI_CHIP_Q45_G:
 119       chipset = "Q45_G";
 120       break;
 121    case PCI_CHIP_G45_G:
 122       chipset = "G45_G";
 123       break;
 124    case PCI_CHIP_G41_G:
 125       chipset = "G41_G";
 126       break;
 127    case PCI_CHIP_B43_G:
 128       chipset = "B43_G";
 129       break;
 130    case PCI_CHIP_ILD_G:
 131       chipset = "ILD_G";
 132       break;
 133    case PCI_CHIP_ILM_G:
 134       chipset = "ILM_G";
 135       break;
 136    }
 137
 138    util_snprintf(buffer, sizeof(buffer), "i965 (chipset: %s)", chipset);
 139    return buffer;
 140 }
 141
 142 static int
 143 brw_get_param(struct pipe_screen *screen, int param)
 144 {
 145    switch (param) {
 146    case PIPE_CAP_MAX_TEXTURE_IMAGE_UNITS:
 147       return 8;
 148    case PIPE_CAP_NPOT_TEXTURES:
 149       return 1;
 150    case PIPE_CAP_TWO_SIDED_STENCIL:
 151       return 1;
 152    case PIPE_CAP_GLSL:
 153       return 0;
 154    case PIPE_CAP_ANISOTROPIC_FILTER:
 155       return 0;
 156    case PIPE_CAP_POINT_SPRITE:
 157       return 0;
 158    case PIPE_CAP_MAX_RENDER_TARGETS:
 159       return 1;
 160    case PIPE_CAP_OCCLUSION_QUERY:
 161       return 0;
 162    case PIPE_CAP_TEXTURE_SHADOW_MAP:
 163       return 1;
 164    case PIPE_CAP_MAX_TEXTURE_2D_LEVELS:
 165       return 11; /* max 1024x1024 */
 166    case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
 167       return 8;  /* max 128x128x128 */
 168    case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
 169       return 11; /* max 1024x1024 */
 170    default:
 171       return 0;
 172    }
 173 }
 174
 175 static float
 176 brw_get_paramf(struct pipe_screen *screen, int param)
 177 {
 178    switch (param) {
 179    case PIPE_CAP_MAX_LINE_WIDTH:
 180       /* fall-through */
 181    case PIPE_CAP_MAX_LINE_WIDTH_AA:
 182       return 7.5;
 183
 184    case PIPE_CAP_MAX_POINT_WIDTH:
 185       /* fall-through */
 186    case PIPE_CAP_MAX_POINT_WIDTH_AA:
 187       return 255.0;
 188
 189    case PIPE_CAP_MAX_TEXTURE_ANISOTROPY:
 190       return 4.0;
 191
 192    case PIPE_CAP_MAX_TEXTURE_LOD_BIAS:
 193       return 16.0;
 194
 195    default:
 196       return 0;
 197    }
 198 }
 199
 200 static boolean
 201 brw_is_format_supported(struct pipe_screen *screen,
 202                          enum pipe_format format,
 203                          enum pipe_texture_target target,
 204                          unsigned tex_usage,
 205                          unsigned geom_flags)
 206 {
 207    static const enum pipe_format tex_supported[] = {
 208       PIPE_FORMAT_R8G8B8A8_UNORM,
 209       PIPE_FORMAT_A8R8G8B8_UNORM,
 210       PIPE_FORMAT_R5G6B5_UNORM,
 211       PIPE_FORMAT_L8_UNORM,
 212       PIPE_FORMAT_A8_UNORM,
 213       PIPE_FORMAT_I8_UNORM,
 214       PIPE_FORMAT_A8L8_UNORM,
 215       PIPE_FORMAT_YCBCR,
 216       PIPE_FORMAT_YCBCR_REV,
 217       PIPE_FORMAT_S8Z24_UNORM,
 218       PIPE_FORMAT_NONE  /* list terminator */
 219    };
 220    static const enum pipe_format surface_supported[] = {
 221       PIPE_FORMAT_A8R8G8B8_UNORM,
 222       PIPE_FORMAT_R5G6B5_UNORM,
 223       PIPE_FORMAT_S8Z24_UNORM,
 224       PIPE_FORMAT_NONE  /* list terminator */
 225    };
 226    const enum pipe_format *list;
 227    uint i;
 228
 229    if(tex_usage & PIPE_TEXTURE_USAGE_RENDER_TARGET)
 230       list = surface_supported;
 231    else
 232       list = tex_supported;
 233
 234    for (i = 0; list[i] != PIPE_FORMAT_NONE; i++) {
 235       if (list[i] == format)
 236          return TRUE;
 237    }
 238
 239    return FALSE;
 240 }
 241
 242
 243 /*
 244  * Fence functions
 245  */
 246
 247
 248 static void
 249 brw_fence_reference(struct pipe_screen *screen,
 250                      struct pipe_fence_handle **ptr,
 251                      struct pipe_fence_handle *fence)
 252 {
 253    struct brw_screen *is = brw_screen(screen);
 254
 255    is->iws->fence_reference(is->iws, ptr, fence);
 256 }
 257
 258 static int
 259 brw_fence_signalled(struct pipe_screen *screen,
 260                      struct pipe_fence_handle *fence,
 261                      unsigned flags)
 262 {
 263    struct brw_screen *is = brw_screen(screen);
 264
 265    return is->iws->fence_signalled(is->iws, fence);
 266 }
 267
 268 static int
 269 brw_fence_finish(struct pipe_screen *screen,
 270                   struct pipe_fence_handle *fence,
 271                   unsigned flags)
 272 {
 273    struct brw_screen *is = brw_screen(screen);
 274
 275    return is->iws->fence_finish(is->iws, fence);
 276 }
 277
 278
 279 /*
 280  * Generic functions
 281  */
 282
 283
 284 static void
 285 brw_destroy_screen(struct pipe_screen *screen)
 286 {
 287    struct brw_screen *is = brw_screen(screen);
 288
 289    if (is->iws)
 290       is->iws->destroy(is->iws);
 291
 292    FREE(is);
 293 }
 294
 295 /**
 296  * Create a new brw_screen object
 297  */
 298 struct pipe_screen *
 299 brw_create_screen(struct intel_winsys *iws, uint pci_id)
 300 {
 301    struct brw_screen *is;
 302    struct brw_chipset chipset;
 303
 304 #ifdef DEBUG
 305    BRW_DEBUG = debug_get_flags_option("BRW_DEBUG", debug_names, 0);
 306    BRW_DEBUG |= debug_get_flags_option("INTEL_DEBUG", debug_names, 0);
 307 #endif
 308
 309    memset(&chipset, 0, sizeof chipset);
 310
 311    chipset.pci_id = pci_id;
 312
 313    switch (pci_id) {
 314    case PCI_CHIP_I965_G:
 315    case PCI_CHIP_I965_Q:
 316    case PCI_CHIP_I965_G_1:
 317    case PCI_CHIP_I946_GZ:
 318    case PCI_CHIP_I965_GM:
 319    case PCI_CHIP_I965_GME:
 320       chipset.is_965 = TRUE;
 321       break;
 322
 323    case PCI_CHIP_GM45_GM:
 324    case PCI_CHIP_IGD_E_G:
 325    case PCI_CHIP_Q45_G:
 326    case PCI_CHIP_G45_G:
 327    case PCI_CHIP_G41_G:
 328    case PCI_CHIP_B43_G:
 329       chipset.is_g4x = TRUE;
 330       break;
 331
 332    case PCI_CHIP_ILD_G:
 333    case PCI_CHIP_ILM_G:
 334       chipset.is_igdng = TRUE;
 335       break;
 336
 337    default:
 338       debug_printf("%s: unknown pci id 0x%x, cannot create screen\n",
 339                    __FUNCTION__, pci_id);
 340       return NULL;
 341    }
 342
 343
 344    is = CALLOC_STRUCT(brw_screen);
 345    if (!is)
 346       return NULL;
 347
 348    is->chipset = chipset;
 349    is->iws = iws;
 350    is->base.winsys = NULL;
 351    is->base.destroy = brw_destroy_screen;
 352    is->base.get_name = brw_get_name;
 353    is->base.get_vendor = brw_get_vendor;
 354    is->base.get_param = brw_get_param;
 355    is->base.get_paramf = brw_get_paramf;
 356    is->base.is_format_supported = brw_is_format_supported;
 357    is->base.fence_reference = brw_fence_reference;
 358    is->base.fence_signalled = brw_fence_signalled;
 359    is->base.fence_finish = brw_fence_finish;
 360
 361    brw_screen_init_texture_functions(is);
 362    brw_screen_init_buffer_functions(is);
 363
 364    return &is->base;
 365 }