src/gallium/drivers/i965/brw_screen_texture.c

   1 /*
   2  Copyright (C) Intel Corp.  2006.  All Rights Reserved.
   3  Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
   4  develop this 3D driver.
   5
   6  Permission is hereby granted, free of charge, to any person obtaining
   7  a copy of this software and associated documentation files (the
   8  "Software"), to deal in the Software without restriction, including
   9  without limitation the rights to use, copy, modify, merge, publish,
  10  distribute, sublicense, and/or sell copies of the Software, and to
  11  permit persons to whom the Software is furnished to do so, subject to
  12  the following conditions:
  13
  14  The above copyright notice and this permission notice (including the
  15  next paragraph) shall be included in all copies or substantial
  16  portions of the Software.
  17
  18  THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  19  EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  20  MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
  21  IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
  22  LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
  23  OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
  24  WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25
  26  **********************************************************************/
  27  /*
  28   * Authors:
  29   *   Keith Whitwell <keith@tungstengraphics.com>
  30   */
  31
  32 #include "util/u_memory.h"
  33 #include "util/u_simple_list.h"
  34
  35 #include "brw_screen.h"
  36 #include "brw_defines.h"
  37 #include "brw_structs.h"
  38 #include "brw_winsys.h"
  39
  40
  41
  42 static GLuint translate_tex_target( unsigned target )
  43 {
  44    switch (target) {
  45    case PIPE_TEXTURE_1D:
  46       return BRW_SURFACE_1D;
  47
  48    case PIPE_TEXTURE_2D:
  49       return BRW_SURFACE_2D;
  50
  51    case PIPE_TEXTURE_3D:
  52       return BRW_SURFACE_3D;
  53
  54    case PIPE_TEXTURE_CUBE:
  55       return BRW_SURFACE_CUBE;
  56
  57    default:
  58       assert(0);
  59       return BRW_SURFACE_1D;
  60    }
  61 }
  62
  63
  64 static GLuint translate_tex_format( enum pipe_format pf )
  65 {
  66    switch( pf ) {
  67    case PIPE_FORMAT_L8_UNORM:
  68       return BRW_SURFACEFORMAT_L8_UNORM;
  69
  70    case PIPE_FORMAT_I8_UNORM:
  71       return BRW_SURFACEFORMAT_I8_UNORM;
  72
  73    case PIPE_FORMAT_A8_UNORM:
  74       return BRW_SURFACEFORMAT_A8_UNORM;
  75
  76    case PIPE_FORMAT_A8L8_UNORM:
  77       return BRW_SURFACEFORMAT_L8A8_UNORM;
  78
  79    case PIPE_FORMAT_A8R8G8B8_UNORM: /* XXX */
  80    case PIPE_FORMAT_B8G8R8A8_UNORM: /* XXX */
  81    case PIPE_FORMAT_R8G8B8A8_UNORM: /* XXX */
  82       return BRW_SURFACEFORMAT_B8G8R8A8_UNORM;
  83
  84    case PIPE_FORMAT_R8G8B8X8_UNORM:
  85       return BRW_SURFACEFORMAT_R8G8B8X8_UNORM;
  86
  87    case PIPE_FORMAT_R5G6B5_UNORM:
  88       return BRW_SURFACEFORMAT_B5G6R5_UNORM;
  89
  90    case PIPE_FORMAT_A1R5G5B5_UNORM:
  91       return BRW_SURFACEFORMAT_B5G5R5A1_UNORM;
  92
  93    case PIPE_FORMAT_A4R4G4B4_UNORM:
  94       return BRW_SURFACEFORMAT_B4G4R4A4_UNORM;
  95
  96
  97    case PIPE_FORMAT_L16_UNORM:
  98       return BRW_SURFACEFORMAT_L16_UNORM;
  99
 100       /* XXX: Z texturing:
 101    case PIPE_FORMAT_I16_UNORM:
 102       return BRW_SURFACEFORMAT_I16_UNORM;
 103        */
 104
 105       /* XXX: Z texturing:
 106    case PIPE_FORMAT_A16_UNORM:
 107       return BRW_SURFACEFORMAT_A16_UNORM;
 108       */
 109
 110    case PIPE_FORMAT_YCBCR_REV:
 111       return BRW_SURFACEFORMAT_YCRCB_NORMAL;
 112
 113    case PIPE_FORMAT_YCBCR:
 114       return BRW_SURFACEFORMAT_YCRCB_SWAPUVY;
 115
 116       /* XXX: Add FXT to gallium?
 117    case PIPE_FORMAT_FXT1_RGBA:
 118       return BRW_SURFACEFORMAT_FXT1;
 119       */
 120
 121    case PIPE_FORMAT_DXT1_RGB:
 122        return BRW_SURFACEFORMAT_DXT1_RGB;
 123
 124    case PIPE_FORMAT_DXT1_RGBA:
 125        return BRW_SURFACEFORMAT_BC1_UNORM;
 126
 127    case PIPE_FORMAT_DXT3_RGBA:
 128        return BRW_SURFACEFORMAT_BC2_UNORM;
 129
 130    case PIPE_FORMAT_DXT5_RGBA:
 131        return BRW_SURFACEFORMAT_BC3_UNORM;
 132
 133    case PIPE_FORMAT_R8G8B8A8_SRGB:
 134       return BRW_SURFACEFORMAT_B8G8R8A8_UNORM_SRGB;
 135
 136    case PIPE_FORMAT_A8L8_SRGB:
 137       return BRW_SURFACEFORMAT_L8A8_UNORM_SRGB;
 138
 139    case PIPE_FORMAT_L8_SRGB:
 140       return BRW_SURFACEFORMAT_L8_UNORM_SRGB;
 141
 142    case PIPE_FORMAT_DXT1_SRGB:
 143       return BRW_SURFACEFORMAT_BC1_UNORM_SRGB;
 144
 145       /* XXX: which pipe depth formats does i965 suppport
 146        */
 147    case PIPE_FORMAT_S8Z24_UNORM:
 148    case PIPE_FORMAT_X8Z24_UNORM:
 149    case PIPE_FORMAT_Z24S8_UNORM:
 150    case PIPE_FORMAT_Z24X8_UNORM:
 151          return BRW_SURFACEFORMAT_I24X8_UNORM;
 152
 153 #if 0
 154       /* XXX: these different surface formats don't seem to
 155        * make any difference for shadow sampler/compares.
 156        */
 157       if (depth_mode == GL_INTENSITY)
 158          return BRW_SURFACEFORMAT_I24X8_UNORM;
 159       else if (depth_mode == GL_ALPHA)
 160          return BRW_SURFACEFORMAT_A24X8_UNORM;
 161       else
 162          return BRW_SURFACEFORMAT_L24X8_UNORM;
 163 #endif
 164
 165       /* XXX: presumably for bump mapping.  Add this to mesa state
 166        * tracker?
 167        */
 168    case PIPE_FORMAT_R8G8_SNORM:
 169       return BRW_SURFACEFORMAT_R8G8_SNORM;
 170
 171    case PIPE_FORMAT_R8G8B8A8_SNORM:
 172       return BRW_SURFACEFORMAT_R8G8B8A8_SNORM;
 173
 174    default:
 175       return BRW_SURFACEFORMAT_INVALID;
 176    }
 177 }
 178
 179
 180
 181
 182
 183 static struct pipe_texture *brw_texture_create( struct pipe_screen *screen,
 184                                                 const struct pipe_texture *templ )
 185
 186 {
 187    struct brw_screen *bscreen = brw_screen(screen);
 188    struct brw_texture *tex;
 189    enum brw_buffer_type buffer_type;
 190    enum pipe_error ret;
 191
 192    tex = CALLOC_STRUCT(brw_texture);
 193    if (tex == NULL)
 194       return NULL;
 195
 196    memcpy(&tex->base, templ, sizeof *templ);
 197    pipe_reference_init(&tex->base.reference, 1);
 198    tex->base.screen = screen;
 199
 200    /* XXX: compressed textures need special treatment here
 201     */
 202    tex->cpp = pf_get_size(tex->base.format);
 203    tex->compressed = pf_is_compressed(tex->base.format);
 204
 205    make_empty_list(&tex->views[0]);
 206    make_empty_list(&tex->views[1]);
 207
 208    /* XXX: No tiling with compressed textures??
 209     */
 210    if (tex->compressed == 0
 211        /* && bscreen->use_texture_tiling */
 212        /* && bscreen->kernel_exec_fencing */)
 213    {
 214       if (1)
 215          tex->tiling = BRW_TILING_NONE;
 216       else if (bscreen->chipset.is_965 &&
 217                pf_is_depth_or_stencil(templ->format))
 218          tex->tiling = BRW_TILING_Y;
 219       else
 220          tex->tiling = BRW_TILING_X;
 221    }
 222    else {
 223       tex->tiling = BRW_TILING_NONE;
 224    }
 225
 226
 227
 228
 229    if (!brw_texture_layout( bscreen, tex ))
 230       goto fail;
 231
 232
 233    if (templ->tex_usage & (PIPE_TEXTURE_USAGE_DISPLAY_TARGET |
 234                            PIPE_TEXTURE_USAGE_PRIMARY)) {
 235       buffer_type = BRW_BUFFER_TYPE_SCANOUT;
 236    }
 237    else {
 238       buffer_type = BRW_BUFFER_TYPE_TEXTURE;
 239    }
 240
 241    ret = bscreen->sws->bo_alloc( bscreen->sws,
 242                                  buffer_type,
 243                                  tex->pitch * tex->total_height * tex->cpp,
 244                                  64,
 245                                  &tex->bo );
 246    if (ret)
 247       goto fail;
 248
 249    tex->ss.ss0.mipmap_layout_mode = BRW_SURFACE_MIPMAPLAYOUT_BELOW;
 250    tex->ss.ss0.surface_type = translate_tex_target(tex->base.target);
 251    tex->ss.ss0.surface_format = translate_tex_format(tex->base.format);
 252    assert(tex->ss.ss0.surface_format != BRW_SURFACEFORMAT_INVALID);
 253
 254    /* This is ok for all textures with channel width 8bit or less:
 255     */
 256 /*    tex->ss.ss0.data_return_format = BRW_SURFACERETURNFORMAT_S1; */
 257
 258
 259    /* XXX: what happens when tex->bo->offset changes???
 260     */
 261    tex->ss.ss1.base_addr = 0; /* reloc */
 262    tex->ss.ss2.mip_count = tex->base.last_level;
 263    tex->ss.ss2.width = tex->base.width[0] - 1;
 264    tex->ss.ss2.height = tex->base.height[0] - 1;
 265
 266    switch (tex->tiling) {
 267    case BRW_TILING_NONE:
 268       tex->ss.ss3.tiled_surface = 0;
 269       tex->ss.ss3.tile_walk = 0;
 270       break;
 271    case BRW_TILING_X:
 272       tex->ss.ss3.tiled_surface = 1;
 273       tex->ss.ss3.tile_walk = BRW_TILEWALK_XMAJOR;
 274       break;
 275    case BRW_TILING_Y:
 276       tex->ss.ss3.tiled_surface = 1;
 277       tex->ss.ss3.tile_walk = BRW_TILEWALK_YMAJOR;
 278       break;
 279    }
 280
 281    tex->ss.ss3.pitch = (tex->pitch * tex->cpp) - 1;
 282    tex->ss.ss3.depth = tex->base.depth[0] - 1;
 283
 284    tex->ss.ss4.min_lod = 0;
 285
 286    if (tex->base.target == PIPE_TEXTURE_CUBE) {
 287       tex->ss.ss0.cube_pos_x = 1;
 288       tex->ss.ss0.cube_pos_y = 1;
 289       tex->ss.ss0.cube_pos_z = 1;
 290       tex->ss.ss0.cube_neg_x = 1;
 291       tex->ss.ss0.cube_neg_y = 1;
 292       tex->ss.ss0.cube_neg_z = 1;
 293    }
 294
 295    return &tex->base;
 296
 297 fail:
 298    bo_reference(&tex->bo, NULL);
 299    FREE(tex);
 300    return NULL;
 301 }
 302
 303 static struct pipe_texture *brw_texture_blanket(struct pipe_screen *screen,
 304                                                 const struct pipe_texture *templ,
 305                                                 const unsigned *stride,
 306                                                 struct pipe_buffer *buffer)
 307 {
 308    return NULL;
 309 }
 310
 311 static void brw_texture_destroy(struct pipe_texture *pt)
 312 {
 313    struct brw_texture *tex = brw_texture(pt);
 314    bo_reference(&tex->bo, NULL);
 315    FREE(pt);
 316 }
 317
 318
 319 static boolean brw_is_format_supported( struct pipe_screen *screen,
 320                                         enum pipe_format format,
 321                                         enum pipe_texture_target target,
 322                                         unsigned tex_usage,
 323                                         unsigned geom_flags )
 324 {
 325    return translate_tex_format(format) != BRW_SURFACEFORMAT_INVALID;
 326 }
 327
 328
 329 boolean brw_is_texture_referenced_by_bo( struct brw_screen *brw_screen,
 330                                       struct pipe_texture *texture,
 331                                       unsigned face,
 332                                       unsigned level,
 333                                       struct brw_winsys_buffer *bo )
 334 {
 335    struct brw_texture *tex = brw_texture(texture);
 336    struct brw_surface *surf;
 337    int i;
 338
 339    /* XXX: this is subject to false positives if the underlying
 340     * texture BO is referenced, we can't tell whether the sub-region
 341     * we care about participates in that.
 342     */
 343    if (brw_screen->sws->bo_references( bo, tex->bo ))
 344       return TRUE;
 345
 346    /* Find any view on this texture for this face/level and see if it
 347     * is referenced:
 348     */
 349    for (i = 0; i < 2; i++) {
 350       foreach (surf, &tex->views[i]) {
 351          if (surf->bo == tex->bo)
 352             continue;
 353
 354          if (surf->id.bits.face != face ||
 355              surf->id.bits.level != level)
 356             continue;
 357
 358          if (brw_screen->sws->bo_references( bo, surf->bo))
 359             return TRUE;
 360       }
 361    }
 362
 363    return FALSE;
 364 }
 365
 366 boolean brw_texture_get_winsys_buffer(struct pipe_texture *texture,
 367                                       struct brw_winsys_buffer **buffer,
 368                                       unsigned *stride)
 369 {
 370    struct brw_texture *tex = brw_texture(texture);
 371
 372    *buffer = tex->bo;
 373    if (stride)
 374       *stride = tex->pitch * tex->cpp;
 375
 376    return TRUE;
 377 }
 378
 379 struct pipe_texture *
 380 brw_texture_blanket_winsys_buffer(struct pipe_screen *screen,
 381                                   const struct pipe_texture *templ,
 382                                   const unsigned pitch,
 383                                   struct brw_winsys_buffer *buffer)
 384 {
 385    struct brw_screen *bscreen = brw_screen(screen);
 386    struct brw_texture *tex;
 387
 388    if (templ->target != PIPE_TEXTURE_2D ||
 389        templ->last_level != 0 ||
 390        templ->depth[0] != 1)
 391       return NULL;
 392
 393    if (pf_is_compressed(templ->format))
 394       return NULL;
 395
 396    tex = CALLOC_STRUCT(brw_texture);
 397    if (!tex)
 398       return NULL;
 399
 400    memcpy(&tex->base, templ, sizeof *templ);
 401    pipe_reference_init(&tex->base.reference, 1);
 402    tex->base.screen = screen;
 403
 404    tex->cpp = pf_get_size(tex->base.format);
 405
 406    make_empty_list(&tex->views[0]);
 407    make_empty_list(&tex->views[1]);
 408
 409    if (1)
 410       tex->tiling = BRW_TILING_NONE;
 411    else if (bscreen->chipset.is_965 &&
 412             pf_is_depth_or_stencil(templ->format))
 413       tex->tiling = BRW_TILING_Y;
 414    else
 415       tex->tiling = BRW_TILING_X;
 416
 417    if (!brw_texture_layout(bscreen, tex))
 418       goto fail;
 419
 420    /* XXX Maybe some more checks? */
 421    if ((pitch / tex->cpp) < tex->pitch)
 422       goto fail;
 423
 424    tex->pitch = pitch / tex->cpp;
 425
 426    tex->bo = buffer;
 427
 428    /* fix this warning */
 429 #if 0
 430    if (tex->size > buffer->size)
 431       goto fail;
 432 #endif
 433
 434    tex->ss.ss0.mipmap_layout_mode = BRW_SURFACE_MIPMAPLAYOUT_BELOW;
 435    tex->ss.ss0.surface_type = translate_tex_target(tex->base.target);
 436    tex->ss.ss0.surface_format = translate_tex_format(tex->base.format);
 437    assert(tex->ss.ss0.surface_format != BRW_SURFACEFORMAT_INVALID);
 438
 439    /* This is ok for all textures with channel width 8bit or less:
 440     */
 441 /*    tex->ss.ss0.data_return_format = BRW_SURFACERETURNFORMAT_S1; */
 442
 443
 444    /* XXX: what happens when tex->bo->offset changes???
 445     */
 446    tex->ss.ss1.base_addr = 0; /* reloc */
 447    tex->ss.ss2.mip_count = tex->base.last_level;
 448    tex->ss.ss2.width = tex->base.width[0] - 1;
 449    tex->ss.ss2.height = tex->base.height[0] - 1;
 450
 451    switch (tex->tiling) {
 452    case BRW_TILING_NONE:
 453       tex->ss.ss3.tiled_surface = 0;
 454       tex->ss.ss3.tile_walk = 0;
 455       break;
 456    case BRW_TILING_X:
 457       tex->ss.ss3.tiled_surface = 1;
 458       tex->ss.ss3.tile_walk = BRW_TILEWALK_XMAJOR;
 459       break;
 460    case BRW_TILING_Y:
 461       tex->ss.ss3.tiled_surface = 1;
 462       tex->ss.ss3.tile_walk = BRW_TILEWALK_YMAJOR;
 463       break;
 464    }
 465
 466    tex->ss.ss3.pitch = (tex->pitch * tex->cpp) - 1;
 467    tex->ss.ss3.depth = tex->base.depth[0] - 1;
 468
 469    tex->ss.ss4.min_lod = 0;
 470
 471    return &tex->base;
 472
 473 fail:
 474    FREE(tex);
 475    return NULL;
 476 }
 477
 478 void brw_screen_tex_init( struct brw_screen *brw_screen )
 479 {
 480    brw_screen->base.is_format_supported = brw_is_format_supported;
 481    brw_screen->base.texture_create = brw_texture_create;
 482    brw_screen->base.texture_destroy = brw_texture_destroy;
 483    brw_screen->base.texture_blanket = brw_texture_blanket;
 484 }