2 Copyright (C) Intel Corp. 2006. All Rights Reserved.
3 Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
4 develop this 3D driver.
6 Permission is hereby granted, free of charge, to any person obtaining
7 a copy of this software and associated documentation files (the
8 "Software"), to deal in the Software without restriction, including
9 without limitation the rights to use, copy, modify, merge, publish,
10 distribute, sublicense, and/or sell copies of the Software, and to
11 permit persons to whom the Software is furnished to do so, subject to
12 the following conditions:
14 The above copyright notice and this permission notice (including the
15 next paragraph) shall be included in all copies or substantial
16 portions of the Software.
18 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
19 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
21 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
22 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
23 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
24 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
26 **********************************************************************/
29 * Keith Whitwell <keith@tungstengraphics.com>
32 #include "util/u_memory.h"
33 #include "util/u_simple_list.h"
34 #include "util/u_format.h"
36 #include "brw_screen.h"
37 #include "brw_defines.h"
38 #include "brw_structs.h"
39 #include "brw_winsys.h"
43 static GLuint
translate_tex_target( unsigned target
)
47 return BRW_SURFACE_1D
;
50 return BRW_SURFACE_2D
;
53 return BRW_SURFACE_3D
;
55 case PIPE_TEXTURE_CUBE
:
56 return BRW_SURFACE_CUBE
;
60 return BRW_SURFACE_1D
;
65 static GLuint
translate_tex_format( enum pipe_format pf
)
68 case PIPE_FORMAT_L8_UNORM
:
69 return BRW_SURFACEFORMAT_L8_UNORM
;
71 case PIPE_FORMAT_I8_UNORM
:
72 return BRW_SURFACEFORMAT_I8_UNORM
;
74 case PIPE_FORMAT_A8_UNORM
:
75 return BRW_SURFACEFORMAT_A8_UNORM
;
77 case PIPE_FORMAT_L16_UNORM
:
78 return BRW_SURFACEFORMAT_L16_UNORM
;
80 /* XXX: Add these to gallium
81 case PIPE_FORMAT_I16_UNORM:
82 return BRW_SURFACEFORMAT_I16_UNORM;
84 case PIPE_FORMAT_A16_UNORM:
85 return BRW_SURFACEFORMAT_A16_UNORM;
88 case PIPE_FORMAT_A8L8_UNORM
:
89 return BRW_SURFACEFORMAT_L8A8_UNORM
;
91 case PIPE_FORMAT_R5G6B5_UNORM
:
92 return BRW_SURFACEFORMAT_B5G6R5_UNORM
;
94 case PIPE_FORMAT_A1R5G5B5_UNORM
:
95 return BRW_SURFACEFORMAT_B5G5R5A1_UNORM
;
97 case PIPE_FORMAT_A4R4G4B4_UNORM
:
98 return BRW_SURFACEFORMAT_B4G4R4A4_UNORM
;
100 case PIPE_FORMAT_X8R8G8B8_UNORM
:
101 return BRW_SURFACEFORMAT_R8G8B8X8_UNORM
;
103 case PIPE_FORMAT_A8R8G8B8_UNORM
:
104 return BRW_SURFACEFORMAT_B8G8R8A8_UNORM
;
110 case PIPE_FORMAT_YCBCR_REV
:
111 return BRW_SURFACEFORMAT_YCRCB_NORMAL
;
113 case PIPE_FORMAT_YCBCR
:
114 return BRW_SURFACEFORMAT_YCRCB_SWAPUVY
;
117 * Compressed formats.
119 /* XXX: Add FXT to gallium?
120 case PIPE_FORMAT_FXT1_RGBA:
121 return BRW_SURFACEFORMAT_FXT1;
124 case PIPE_FORMAT_DXT1_RGB
:
125 return BRW_SURFACEFORMAT_DXT1_RGB
;
127 case PIPE_FORMAT_DXT1_RGBA
:
128 return BRW_SURFACEFORMAT_BC1_UNORM
;
130 case PIPE_FORMAT_DXT3_RGBA
:
131 return BRW_SURFACEFORMAT_BC2_UNORM
;
133 case PIPE_FORMAT_DXT5_RGBA
:
134 return BRW_SURFACEFORMAT_BC3_UNORM
;
140 case PIPE_FORMAT_R8G8B8A8_SRGB
:
141 return BRW_SURFACEFORMAT_B8G8R8A8_UNORM_SRGB
;
143 case PIPE_FORMAT_A8L8_SRGB
:
144 return BRW_SURFACEFORMAT_L8A8_UNORM_SRGB
;
146 case PIPE_FORMAT_L8_SRGB
:
147 return BRW_SURFACEFORMAT_L8_UNORM_SRGB
;
149 case PIPE_FORMAT_DXT1_SRGB
:
150 return BRW_SURFACEFORMAT_BC1_UNORM_SRGB
;
156 case PIPE_FORMAT_Z16_UNORM
:
157 return BRW_SURFACEFORMAT_I16_UNORM
;
159 case PIPE_FORMAT_S8Z24_UNORM
:
160 case PIPE_FORMAT_X8Z24_UNORM
:
161 return BRW_SURFACEFORMAT_I24X8_UNORM
;
163 case PIPE_FORMAT_Z32_FLOAT
:
164 return BRW_SURFACEFORMAT_I32_FLOAT
;
166 /* XXX: presumably for bump mapping. Add this to mesa state
169 * XXX: Add flipped versions of these formats to Gallium.
171 case PIPE_FORMAT_R8G8_SNORM
:
172 return BRW_SURFACEFORMAT_R8G8_SNORM
;
174 case PIPE_FORMAT_R8G8B8A8_SNORM
:
175 return BRW_SURFACEFORMAT_R8G8B8A8_SNORM
;
178 return BRW_SURFACEFORMAT_INVALID
;
186 static struct pipe_texture
*brw_texture_create( struct pipe_screen
*screen
,
187 const struct pipe_texture
*templ
)
190 struct brw_screen
*bscreen
= brw_screen(screen
);
191 struct brw_texture
*tex
;
192 enum brw_buffer_type buffer_type
;
195 tex
= CALLOC_STRUCT(brw_texture
);
199 memcpy(&tex
->base
, templ
, sizeof *templ
);
200 pipe_reference_init(&tex
->base
.reference
, 1);
201 tex
->base
.screen
= screen
;
203 /* XXX: compressed textures need special treatment here
205 tex
->cpp
= util_format_get_blocksize(tex
->base
.format
);
206 tex
->compressed
= util_format_is_compressed(tex
->base
.format
);
208 make_empty_list(&tex
->views
[0]);
209 make_empty_list(&tex
->views
[1]);
211 /* XXX: No tiling with compressed textures??
213 if (tex
->compressed
== 0 &&
216 if (bscreen
->chipset
.is_965
&&
217 util_format_is_depth_or_stencil(templ
->format
))
218 tex
->tiling
= BRW_TILING_Y
;
220 tex
->tiling
= BRW_TILING_X
;
223 tex
->tiling
= BRW_TILING_NONE
;
229 if (!brw_texture_layout( bscreen
, tex
))
233 if (templ
->tex_usage
& (PIPE_TEXTURE_USAGE_DISPLAY_TARGET
|
234 PIPE_TEXTURE_USAGE_PRIMARY
)) {
235 buffer_type
= BRW_BUFFER_TYPE_SCANOUT
;
238 buffer_type
= BRW_BUFFER_TYPE_TEXTURE
;
241 ret
= bscreen
->sws
->bo_alloc( bscreen
->sws
,
243 tex
->pitch
* tex
->total_height
* tex
->cpp
,
249 tex
->ss
.ss0
.mipmap_layout_mode
= BRW_SURFACE_MIPMAPLAYOUT_BELOW
;
250 tex
->ss
.ss0
.surface_type
= translate_tex_target(tex
->base
.target
);
251 tex
->ss
.ss0
.surface_format
= translate_tex_format(tex
->base
.format
);
252 assert(tex
->ss
.ss0
.surface_format
!= BRW_SURFACEFORMAT_INVALID
);
254 /* This is ok for all textures with channel width 8bit or less:
256 /* tex->ss.ss0.data_return_format = BRW_SURFACERETURNFORMAT_S1; */
259 /* XXX: what happens when tex->bo->offset changes???
261 tex
->ss
.ss1
.base_addr
= 0; /* reloc */
262 tex
->ss
.ss2
.mip_count
= tex
->base
.last_level
;
263 tex
->ss
.ss2
.width
= tex
->base
.width0
- 1;
264 tex
->ss
.ss2
.height
= tex
->base
.height0
- 1;
266 switch (tex
->tiling
) {
267 case BRW_TILING_NONE
:
268 tex
->ss
.ss3
.tiled_surface
= 0;
269 tex
->ss
.ss3
.tile_walk
= 0;
272 tex
->ss
.ss3
.tiled_surface
= 1;
273 tex
->ss
.ss3
.tile_walk
= BRW_TILEWALK_XMAJOR
;
276 tex
->ss
.ss3
.tiled_surface
= 1;
277 tex
->ss
.ss3
.tile_walk
= BRW_TILEWALK_YMAJOR
;
281 tex
->ss
.ss3
.pitch
= (tex
->pitch
* tex
->cpp
) - 1;
282 tex
->ss
.ss3
.depth
= tex
->base
.depth0
- 1;
284 tex
->ss
.ss4
.min_lod
= 0;
286 if (tex
->base
.target
== PIPE_TEXTURE_CUBE
) {
287 tex
->ss
.ss0
.cube_pos_x
= 1;
288 tex
->ss
.ss0
.cube_pos_y
= 1;
289 tex
->ss
.ss0
.cube_pos_z
= 1;
290 tex
->ss
.ss0
.cube_neg_x
= 1;
291 tex
->ss
.ss0
.cube_neg_y
= 1;
292 tex
->ss
.ss0
.cube_neg_z
= 1;
298 bo_reference(&tex
->bo
, NULL
);
303 static struct pipe_texture
*brw_texture_blanket(struct pipe_screen
*screen
,
304 const struct pipe_texture
*templ
,
305 const unsigned *stride
,
306 struct pipe_buffer
*buffer
)
311 static void brw_texture_destroy(struct pipe_texture
*pt
)
313 struct brw_texture
*tex
= brw_texture(pt
);
314 bo_reference(&tex
->bo
, NULL
);
319 static boolean
brw_is_format_supported( struct pipe_screen
*screen
,
320 enum pipe_format format
,
321 enum pipe_texture_target target
,
323 unsigned geom_flags
)
325 return translate_tex_format(format
) != BRW_SURFACEFORMAT_INVALID
;
329 boolean
brw_is_texture_referenced_by_bo( struct brw_screen
*brw_screen
,
330 struct pipe_texture
*texture
,
333 struct brw_winsys_buffer
*bo
)
335 struct brw_texture
*tex
= brw_texture(texture
);
336 struct brw_surface
*surf
;
339 /* XXX: this is subject to false positives if the underlying
340 * texture BO is referenced, we can't tell whether the sub-region
341 * we care about participates in that.
343 if (brw_screen
->sws
->bo_references( bo
, tex
->bo
))
346 /* Find any view on this texture for this face/level and see if it
349 for (i
= 0; i
< 2; i
++) {
350 foreach (surf
, &tex
->views
[i
]) {
351 if (surf
->bo
== tex
->bo
)
354 if (surf
->id
.bits
.face
!= face
||
355 surf
->id
.bits
.level
!= level
)
358 if (brw_screen
->sws
->bo_references( bo
, surf
->bo
))
371 static struct pipe_transfer
*
372 brw_get_tex_transfer(struct pipe_screen
*screen
,
373 struct pipe_texture
*texture
,
374 unsigned face
, unsigned level
, unsigned zslice
,
375 enum pipe_transfer_usage usage
, unsigned x
, unsigned y
,
376 unsigned w
, unsigned h
)
378 struct brw_texture
*tex
= brw_texture(texture
);
379 struct brw_transfer
*trans
;
380 unsigned offset
; /* in bytes */
382 if (texture
->target
== PIPE_TEXTURE_CUBE
) {
383 offset
= tex
->image_offset
[level
][face
];
384 } else if (texture
->target
== PIPE_TEXTURE_3D
) {
385 offset
= tex
->image_offset
[level
][zslice
];
387 offset
= tex
->image_offset
[level
][0];
392 trans
= CALLOC_STRUCT(brw_transfer
);
394 pipe_texture_reference(&trans
->base
.texture
, texture
);
397 trans
->base
.width
= w
;
398 trans
->base
.height
= h
;
399 trans
->base
.stride
= tex
->pitch
* tex
->cpp
;
400 trans
->offset
= offset
;
401 trans
->base
.usage
= usage
;
407 brw_transfer_map(struct pipe_screen
*screen
,
408 struct pipe_transfer
*transfer
)
410 struct brw_texture
*tex
= brw_texture(transfer
->texture
);
411 struct brw_winsys_screen
*sws
= brw_screen(screen
)->sws
;
413 unsigned usage
= transfer
->usage
;
415 map
= sws
->bo_map(tex
->bo
,
419 (usage
& PIPE_TRANSFER_WRITE
) ? TRUE
: FALSE
,
420 (usage
& 0) ? TRUE
: FALSE
,
421 (usage
& 0) ? TRUE
: FALSE
);
426 /* XXX: blocksize and compressed textures
428 return map
+ brw_transfer(transfer
)->offset
+
429 transfer
->y
/* / transfer->block.height */ * transfer
->stride
+
430 transfer
->x
/* / transfer->block.width */ * brw_texture(transfer
->texture
)->cpp
;
434 brw_transfer_unmap(struct pipe_screen
*screen
,
435 struct pipe_transfer
*transfer
)
437 struct brw_texture
*tex
= brw_texture(transfer
->texture
);
438 struct brw_winsys_screen
*sws
= brw_screen(screen
)->sws
;
440 sws
->bo_unmap(tex
->bo
);
444 brw_tex_transfer_destroy(struct pipe_transfer
*trans
)
446 pipe_texture_reference(&trans
->texture
, NULL
);
452 * Functions exported to the winsys
455 boolean
brw_texture_get_winsys_buffer(struct pipe_texture
*texture
,
456 struct brw_winsys_buffer
**buffer
,
459 struct brw_texture
*tex
= brw_texture(texture
);
463 *stride
= tex
->pitch
* tex
->cpp
;
468 struct pipe_texture
*
469 brw_texture_blanket_winsys_buffer(struct pipe_screen
*screen
,
470 const struct pipe_texture
*templ
,
473 struct brw_winsys_buffer
*buffer
)
475 struct brw_screen
*bscreen
= brw_screen(screen
);
476 struct brw_texture
*tex
;
478 if (templ
->target
!= PIPE_TEXTURE_2D
||
479 templ
->last_level
!= 0 ||
483 if (util_format_is_compressed(templ
->format
))
486 tex
= CALLOC_STRUCT(brw_texture
);
490 memcpy(&tex
->base
, templ
, sizeof *templ
);
491 pipe_reference_init(&tex
->base
.reference
, 1);
492 tex
->base
.screen
= screen
;
494 /* XXX: cpp vs. blocksize
496 tex
->cpp
= util_format_get_blocksize(tex
->base
.format
);
497 tex
->tiling
= tiling
;
499 make_empty_list(&tex
->views
[0]);
500 make_empty_list(&tex
->views
[1]);
502 if (!brw_texture_layout(bscreen
, tex
))
505 /* XXX Maybe some more checks? */
506 if ((pitch
/ tex
->cpp
) < tex
->pitch
)
509 tex
->pitch
= pitch
/ tex
->cpp
;
513 /* fix this warning */
515 if (tex
->size
> buffer
->size
)
519 tex
->ss
.ss0
.mipmap_layout_mode
= BRW_SURFACE_MIPMAPLAYOUT_BELOW
;
520 tex
->ss
.ss0
.surface_type
= translate_tex_target(tex
->base
.target
);
521 tex
->ss
.ss0
.surface_format
= translate_tex_format(tex
->base
.format
);
522 assert(tex
->ss
.ss0
.surface_format
!= BRW_SURFACEFORMAT_INVALID
);
524 /* This is ok for all textures with channel width 8bit or less:
526 /* tex->ss.ss0.data_return_format = BRW_SURFACERETURNFORMAT_S1; */
529 /* XXX: what happens when tex->bo->offset changes???
531 tex
->ss
.ss1
.base_addr
= 0; /* reloc */
532 tex
->ss
.ss2
.mip_count
= tex
->base
.last_level
;
533 tex
->ss
.ss2
.width
= tex
->base
.width0
- 1;
534 tex
->ss
.ss2
.height
= tex
->base
.height0
- 1;
536 switch (tex
->tiling
) {
537 case BRW_TILING_NONE
:
538 tex
->ss
.ss3
.tiled_surface
= 0;
539 tex
->ss
.ss3
.tile_walk
= 0;
542 tex
->ss
.ss3
.tiled_surface
= 1;
543 tex
->ss
.ss3
.tile_walk
= BRW_TILEWALK_XMAJOR
;
546 tex
->ss
.ss3
.tiled_surface
= 1;
547 tex
->ss
.ss3
.tile_walk
= BRW_TILEWALK_YMAJOR
;
551 tex
->ss
.ss3
.pitch
= (tex
->pitch
* tex
->cpp
) - 1;
552 tex
->ss
.ss3
.depth
= tex
->base
.depth0
- 1;
554 tex
->ss
.ss4
.min_lod
= 0;
563 void brw_screen_tex_init( struct brw_screen
*brw_screen
)
565 brw_screen
->base
.is_format_supported
= brw_is_format_supported
;
566 brw_screen
->base
.texture_create
= brw_texture_create
;
567 brw_screen
->base
.texture_destroy
= brw_texture_destroy
;
568 brw_screen
->base
.texture_blanket
= brw_texture_blanket
;
569 brw_screen
->base
.get_tex_transfer
= brw_get_tex_transfer
;
570 brw_screen
->base
.transfer_map
= brw_transfer_map
;
571 brw_screen
->base
.transfer_unmap
= brw_transfer_unmap
;
572 brw_screen
->base
.tex_transfer_destroy
= brw_tex_transfer_destroy
;