5e1229d22f53430af6d31d195880c319b9fec0b8
[mesa.git] / src / gallium / drivers / i965 / brw_sf_state.c
1 /*
2 Copyright (C) Intel Corp. 2006. All Rights Reserved.
3 Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
4 develop this 3D driver.
5
6 Permission is hereby granted, free of charge, to any person obtaining
7 a copy of this software and associated documentation files (the
8 "Software"), to deal in the Software without restriction, including
9 without limitation the rights to use, copy, modify, merge, publish,
10 distribute, sublicense, and/or sell copies of the Software, and to
11 permit persons to whom the Software is furnished to do so, subject to
12 the following conditions:
13
14 The above copyright notice and this permission notice (including the
15 next paragraph) shall be included in all copies or substantial
16 portions of the Software.
17
18 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
19 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
21 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
22 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
23 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
24 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25
26 **********************************************************************/
27 /*
28 * Authors:
29 * Keith Whitwell <keith@tungstengraphics.com>
30 */
31
32
33
34 #include "brw_context.h"
35 #include "brw_state.h"
36 #include "brw_defines.h"
37
38 static void upload_sf_vp(struct brw_context *brw)
39 {
40 const GLfloat depth_scale = 1.0F / ctx->DrawBuffer->_DepthMaxF;
41 struct brw_sf_viewport sfv;
42 GLfloat y_scale, y_bias;
43 const GLboolean render_to_fbo = (ctx->DrawBuffer->Name != 0);
44 const GLfloat *v = ctx->Viewport._WindowMap.m;
45
46 memset(&sfv, 0, sizeof(sfv));
47
48 if (render_to_fbo) {
49 y_scale = 1.0;
50 y_bias = 0;
51 }
52 else {
53 y_scale = -1.0;
54 y_bias = ctx->DrawBuffer->Height;
55 }
56
57 /* _NEW_VIEWPORT */
58
59 sfv.viewport.m00 = v[MAT_SX];
60 sfv.viewport.m11 = v[MAT_SY] * y_scale;
61 sfv.viewport.m22 = v[MAT_SZ] * depth_scale;
62 sfv.viewport.m30 = v[MAT_TX];
63 sfv.viewport.m31 = v[MAT_TY] * y_scale + y_bias;
64 sfv.viewport.m32 = v[MAT_TZ] * depth_scale;
65
66 /* _NEW_SCISSOR | _NEW_BUFFERS | _NEW_VIEWPORT
67 * for DrawBuffer->_[XY]{min,max}
68 */
69
70 /* The scissor only needs to handle the intersection of drawable and
71 * scissor rect. Clipping to the boundaries of static shared buffers
72 * for front/back/depth is covered by looping over cliprects in brw_draw.c.
73 *
74 * Note that the hardware's coordinates are inclusive, while Mesa's min is
75 * inclusive but max is exclusive.
76 */
77 if (render_to_fbo) {
78 /* texmemory: Y=0=bottom */
79 sfv.scissor.xmin = ctx->DrawBuffer->_Xmin;
80 sfv.scissor.xmax = ctx->DrawBuffer->_Xmax - 1;
81 sfv.scissor.ymin = ctx->DrawBuffer->_Ymin;
82 sfv.scissor.ymax = ctx->DrawBuffer->_Ymax - 1;
83 }
84 else {
85 /* memory: Y=0=top */
86 sfv.scissor.xmin = ctx->DrawBuffer->_Xmin;
87 sfv.scissor.xmax = ctx->DrawBuffer->_Xmax - 1;
88 sfv.scissor.ymin = ctx->DrawBuffer->Height - ctx->DrawBuffer->_Ymax;
89 sfv.scissor.ymax = ctx->DrawBuffer->Height - ctx->DrawBuffer->_Ymin - 1;
90 }
91
92 brw->sws->bo_unreference(brw->sf.vp_bo);
93 brw->sf.vp_bo = brw_cache_data( &brw->cache, BRW_SF_VP, &sfv, NULL, 0 );
94 }
95
96 const struct brw_tracked_state brw_sf_vp = {
97 .dirty = {
98 .mesa = (_NEW_VIEWPORT |
99 _NEW_SCISSOR |
100 _NEW_BUFFERS),
101 .brw = 0,
102 .cache = 0
103 },
104 .prepare = upload_sf_vp
105 };
106
107 struct brw_sf_unit_key {
108 unsigned int total_grf;
109 unsigned int urb_entry_read_length;
110
111 unsigned int nr_urb_entries, urb_size, sfsize;
112
113 GLenum front_face, cull_face, provoking_vertex;
114 unsigned scissor:1;
115 unsigned line_smooth:1;
116 unsigned point_sprite:1;
117 unsigned point_attenuated:1;
118 unsigned render_to_fbo:1;
119 float line_width;
120 float point_size;
121 };
122
123 static void
124 sf_unit_populate_key(struct brw_context *brw, struct brw_sf_unit_key *key)
125 {
126 memset(key, 0, sizeof(*key));
127
128 /* CACHE_NEW_SF_PROG */
129 key->total_grf = brw->sf.prog_data->total_grf;
130 key->urb_entry_read_length = brw->sf.prog_data->urb_read_length;
131
132 /* BRW_NEW_URB_FENCE */
133 key->nr_urb_entries = brw->urb.nr_sf_entries;
134 key->urb_size = brw->urb.vsize;
135 key->sfsize = brw->urb.sfsize;
136
137 key->scissor = ctx->Scissor.Enabled;
138 key->front_face = ctx->Polygon.FrontFace;
139
140 if (ctx->Polygon.CullFlag)
141 key->cull_face = ctx->Polygon.CullFaceMode;
142 else
143 key->cull_face = GL_NONE;
144
145 key->line_width = ctx->Line.Width;
146 key->line_smooth = ctx->Line.SmoothFlag;
147
148 key->point_sprite = ctx->Point.PointSprite;
149 key->point_size = CLAMP(ctx->Point.Size, ctx->Point.MinSize, ctx->Point.MaxSize);
150 key->point_attenuated = ctx->Point._Attenuated;
151
152 /* _NEW_LIGHT */
153 key->provoking_vertex = ctx->Light.ProvokingVertex;
154
155 key->render_to_fbo = brw->intel.ctx.DrawBuffer->Name != 0;
156 }
157
158 static struct brw_winsys_buffer *
159 sf_unit_create_from_key(struct brw_context *brw, struct brw_sf_unit_key *key,
160 struct brw_winsys_buffer **reloc_bufs)
161 {
162 struct brw_sf_unit_state sf;
163 struct brw_winsys_buffer *bo;
164 int chipset_max_threads;
165 memset(&sf, 0, sizeof(sf));
166
167 sf.thread0.grf_reg_count = ALIGN(key->total_grf, 16) / 16 - 1;
168 sf.thread0.kernel_start_pointer = brw->sf.prog_bo->offset >> 6; /* reloc */
169
170 sf.thread1.floating_point_mode = BRW_FLOATING_POINT_NON_IEEE_754;
171
172 sf.thread3.dispatch_grf_start_reg = 3;
173
174 if (BRW_IS_IGDNG(brw))
175 sf.thread3.urb_entry_read_offset = 3;
176 else
177 sf.thread3.urb_entry_read_offset = 1;
178
179 sf.thread3.urb_entry_read_length = key->urb_entry_read_length;
180
181 sf.thread4.nr_urb_entries = key->nr_urb_entries;
182 sf.thread4.urb_entry_allocation_size = key->sfsize - 1;
183
184 /* Each SF thread produces 1 PUE, and there can be up to 24(Pre-IGDNG) or
185 * 48(IGDNG) threads
186 */
187 if (BRW_IS_IGDNG(brw))
188 chipset_max_threads = 48;
189 else
190 chipset_max_threads = 24;
191
192 sf.thread4.max_threads = MIN2(chipset_max_threads, key->nr_urb_entries) - 1;
193
194 if (INTEL_DEBUG & DEBUG_SINGLE_THREAD)
195 sf.thread4.max_threads = 0;
196
197 if (INTEL_DEBUG & DEBUG_STATS)
198 sf.thread4.stats_enable = 1;
199
200 /* CACHE_NEW_SF_VP */
201 sf.sf5.sf_viewport_state_offset = brw->sf.vp_bo->offset >> 5; /* reloc */
202
203 sf.sf5.viewport_transform = 1;
204
205 /* _NEW_SCISSOR */
206 if (key->scissor)
207 sf.sf6.scissor = 1;
208
209 /* _NEW_POLYGON */
210 if (key->front_face == GL_CCW)
211 sf.sf5.front_winding = BRW_FRONTWINDING_CCW;
212 else
213 sf.sf5.front_winding = BRW_FRONTWINDING_CW;
214
215 /* The viewport is inverted for rendering to a FBO, and that inverts
216 * polygon front/back orientation.
217 */
218 sf.sf5.front_winding ^= key->render_to_fbo;
219
220 switch (key->cull_face) {
221 case GL_FRONT:
222 sf.sf6.cull_mode = BRW_CULLMODE_FRONT;
223 break;
224 case GL_BACK:
225 sf.sf6.cull_mode = BRW_CULLMODE_BACK;
226 break;
227 case GL_FRONT_AND_BACK:
228 sf.sf6.cull_mode = BRW_CULLMODE_BOTH;
229 break;
230 case GL_NONE:
231 sf.sf6.cull_mode = BRW_CULLMODE_NONE;
232 break;
233 default:
234 assert(0);
235 break;
236 }
237
238 /* _NEW_LINE */
239 /* XXX use ctx->Const.Min/MaxLineWidth here */
240 sf.sf6.line_width = CLAMP(key->line_width, 1.0, 5.0) * (1<<1);
241
242 sf.sf6.line_endcap_aa_region_width = 1;
243 if (key->line_smooth)
244 sf.sf6.aa_enable = 1;
245 else if (sf.sf6.line_width <= 0x2)
246 sf.sf6.line_width = 0;
247
248 /* _NEW_BUFFERS */
249 key->render_to_fbo = brw->intel.ctx.DrawBuffer->Name != 0;
250 if (!key->render_to_fbo) {
251 /* Rendering to an OpenGL window */
252 sf.sf6.point_rast_rule = BRW_RASTRULE_UPPER_RIGHT;
253 }
254 else {
255 /* If rendering to an FBO, the pixel coordinate system is
256 * inverted with respect to the normal OpenGL coordinate
257 * system, so BRW_RASTRULE_LOWER_RIGHT is correct.
258 * But this value is listed as "Reserved, but not seen as useful"
259 * in Intel documentation (page 212, "Point Rasterization Rule",
260 * section 7.4 "SF Pipeline State Summary", of document
261 * "IntelĀ® 965 Express Chipset Family and IntelĀ® G35 Express
262 * Chipset Graphics Controller Programmer's Reference Manual,
263 * Volume 2: 3D/Media", Revision 1.0b as of January 2008,
264 * available at
265 * http://intellinuxgraphics.org/documentation.html
266 * at the time of this writing).
267 *
268 * It does work on at least some devices, if not all;
269 * if devices that don't support it can be identified,
270 * the likely failure case is that points are rasterized
271 * incorrectly, which is no worse than occurs without
272 * the value, so we're using it here.
273 */
274 sf.sf6.point_rast_rule = BRW_RASTRULE_LOWER_RIGHT;
275 }
276 /* XXX clamp max depends on AA vs. non-AA */
277
278 /* _NEW_POINT */
279 sf.sf7.sprite_point = key->point_sprite;
280 sf.sf7.point_size = CLAMP(rint(key->point_size), 1, 255) * (1<<3);
281 sf.sf7.use_point_size_state = !key->point_attenuated;
282 sf.sf7.aa_line_distance_mode = 0;
283
284 /* might be BRW_NEW_PRIMITIVE if we have to adjust pv for polygons:
285 */
286 if (key->provoking_vertex == GL_LAST_VERTEX_CONVENTION) {
287 sf.sf7.trifan_pv = 2;
288 sf.sf7.linestrip_pv = 1;
289 sf.sf7.tristrip_pv = 2;
290 } else {
291 sf.sf7.trifan_pv = 1;
292 sf.sf7.linestrip_pv = 0;
293 sf.sf7.tristrip_pv = 0;
294 }
295 sf.sf7.line_last_pixel_enable = 0;
296
297 /* Set bias for OpenGL rasterization rules:
298 */
299 sf.sf6.dest_org_vbias = 0x8;
300 sf.sf6.dest_org_hbias = 0x8;
301
302 bo = brw_upload_cache(&brw->cache, BRW_SF_UNIT,
303 key, sizeof(*key),
304 reloc_bufs, 2,
305 &sf, sizeof(sf),
306 NULL, NULL);
307
308 /* STATE_PREFETCH command description describes this state as being
309 * something loaded through the GPE (L2 ISC), so it's INSTRUCTION domain.
310 */
311 /* Emit SF program relocation */
312 dri_bo_emit_reloc(bo,
313 I915_GEM_DOMAIN_INSTRUCTION, 0,
314 sf.thread0.grf_reg_count << 1,
315 offsetof(struct brw_sf_unit_state, thread0),
316 brw->sf.prog_bo);
317
318 /* Emit SF viewport relocation */
319 dri_bo_emit_reloc(bo,
320 I915_GEM_DOMAIN_INSTRUCTION, 0,
321 sf.sf5.front_winding | (sf.sf5.viewport_transform << 1),
322 offsetof(struct brw_sf_unit_state, sf5),
323 brw->sf.vp_bo);
324
325 return bo;
326 }
327
328 static void upload_sf_unit( struct brw_context *brw )
329 {
330 struct brw_sf_unit_key key;
331 struct brw_winsys_buffer *reloc_bufs[2];
332
333 sf_unit_populate_key(brw, &key);
334
335 reloc_bufs[0] = brw->sf.prog_bo;
336 reloc_bufs[1] = brw->sf.vp_bo;
337
338 brw->sws->bo_unreference(brw->sf.state_bo);
339 brw->sf.state_bo = brw_search_cache(&brw->cache, BRW_SF_UNIT,
340 &key, sizeof(key),
341 reloc_bufs, 2,
342 NULL);
343 if (brw->sf.state_bo == NULL) {
344 brw->sf.state_bo = sf_unit_create_from_key(brw, &key, reloc_bufs);
345 }
346 }
347
348 const struct brw_tracked_state brw_sf_unit = {
349 .dirty = {
350 .mesa = (_NEW_POLYGON |
351 _NEW_LIGHT |
352 _NEW_LINE |
353 _NEW_POINT |
354 _NEW_SCISSOR |
355 _NEW_BUFFERS),
356 .brw = BRW_NEW_URB_FENCE,
357 .cache = (CACHE_NEW_SF_VP |
358 CACHE_NEW_SF_PROG)
359 },
360 .prepare = upload_sf_unit,
361 };