2 Copyright (C) Intel Corp. 2006. All Rights Reserved.
3 Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
4 develop this 3D driver.
6 Permission is hereby granted, free of charge, to any person obtaining
7 a copy of this software and associated documentation files (the
8 "Software"), to deal in the Software without restriction, including
9 without limitation the rights to use, copy, modify, merge, publish,
10 distribute, sublicense, and/or sell copies of the Software, and to
11 permit persons to whom the Software is furnished to do so, subject to
12 the following conditions:
14 The above copyright notice and this permission notice (including the
15 next paragraph) shall be included in all copies or substantial
16 portions of the Software.
18 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
19 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
21 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
22 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
23 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
24 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
26 **********************************************************************/
29 * Keith Whitwell <keith@tungstengraphics.com>
34 #include "brw_context.h"
35 #include "brw_state.h"
36 #include "brw_batchbuffer.h"
38 /* This is used to initialize brw->state.atoms[]. We could use this
39 * list directly except for a single atom, brw_constant_buffer, which
40 * has a .dirty value which changes according to the parameters of the
41 * current fragment and vertex programs, and so cannot be a static
44 const struct brw_tracked_state
*atoms
[] =
48 // &brw_wm_input_sizes,
55 /* Once all the programs are done, we know how large urb entry
56 * sizes need to be and can decide if we need to change the urb
60 &brw_recalculate_urb_fence
,
65 &brw_vs_surfaces
, /* must do before unit */
66 &brw_wm_constant_surface
, /* must do before wm surfaces/bind bo */
67 &brw_wm_surfaces
, /* must do before samplers and unit */
73 &brw_vs_unit
, /* always required, enabled or not */
80 &brw_state_base_address
,
82 &brw_binding_table_pointers
,
83 &brw_blend_constant_color
,
88 &brw_polygon_stipple_offset
,
91 &brw_aa_line_parameters
,
104 void brw_init_state( struct brw_context
*brw
)
106 brw_init_caches(brw
);
110 void brw_destroy_state( struct brw_context
*brw
)
112 brw_destroy_caches(brw
);
113 brw_destroy_batch_cache(brw
);
116 /***********************************************************************
119 static GLboolean
check_state( const struct brw_state_flags
*a
,
120 const struct brw_state_flags
*b
)
122 return ((a
->mesa
& b
->mesa
) ||
124 (a
->cache
& b
->cache
));
127 static void accumulate_state( struct brw_state_flags
*a
,
128 const struct brw_state_flags
*b
)
132 a
->cache
|= b
->cache
;
136 static void xor_states( struct brw_state_flags
*result
,
137 const struct brw_state_flags
*a
,
138 const struct brw_state_flags
*b
)
140 result
->mesa
= a
->mesa
^ b
->mesa
;
141 result
->brw
= a
->brw
^ b
->brw
;
142 result
->cache
= a
->cache
^ b
->cache
;
146 brw_clear_validated_bos(struct brw_context
*brw
)
150 /* Clear the last round of validated bos */
151 for (i
= 0; i
< brw
->state
.validated_bo_count
; i
++) {
152 brw
->sws
->bo_unreference(brw
->state
.validated_bos
[i
]);
153 brw
->state
.validated_bos
[i
] = NULL
;
155 brw
->state
.validated_bo_count
= 0;
159 /***********************************************************************
162 enum pipe_error
brw_validate_state( struct brw_context
*brw
)
164 struct brw_state_flags
*state
= &brw
->state
.dirty
;
167 brw_clear_validated_bos(brw
);
168 brw_add_validated_bo(brw
, intel
->batch
->buf
);
170 if (brw
->emit_state_always
) {
176 if (state
->mesa
== 0 &&
181 if (brw
->state
.dirty
.brw
& BRW_NEW_CONTEXT
)
182 brw_clear_batch_cache(brw
);
184 /* do prepare stage for all atoms */
185 for (i
= 0; i
< Elements(atoms
); i
++) {
186 const struct brw_tracked_state
*atom
= atoms
[i
];
188 if (check_state(state
, &atom
->dirty
)) {
190 ret
= atom
->prepare(brw
);
197 /* Make sure that the textures which are referenced by the current
198 * brw fragment program are actually present/valid.
199 * If this fails, we can experience GPU lock-ups.
202 const struct brw_fragment_program
*fp
= brw
->fragment_program
;
204 assert(fp
->info
.max_sampler
<= brw
->nr_samplers
&&
205 fp
->info
.max_texture
<= brw
->nr_textures
);
213 enum pipe_error
brw_upload_state(struct brw_context
*brw
)
215 struct brw_state_flags
*state
= &brw
->state
.dirty
;
217 static int dirty_count
= 0;
219 brw_clear_validated_bos(brw
);
222 /* Debug version which enforces various sanity checks on the
223 * state flags which are generated and checked to help ensure
224 * state atoms are ordered correctly in the list.
226 struct brw_state_flags examined
, prev
;
227 _mesa_memset(&examined
, 0, sizeof(examined
));
230 for (i
= 0; i
< Elements(atoms
); i
++) {
231 const struct brw_tracked_state
*atom
= atoms
[i
];
232 struct brw_state_flags generated
;
234 assert(atom
->dirty
.mesa
||
238 if (check_state(state
, &atom
->dirty
)) {
240 ret
= atom
->emit( brw
);
246 accumulate_state(&examined
, &atom
->dirty
);
248 /* generated = (prev ^ state)
249 * if (examined & generated)
252 xor_states(&generated
, &prev
, state
);
253 assert(!check_state(&examined
, &generated
));
258 for (i
= 0; i
< Elements(atoms
); i
++) {
259 const struct brw_tracked_state
*atom
= atoms
[i
];
261 if (check_state(state
, &atom
->dirty
)) {
263 ret
= atom
->emit( brw
);
271 if (INTEL_DEBUG
& DEBUG_STATE
) {
272 brw_update_dirty_count(mesa_bits
, state
->mesa
);
273 brw_update_dirty_count(brw_bits
, state
->brw
);
274 brw_update_dirty_count(cache_bits
, state
->cache
);
275 if (dirty_count
++ % 1000 == 0) {
276 brw_print_dirty_count(mesa_bits
, state
->mesa
);
277 brw_print_dirty_count(brw_bits
, state
->brw
);
278 brw_print_dirty_count(cache_bits
, state
->cache
);
283 /* Clear dirty flags:
285 memset(state
, 0, sizeof(*state
));