2 Copyright (C) Intel Corp. 2006. All Rights Reserved.
3 Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
4 develop this 3D driver.
6 Permission is hereby granted, free of charge, to any person obtaining
7 a copy of this software and associated documentation files (the
8 "Software"), to deal in the Software without restriction, including
9 without limitation the rights to use, copy, modify, merge, publish,
10 distribute, sublicense, and/or sell copies of the Software, and to
11 permit persons to whom the Software is furnished to do so, subject to
12 the following conditions:
14 The above copyright notice and this permission notice (including the
15 next paragraph) shall be included in all copies or substantial
16 portions of the Software.
18 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
19 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
21 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
22 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
23 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
24 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
26 **********************************************************************/
29 * Keith Whitwell <keith@tungstengraphics.com>
31 #include "tgsi/tgsi_info.h"
33 #include "brw_context.h"
34 #include "brw_screen.h"
37 #include "brw_state.h"
38 #include "brw_debug.h"
39 #include "brw_pipe_rast.h"
42 /** Return number of src args for given instruction */
43 GLuint
brw_wm_nr_args( GLuint opcode
)
63 /* sampler arg is held as a field in the instruction, not in an
66 return tgsi_get_opcode_info(opcode
)->num_src
- 1;
69 assert(opcode
< MAX_OPCODE
);
70 return tgsi_get_opcode_info(opcode
)->num_src
;
75 GLuint
brw_wm_is_scalar_result( GLuint opcode
)
98 * Do GPU code generation for shaders without flow control. Shaders
99 * without flow control instructions can more readily be analysed for
100 * SSA-style optimizations.
103 brw_wm_linear_shader_emit(struct brw_context
*brw
, struct brw_wm_compile
*c
)
105 /* Augment fragment program. Add instructions for pre- and
106 * post-fragment-program tasks such as interpolation and fogging.
110 /* Translate to intermediate representation. Build register usage
115 /* Dead code removal.
119 /* Register allocation.
120 * Divide by two because we operate on 16 pixels at a time and require
121 * two GRF entries for each logical shader register.
123 c
->grf_limit
= BRW_WM_MAX_GRF
/ 2;
127 /* how many general-purpose registers are used */
128 c
->prog_data
.total_grf
= c
->max_wm_grf
;
130 /* Scratch space is used for register spilling */
131 if (c
->last_scratch
) {
132 c
->prog_data
.total_scratch
= c
->last_scratch
+ 0x40;
135 c
->prog_data
.total_scratch
= 0;
145 * All Mesa program -> GPU code generation goes through this function.
146 * Depending on the instructions used (i.e. flow control instructions)
147 * we'll use one of two code generators.
149 static enum pipe_error
do_wm_prog( struct brw_context
*brw
,
150 struct brw_fragment_shader
*fp
,
151 struct brw_wm_prog_key
*key
,
152 struct brw_winsys_buffer
**bo_out
)
155 struct brw_wm_compile
*c
;
156 const GLuint
*program
;
159 if (brw
->wm
.compile_data
== NULL
) {
160 brw
->wm
.compile_data
= MALLOC(sizeof(*brw
->wm
.compile_data
));
161 if (!brw
->wm
.compile_data
)
162 return PIPE_ERROR_OUT_OF_MEMORY
;
165 c
= brw
->wm
.compile_data
;
166 memset(c
, 0, sizeof *c
);
170 c
->env_param
= NULL
; /*brw->intel.ctx.FragmentProgram.Parameters;*/
172 brw_init_compile(brw
, &c
->func
);
175 * Shader which use GLSL features such as flow control are handled
176 * differently from "simple" shaders.
178 if (fp
->has_flow_control
) {
179 c
->dispatch_width
= 8;
183 /* brw_wm_branching_shader_emit(brw, c); */
186 c
->dispatch_width
= 16;
187 brw_wm_linear_shader_emit(brw
, c
);
190 if (BRW_DEBUG
& DEBUG_WM
)
195 ret
= brw_get_program(&c
->func
, &program
, &program_size
);
199 ret
= brw_upload_cache( &brw
->cache
, BRW_WM_PROG
,
200 &c
->key
, sizeof(c
->key
),
202 program
, program_size
,
214 static void brw_wm_populate_key( struct brw_context
*brw
,
215 struct brw_wm_prog_key
*key
)
217 unsigned lookup
, line_aa
;
220 memset(key
, 0, sizeof(*key
));
222 /* PIPE_NEW_FRAGMENT_SHADER
223 * PIPE_NEW_DEPTH_STENCIL_ALPHA
225 lookup
= (brw
->curr
.zstencil
->iz_lookup
|
226 brw
->curr
.fragment_shader
->iz_lookup
);
230 * BRW_NEW_REDUCED_PRIMITIVE
232 switch (brw
->reduced_primitive
) {
233 case PIPE_PRIM_POINTS
:
236 case PIPE_PRIM_LINES
:
237 line_aa
= (brw
->curr
.rast
->templ
.line_smooth
?
238 AA_ALWAYS
: AA_NEVER
);
241 line_aa
= brw
->curr
.rast
->unfilled_aa_line
;
245 brw_wm_lookup_iz(line_aa
,
247 brw
->curr
.fragment_shader
->uses_depth
,
251 key
->flat_shade
= brw
->curr
.rast
->templ
.flatshade
;
254 /* PIPE_NEW_BOUND_TEXTURES */
255 for (i
= 0; i
< brw
->curr
.num_textures
; i
++) {
256 const struct brw_texture
*tex
= brw_texture(brw
->curr
.texture
[i
]);
258 if (tex
->base
.format
== PIPE_FORMAT_YCBCR
)
259 key
->yuvtex_mask
|= 1 << i
;
261 if (tex
->base
.format
== PIPE_FORMAT_YCBCR_REV
)
262 key
->yuvtex_swap_mask
|= 1 << i
;
264 /* XXX: shadow texture
266 /* key->shadowtex_mask |= 1<<i; */
269 /* CACHE_NEW_VS_PROG */
270 key
->vp_nr_outputs
= brw
->vs
.prog_data
->nr_outputs
;
272 key
->nr_cbufs
= brw
->curr
.fb
.nr_cbufs
;
274 key
->nr_inputs
= brw
->curr
.fragment_shader
->info
.num_inputs
;
276 /* The unique fragment program ID */
277 key
->program_string_id
= brw
->curr
.fragment_shader
->id
;
281 static enum pipe_error
brw_prepare_wm_prog(struct brw_context
*brw
)
283 struct brw_wm_prog_key key
;
284 struct brw_fragment_shader
*fs
= brw
->curr
.fragment_shader
;
287 brw_wm_populate_key(brw
, &key
);
289 /* Make an early check for the key.
291 if (brw_search_cache(&brw
->cache
, BRW_WM_PROG
,
298 ret
= do_wm_prog(brw
, fs
, &key
, &brw
->wm
.prog_bo
);
306 const struct brw_tracked_state brw_wm_prog
= {
308 .mesa
= (PIPE_NEW_FRAGMENT_SHADER
|
309 PIPE_NEW_DEPTH_STENCIL_ALPHA
|
312 PIPE_NEW_BOUND_TEXTURES
),
313 .brw
= (BRW_NEW_WM_INPUT_DIMENSIONS
|
314 BRW_NEW_REDUCED_PRIMITIVE
),
315 .cache
= CACHE_NEW_VS_PROG
,
317 .prepare
= brw_prepare_wm_prog