src/gallium/drivers/i965/brw_wm_pass1.c

   1 /*
   2  Copyright (C) Intel Corp.  2006.  All Rights Reserved.
   3  Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
   4  develop this 3D driver.
   5
   6  Permission is hereby granted, free of charge, to any person obtaining
   7  a copy of this software and associated documentation files (the
   8  "Software"), to deal in the Software without restriction, including
   9  without limitation the rights to use, copy, modify, merge, publish,
  10  distribute, sublicense, and/or sell copies of the Software, and to
  11  permit persons to whom the Software is furnished to do so, subject to
  12  the following conditions:
  13
  14  The above copyright notice and this permission notice (including the
  15  next paragraph) shall be included in all copies or substantial
  16  portions of the Software.
  17
  18  THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  19  EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  20  MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
  21  IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
  22  LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
  23  OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
  24  WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25
  26  **********************************************************************/
  27  /*
  28   * Authors:
  29   *   Keith Whitwell <keith@tungstengraphics.com>
  30   */
  31
  32
  33 #include "brw_context.h"
  34 #include "brw_wm.h"
  35
  36
  37 static GLuint get_tracked_mask(struct brw_wm_compile *c,
  38                                struct brw_wm_instruction *inst)
  39 {
  40    GLuint i;
  41    for (i = 0; i < 4; i++) {
  42       if (inst->writemask & (1<<i)) {
  43          if (!inst->dst[i]->contributes_to_output) {
  44             inst->writemask &= ~(1<<i);
  45             inst->dst[i] = 0;
  46          }
  47       }
  48    }
  49
  50    return inst->writemask;
  51 }
  52
  53 /* Remove a reference from a value's usage chain.
  54  */
  55 static void unlink_ref(struct brw_wm_ref *ref)
  56 {
  57    struct brw_wm_value *value = ref->value;
  58
  59    if (ref == value->lastuse) {
  60       value->lastuse = ref->prevuse;
  61    }
  62    else {
  63       struct brw_wm_ref *i = value->lastuse;
  64       while (i->prevuse != ref) i = i->prevuse;
  65       i->prevuse = ref->prevuse;
  66    }
  67 }
  68
  69 static void track_arg(struct brw_wm_compile *c,
  70                       struct brw_wm_instruction *inst,
  71                       GLuint arg,
  72                       GLuint readmask)
  73 {
  74    GLuint i;
  75
  76    for (i = 0; i < 4; i++) {
  77       struct brw_wm_ref *ref = inst->src[arg][i];
  78       if (ref) {
  79          if (readmask & (1<<i)) {
  80             ref->value->contributes_to_output = 1;
  81          }
  82          else {
  83             unlink_ref(ref);
  84             inst->src[arg][i] = NULL;
  85          }
  86       }
  87    }
  88 }
  89
  90 static GLuint get_texcoord_mask( GLuint tex_idx )
  91 {
  92    switch (tex_idx) {
  93    case TEXTURE_1D_INDEX:
  94       return BRW_WRITEMASK_X;
  95    case TEXTURE_2D_INDEX:
  96       return BRW_WRITEMASK_XY;
  97    case TEXTURE_3D_INDEX:
  98       return BRW_WRITEMASK_XYZ;
  99    case TEXTURE_CUBE_INDEX:
 100       return BRW_WRITEMASK_XYZ;
 101    case TEXTURE_RECT_INDEX:
 102       return BRW_WRITEMASK_XY;
 103    default: return 0;
 104    }
 105 }
 106
 107
 108 /* Step two: Basically this is dead code elimination.
 109  *
 110  * Iterate backwards over instructions, noting which values
 111  * contribute to the final result.  Adjust writemasks to only
 112  * calculate these values.
 113  */
 114 void brw_wm_pass1( struct brw_wm_compile *c )
 115 {
 116    GLint insn;
 117
 118    for (insn = c->nr_insns-1; insn >= 0; insn--) {
 119       struct brw_wm_instruction *inst = &c->instruction[insn];
 120       GLuint writemask;
 121       GLuint read0, read1, read2;
 122
 123       if (inst->opcode == TGSI_OPCODE_KIL) {
 124          track_arg(c, inst, 0, BRW_WRITEMASK_XYZW); /* All args contribute to final */
 125          continue;
 126       }
 127
 128       if (inst->opcode == WM_FB_WRITE) {
 129          track_arg(c, inst, 0, BRW_WRITEMASK_XYZW);
 130          track_arg(c, inst, 1, BRW_WRITEMASK_XYZW);
 131          if (c->key.source_depth_to_render_target &&
 132              c->key.computes_depth)
 133             track_arg(c, inst, 2, BRW_WRITEMASK_Z);
 134          else
 135             track_arg(c, inst, 2, 0);
 136          continue;
 137       }
 138
 139       /* Lookup all the registers which were written by this
 140        * instruction and get a mask of those that contribute to the output:
 141        */
 142       writemask = get_tracked_mask(c, inst);
 143       if (!writemask) {
 144          GLuint arg;
 145          for (arg = 0; arg < 3; arg++)
 146             track_arg(c, inst, arg, 0);
 147          continue;
 148       }
 149
 150       read0 = 0;
 151       read1 = 0;
 152       read2 = 0;
 153
 154       /* Mark all inputs which contribute to the marked outputs:
 155        */
 156       switch (inst->opcode) {
 157       case TGSI_OPCODE_ABS:
 158       case TGSI_OPCODE_FLR:
 159       case TGSI_OPCODE_FRC:
 160       case TGSI_OPCODE_MOV:
 161       case TGSI_OPCODE_TRUNC:
 162          read0 = writemask;
 163          break;
 164
 165       case TGSI_OPCODE_SUB:
 166       case TGSI_OPCODE_SLT:
 167       case TGSI_OPCODE_SLE:
 168       case TGSI_OPCODE_SGE:
 169       case TGSI_OPCODE_SGT:
 170       case TGSI_OPCODE_SEQ:
 171       case TGSI_OPCODE_SNE:
 172       case TGSI_OPCODE_ADD:
 173       case TGSI_OPCODE_MAX:
 174       case TGSI_OPCODE_MIN:
 175       case TGSI_OPCODE_MUL:
 176          read0 = writemask;
 177          read1 = writemask;
 178          break;
 179
 180       case TGSI_OPCODE_DDX:
 181       case TGSI_OPCODE_DDY:
 182          read0 = writemask;
 183          break;
 184
 185       case TGSI_OPCODE_MAD:
 186       case TGSI_OPCODE_CMP:
 187       case TGSI_OPCODE_LRP:
 188          read0 = writemask;
 189          read1 = writemask;
 190          read2 = writemask;
 191          break;
 192
 193       case TGSI_OPCODE_XPD:
 194          if (writemask & BRW_WRITEMASK_X) read0 |= BRW_WRITEMASK_YZ;
 195          if (writemask & BRW_WRITEMASK_Y) read0 |= BRW_WRITEMASK_XZ;
 196          if (writemask & BRW_WRITEMASK_Z) read0 |= BRW_WRITEMASK_XY;
 197          read1 = read0;
 198          break;
 199
 200       case TGSI_OPCODE_COS:
 201       case TGSI_OPCODE_EX2:
 202       case TGSI_OPCODE_LG2:
 203       case TGSI_OPCODE_RCP:
 204       case TGSI_OPCODE_RSQ:
 205       case TGSI_OPCODE_SIN:
 206       case TGSI_OPCODE_SCS:
 207       case WM_CINTERP:
 208       case WM_PIXELXY:
 209          read0 = BRW_WRITEMASK_X;
 210          break;
 211
 212       case TGSI_OPCODE_POW:
 213          read0 = BRW_WRITEMASK_X;
 214          read1 = BRW_WRITEMASK_X;
 215          break;
 216
 217       case TGSI_OPCODE_TEX:
 218       case TGSI_OPCODE_TXP:
 219          read0 = get_texcoord_mask(inst->tex_idx);
 220
 221          if (inst->tex_shadow)
 222             read0 |= BRW_WRITEMASK_Z;
 223          break;
 224
 225       case TGSI_OPCODE_TXB:
 226          /* Shadow ignored for txb.
 227           */
 228          read0 = get_texcoord_mask(inst->tex_idx) | BRW_WRITEMASK_W;
 229          break;
 230
 231       case WM_WPOSXY:
 232          read0 = writemask & BRW_WRITEMASK_XY;
 233          break;
 234
 235       case WM_DELTAXY:
 236          read0 = writemask & BRW_WRITEMASK_XY;
 237          read1 = BRW_WRITEMASK_X;
 238          break;
 239
 240       case WM_PIXELW:
 241          read0 = BRW_WRITEMASK_X;
 242          read1 = BRW_WRITEMASK_XY;
 243          break;
 244
 245       case WM_LINTERP:
 246          read0 = BRW_WRITEMASK_X;
 247          read1 = BRW_WRITEMASK_XY;
 248          break;
 249
 250       case WM_PINTERP:
 251          read0 = BRW_WRITEMASK_X; /* interpolant */
 252          read1 = BRW_WRITEMASK_XY; /* deltas */
 253          read2 = BRW_WRITEMASK_W; /* pixel w */
 254          break;
 255
 256       case TGSI_OPCODE_DP3:
 257          read0 = BRW_WRITEMASK_XYZ;
 258          read1 = BRW_WRITEMASK_XYZ;
 259          break;
 260
 261       case TGSI_OPCODE_DPH:
 262          read0 = BRW_WRITEMASK_XYZ;
 263          read1 = BRW_WRITEMASK_XYZW;
 264          break;
 265
 266       case TGSI_OPCODE_DP4:
 267          read0 = BRW_WRITEMASK_XYZW;
 268          read1 = BRW_WRITEMASK_XYZW;
 269          break;
 270
 271       case TGSI_OPCODE_LIT:
 272          read0 = BRW_WRITEMASK_XYW;
 273          break;
 274
 275       case TGSI_OPCODE_DST:
 276       case WM_FRONTFACING:
 277       case TGSI_OPCODE_KIL_NV:
 278       default:
 279          break;
 280       }
 281
 282       track_arg(c, inst, 0, read0);
 283       track_arg(c, inst, 1, read1);
 284       track_arg(c, inst, 2, read2);
 285    }
 286
 287    if (BRW_DEBUG & DEBUG_WM) {
 288       brw_wm_print_program(c, "pass1");
 289    }
 290 }