i965g: make the winsys responsible for all buffer->offset handling
[mesa.git] / src / gallium / drivers / i965 / brw_wm_sampler_state.c
1 /*
2 Copyright (C) Intel Corp. 2006. All Rights Reserved.
3 Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
4 develop this 3D driver.
5
6 Permission is hereby granted, free of charge, to any person obtaining
7 a copy of this software and associated documentation files (the
8 "Software"), to deal in the Software without restriction, including
9 without limitation the rights to use, copy, modify, merge, publish,
10 distribute, sublicense, and/or sell copies of the Software, and to
11 permit persons to whom the Software is furnished to do so, subject to
12 the following conditions:
13
14 The above copyright notice and this permission notice (including the
15 next paragraph) shall be included in all copies or substantial
16 portions of the Software.
17
18 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
19 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
21 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
22 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
23 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
24 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25
26 **********************************************************************/
27 /*
28 * Authors:
29 * Keith Whitwell <keith@tungstengraphics.com>
30 */
31
32 #include "util/u_math.h"
33
34 #include "brw_context.h"
35 #include "brw_state.h"
36 #include "brw_defines.h"
37 #include "brw_screen.h"
38
39
40 /* Samplers aren't strictly wm state from the hardware's perspective,
41 * but that is the only situation in which we use them in this driver.
42 */
43
44
45
46 static enum pipe_error
47 upload_default_color( struct brw_context *brw,
48 const GLfloat *color,
49 struct brw_winsys_buffer **bo_out )
50 {
51 struct brw_sampler_default_color sdc;
52 enum pipe_error ret;
53
54 COPY_4V(sdc.color, color);
55
56 ret = brw_cache_data( &brw->cache, BRW_SAMPLER_DEFAULT_COLOR, &sdc,
57 NULL, 0, bo_out );
58 if (ret)
59 return ret;
60
61 return PIPE_OK;
62 }
63
64
65 struct wm_sampler_key {
66 int sampler_count;
67 struct brw_sampler_state sampler[BRW_MAX_TEX_UNIT];
68 };
69
70
71 /** Sets up the cache key for sampler state for all texture units */
72 static void
73 brw_wm_sampler_populate_key(struct brw_context *brw,
74 struct wm_sampler_key *key)
75 {
76 int i;
77
78 memset(key, 0, sizeof(*key));
79
80 key->sampler_count = MIN2(brw->curr.num_textures,
81 brw->curr.num_samplers);
82
83 for (i = 0; i < key->sampler_count; i++) {
84 const struct brw_texture *tex = brw_texture(brw->curr.texture[i]);
85 const struct brw_sampler *sampler = brw->curr.sampler[i];
86 struct brw_sampler_state *entry = &key->sampler[i];
87
88 entry->ss0 = sampler->ss0;
89 entry->ss1 = sampler->ss1;
90 entry->ss2.default_color_pointer = 0; /* reloc */
91 entry->ss3 = sampler->ss3;
92
93 /* Cube-maps on 965 and later must use the same wrap mode for all 3
94 * coordinate dimensions. Futher, only CUBE and CLAMP are valid.
95 */
96 if (tex->base.target == PIPE_TEXTURE_CUBE) {
97 if (FALSE &&
98 (sampler->ss0.min_filter != BRW_MAPFILTER_NEAREST ||
99 sampler->ss0.mag_filter != BRW_MAPFILTER_NEAREST)) {
100 entry->ss1.r_wrap_mode = BRW_TEXCOORDMODE_CUBE;
101 entry->ss1.s_wrap_mode = BRW_TEXCOORDMODE_CUBE;
102 entry->ss1.t_wrap_mode = BRW_TEXCOORDMODE_CUBE;
103 } else {
104 entry->ss1.r_wrap_mode = BRW_TEXCOORDMODE_CLAMP;
105 entry->ss1.s_wrap_mode = BRW_TEXCOORDMODE_CLAMP;
106 entry->ss1.t_wrap_mode = BRW_TEXCOORDMODE_CLAMP;
107 }
108 } else if (tex->base.target == PIPE_TEXTURE_1D) {
109 /* There's a bug in 1D texture sampling - it actually pays
110 * attention to the wrap_t value, though it should not.
111 * Override the wrap_t value here to GL_REPEAT to keep
112 * any nonexistent border pixels from floating in.
113 */
114 entry->ss1.t_wrap_mode = BRW_TEXCOORDMODE_WRAP;
115 }
116 }
117 }
118
119
120 static enum pipe_error
121 brw_wm_sampler_update_default_colors(struct brw_context *brw)
122 {
123 enum pipe_error ret;
124 int nr = MIN2(brw->curr.num_textures,
125 brw->curr.num_samplers);
126 int i;
127
128 for (i = 0; i < nr; i++) {
129 const struct brw_texture *tex = brw_texture(brw->curr.texture[i]);
130 const struct brw_sampler *sampler = brw->curr.sampler[i];
131 const float *bc;
132
133 if (pf_is_depth_or_stencil(tex->base.format)) {
134 float bordercolor[4] = {
135 sampler->border_color[0],
136 sampler->border_color[0],
137 sampler->border_color[0],
138 sampler->border_color[0]
139 };
140
141 bc = bordercolor;
142 }
143 else {
144 bc = sampler->border_color;
145 }
146
147 /* GL specs that border color for depth textures is taken from the
148 * R channel, while the hardware uses A. Spam R into all the
149 * channels for safety.
150 */
151 ret = upload_default_color(brw,
152 bc,
153 &brw->wm.sdc_bo[i]);
154 if (ret)
155 return ret;
156 }
157
158 return PIPE_OK;
159 }
160
161
162
163 /* All samplers must be uploaded in a single contiguous array.
164 */
165 static int upload_wm_samplers( struct brw_context *brw )
166 {
167 struct wm_sampler_key key;
168 enum pipe_error ret;
169 int i;
170
171 brw_wm_sampler_update_default_colors(brw);
172 brw_wm_sampler_populate_key(brw, &key);
173
174 if (brw->wm.sampler_count != key.sampler_count) {
175 brw->wm.sampler_count = key.sampler_count;
176 brw->state.dirty.cache |= CACHE_NEW_SAMPLER;
177 }
178
179 if (brw->wm.sampler_count == 0) {
180 bo_reference(&brw->wm.sampler_bo, NULL);
181 return PIPE_OK;
182 }
183
184 if (brw_search_cache(&brw->cache, BRW_SAMPLER,
185 &key, sizeof(key),
186 brw->wm.sdc_bo, key.sampler_count,
187 NULL,
188 &brw->wm.sampler_bo))
189 return PIPE_OK;
190
191 /* If we didnt find it in the cache, compute the state and put it in the
192 * cache.
193 */
194 ret = brw_upload_cache(&brw->cache, BRW_SAMPLER,
195 &key, sizeof(key),
196 brw->wm.sdc_bo, key.sampler_count,
197 &key.sampler, sizeof(key.sampler),
198 NULL, NULL,
199 &brw->wm.sampler_bo);
200 if (ret)
201 return ret;
202
203 /* Emit SDC relocations */
204 for (i = 0; i < key.sampler_count; i++) {
205 ret = brw->sws->bo_emit_reloc(brw->wm.sampler_bo,
206 BRW_USAGE_SAMPLER,
207 0,
208 i * sizeof(struct brw_sampler_state) +
209 offsetof(struct brw_sampler_state, ss2),
210 brw->wm.sdc_bo[i]);
211 if (ret)
212 return ret;
213 }
214
215 return 0;
216 }
217
218 const struct brw_tracked_state brw_wm_samplers = {
219 .dirty = {
220 .mesa = PIPE_NEW_BOUND_TEXTURES | PIPE_NEW_SAMPLERS,
221 .brw = 0,
222 .cache = 0
223 },
224 .prepare = upload_wm_samplers,
225 };
226
227