src/gallium/drivers/i965/brw_wm_state.c

   1 /*
   2  Copyright (C) Intel Corp.  2006.  All Rights Reserved.
   3  Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
   4  develop this 3D driver.
   5
   6  Permission is hereby granted, free of charge, to any person obtaining
   7  a copy of this software and associated documentation files (the
   8  "Software"), to deal in the Software without restriction, including
   9  without limitation the rights to use, copy, modify, merge, publish,
  10  distribute, sublicense, and/or sell copies of the Software, and to
  11  permit persons to whom the Software is furnished to do so, subject to
  12  the following conditions:
  13
  14  The above copyright notice and this permission notice (including the
  15  next paragraph) shall be included in all copies or substantial
  16  portions of the Software.
  17
  18  THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  19  EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  20  MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
  21  IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
  22  LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
  23  OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
  24  WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25
  26  **********************************************************************/
  27  /*
  28   * Authors:
  29   *   Keith Whitwell <keith@tungstengraphics.com>
  30   */
  31
  32
  33
  34 #include "brw_context.h"
  35 #include "brw_state.h"
  36 #include "brw_defines.h"
  37 #include "brw_wm.h"
  38
  39 /***********************************************************************
  40  * WM unit - fragment programs and rasterization
  41  */
  42
  43 struct brw_wm_unit_key {
  44    unsigned int total_grf, total_scratch;
  45    unsigned int urb_entry_read_length;
  46    unsigned int curb_entry_read_length;
  47    unsigned int dispatch_grf_start_reg;
  48
  49    unsigned int curbe_offset;
  50    unsigned int urb_size;
  51
  52    unsigned int max_threads;
  53
  54    unsigned int nr_surfaces, sampler_count;
  55    GLboolean uses_depth, computes_depth, uses_kill, is_glsl;
  56    GLboolean polygon_stipple, stats_wm, line_stipple, offset_enable;
  57    GLfloat offset_units, offset_factor;
  58 };
  59
  60 static void
  61 wm_unit_populate_key(struct brw_context *brw, struct brw_wm_unit_key *key)
  62 {
  63    const struct gl_fragment_program *fp = brw->fragment_program;
  64    const struct brw_fragment_program *bfp = (struct brw_fragment_program *) fp;
  65
  66    memset(key, 0, sizeof(*key));
  67
  68    if (INTEL_DEBUG & DEBUG_SINGLE_THREAD)
  69       key->max_threads = 1;
  70    else {
  71       /* WM maximum threads is number of EUs times number of threads per EU. */
  72       if (BRW_IS_IGDNG(brw))
  73          key->max_threads = 12 * 6;
  74       else if (BRW_IS_G4X(brw))
  75          key->max_threads = 10 * 5;
  76       else
  77          key->max_threads = 8 * 4;
  78    }
  79
  80    /* CACHE_NEW_WM_PROG */
  81    key->total_grf = brw->wm.prog_data->total_grf;
  82    key->urb_entry_read_length = brw->wm.prog_data->urb_read_length;
  83    key->curb_entry_read_length = brw->wm.prog_data->curb_read_length;
  84    key->dispatch_grf_start_reg = brw->wm.prog_data->first_curbe_grf;
  85    key->total_scratch = ALIGN(brw->wm.prog_data->total_scratch, 1024);
  86
  87    /* BRW_NEW_URB_FENCE */
  88    key->urb_size = brw->urb.vsize;
  89
  90    /* BRW_NEW_CURBE_OFFSETS */
  91    key->curbe_offset = brw->curbe.wm_start;
  92
  93    /* BRW_NEW_NR_SURFACEs */
  94    key->nr_surfaces = brw->wm.nr_surfaces;
  95
  96    /* CACHE_NEW_SAMPLER */
  97    key->sampler_count = brw->wm.sampler_count;
  98
  99    /* _NEW_POLYGONSTIPPLE */
 100    key->polygon_stipple = ctx->Polygon.StippleFlag;
 101
 102    /* BRW_NEW_FRAGMENT_PROGRAM */
 103    key->uses_depth = (fp->Base.InputsRead & (1 << FRAG_ATTRIB_WPOS)) != 0;
 104
 105    /* as far as we can tell */
 106    key->computes_depth =
 107       (fp->Base.OutputsWritten & (1 << FRAG_RESULT_DEPTH)) != 0;
 108    /* BRW_NEW_DEPTH_BUFFER
 109     * Override for NULL depthbuffer case, required by the Pixel Shader Computed
 110     * Depth field.
 111     */
 112    if (brw->state.depth_region == NULL)
 113       key->computes_depth = 0;
 114
 115    /* _NEW_COLOR */
 116    key->uses_kill = fp->UsesKill || ctx->Color.AlphaEnabled;
 117    key->is_glsl = bfp->isGLSL;
 118
 119    /* temporary sanity check assertion */
 120    ASSERT(bfp->isGLSL == brw_wm_is_glsl(fp));
 121
 122    /* _NEW_QUERY */
 123    key->stats_wm = intel->stats_wm;
 124
 125    /* _NEW_LINE */
 126    key->line_stipple = ctx->Line.StippleFlag;
 127
 128    /* _NEW_POLYGON */
 129    key->offset_enable = ctx->Polygon.OffsetFill;
 130    key->offset_units = ctx->Polygon.OffsetUnits;
 131    key->offset_factor = ctx->Polygon.OffsetFactor;
 132 }
 133
 134 /**
 135  * Setup wm hardware state.  See page 225 of Volume 2
 136  */
 137 static struct brw_winsys_buffer *
 138 wm_unit_create_from_key(struct brw_context *brw, struct brw_wm_unit_key *key,
 139                         struct brw_winsys_buffer **reloc_bufs)
 140 {
 141    struct brw_wm_unit_state wm;
 142    struct brw_winsys_buffer *bo;
 143
 144    memset(&wm, 0, sizeof(wm));
 145
 146    wm.thread0.grf_reg_count = ALIGN(key->total_grf, 16) / 16 - 1;
 147    wm.thread0.kernel_start_pointer = brw->wm.prog_bo->offset >> 6; /* reloc */
 148    wm.thread1.depth_coef_urb_read_offset = 1;
 149    wm.thread1.floating_point_mode = BRW_FLOATING_POINT_NON_IEEE_754;
 150
 151    if (BRW_IS_IGDNG(brw))
 152       wm.thread1.binding_table_entry_count = 0; /* hardware requirement */
 153    else
 154       wm.thread1.binding_table_entry_count = key->nr_surfaces;
 155
 156    if (key->total_scratch != 0) {
 157       wm.thread2.scratch_space_base_pointer =
 158          brw->wm.scratch_bo->offset >> 10; /* reloc */
 159       wm.thread2.per_thread_scratch_space = key->total_scratch / 1024 - 1;
 160    } else {
 161       wm.thread2.scratch_space_base_pointer = 0;
 162       wm.thread2.per_thread_scratch_space = 0;
 163    }
 164
 165    wm.thread3.dispatch_grf_start_reg = key->dispatch_grf_start_reg;
 166    wm.thread3.urb_entry_read_length = key->urb_entry_read_length;
 167    wm.thread3.urb_entry_read_offset = 0;
 168    wm.thread3.const_urb_entry_read_length = key->curb_entry_read_length;
 169    wm.thread3.const_urb_entry_read_offset = key->curbe_offset * 2;
 170
 171    if (BRW_IS_IGDNG(brw))
 172       wm.wm4.sampler_count = 0; /* hardware requirement */
 173    else
 174       wm.wm4.sampler_count = (key->sampler_count + 1) / 4;
 175
 176    if (brw->wm.sampler_bo != NULL) {
 177       /* reloc */
 178       wm.wm4.sampler_state_pointer = brw->wm.sampler_bo->offset >> 5;
 179    } else {
 180       wm.wm4.sampler_state_pointer = 0;
 181    }
 182
 183    wm.wm5.program_uses_depth = key->uses_depth;
 184    wm.wm5.program_computes_depth = key->computes_depth;
 185    wm.wm5.program_uses_killpixel = key->uses_kill;
 186
 187    if (key->is_glsl)
 188       wm.wm5.enable_8_pix = 1;
 189    else
 190       wm.wm5.enable_16_pix = 1;
 191
 192    wm.wm5.max_threads = key->max_threads - 1;
 193    wm.wm5.thread_dispatch_enable = 1;   /* AKA: color_write */
 194    wm.wm5.legacy_line_rast = 0;
 195    wm.wm5.legacy_global_depth_bias = 0;
 196    wm.wm5.early_depth_test = 1;         /* never need to disable */
 197    wm.wm5.line_aa_region_width = 0;
 198    wm.wm5.line_endcap_aa_region_width = 1;
 199
 200    wm.wm5.polygon_stipple = key->polygon_stipple;
 201
 202    if (key->offset_enable) {
 203       wm.wm5.depth_offset = 1;
 204       /* Something wierd going on with legacy_global_depth_bias,
 205        * offset_constant, scaling and MRD.  This value passes glean
 206        * but gives some odd results elsewere (eg. the
 207        * quad-offset-units test).
 208        */
 209       wm.global_depth_offset_constant = key->offset_units * 2;
 210
 211       /* This is the only value that passes glean:
 212        */
 213       wm.global_depth_offset_scale = key->offset_factor;
 214    }
 215
 216    wm.wm5.line_stipple = key->line_stipple;
 217
 218    if (INTEL_DEBUG & DEBUG_STATS || key->stats_wm)
 219       wm.wm4.stats_enable = 1;
 220
 221    bo = brw_upload_cache(&brw->cache, BRW_WM_UNIT,
 222                          key, sizeof(*key),
 223                          reloc_bufs, 3,
 224                          &wm, sizeof(wm),
 225                          NULL, NULL);
 226
 227    /* Emit WM program relocation */
 228    dri_bo_emit_reloc(bo,
 229                      I915_GEM_DOMAIN_INSTRUCTION, 0,
 230                      wm.thread0.grf_reg_count << 1,
 231                      offsetof(struct brw_wm_unit_state, thread0),
 232                      brw->wm.prog_bo);
 233
 234    /* Emit scratch space relocation */
 235    if (key->total_scratch != 0) {
 236       dri_bo_emit_reloc(bo,
 237                         0, 0,
 238                         wm.thread2.per_thread_scratch_space,
 239                         offsetof(struct brw_wm_unit_state, thread2),
 240                         brw->wm.scratch_bo);
 241    }
 242
 243    /* Emit sampler state relocation */
 244    if (key->sampler_count != 0) {
 245       dri_bo_emit_reloc(bo,
 246                         I915_GEM_DOMAIN_INSTRUCTION, 0,
 247                         wm.wm4.stats_enable | (wm.wm4.sampler_count << 2),
 248                         offsetof(struct brw_wm_unit_state, wm4),
 249                         brw->wm.sampler_bo);
 250    }
 251
 252    return bo;
 253 }
 254
 255
 256 static void upload_wm_unit( struct brw_context *brw )
 257 {
 258    struct brw_wm_unit_key key;
 259    struct brw_winsys_buffer *reloc_bufs[3];
 260    wm_unit_populate_key(brw, &key);
 261
 262    /* Allocate the necessary scratch space if we haven't already.  Don't
 263     * bother reducing the allocation later, since we use scratch so
 264     * rarely.
 265     */
 266    assert(key.total_scratch <= 12 * 1024);
 267    if (key.total_scratch) {
 268       GLuint total = key.total_scratch * key.max_threads;
 269
 270       if (brw->wm.scratch_bo && total > brw->wm.scratch_bo->size) {
 271          brw->sws->bo_unreference(brw->wm.scratch_bo);
 272          brw->wm.scratch_bo = NULL;
 273       }
 274       if (brw->wm.scratch_bo == NULL) {
 275          brw->wm.scratch_bo = dri_bo_alloc(intel->bufmgr,
 276                                            "wm scratch",
 277                                            total,
 278                                            4096);
 279       }
 280    }
 281
 282    reloc_bufs[0] = brw->wm.prog_bo;
 283    reloc_bufs[1] = brw->wm.scratch_bo;
 284    reloc_bufs[2] = brw->wm.sampler_bo;
 285
 286    brw->sws->bo_unreference(brw->wm.state_bo);
 287    brw->wm.state_bo = brw_search_cache(&brw->cache, BRW_WM_UNIT,
 288                                        &key, sizeof(key),
 289                                        reloc_bufs, 3,
 290                                        NULL);
 291    if (brw->wm.state_bo == NULL) {
 292       brw->wm.state_bo = wm_unit_create_from_key(brw, &key, reloc_bufs);
 293    }
 294 }
 295
 296 const struct brw_tracked_state brw_wm_unit = {
 297    .dirty = {
 298       .mesa = (_NEW_POLYGON |
 299                _NEW_POLYGONSTIPPLE |
 300                _NEW_LINE |
 301                _NEW_COLOR |
 302                _NEW_QUERY),
 303
 304       .brw = (BRW_NEW_FRAGMENT_PROGRAM |
 305               BRW_NEW_CURBE_OFFSETS |
 306               BRW_NEW_DEPTH_BUFFER |
 307               BRW_NEW_NR_WM_SURFACES),
 308
 309       .cache = (CACHE_NEW_WM_PROG |
 310                 CACHE_NEW_SAMPLER)
 311    },
 312    .prepare = upload_wm_unit,
 313 };
 314