gallium: Improve makefiles for libraries
[mesa.git] / src / gallium / drivers / i965simple / brw_clip.c
1 /*
2 Copyright (C) Intel Corp. 2006. All Rights Reserved.
3 Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
4 develop this 3D driver.
5
6 Permission is hereby granted, free of charge, to any person obtaining
7 a copy of this software and associated documentation files (the
8 "Software"), to deal in the Software without restriction, including
9 without limitation the rights to use, copy, modify, merge, publish,
10 distribute, sublicense, and/or sell copies of the Software, and to
11 permit persons to whom the Software is furnished to do so, subject to
12 the following conditions:
13
14 The above copyright notice and this permission notice (including the
15 next paragraph) shall be included in all copies or substantial
16 portions of the Software.
17
18 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
19 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
21 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
22 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
23 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
24 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25
26 **********************************************************************/
27 /*
28 * Authors:
29 * Keith Whitwell <keith@tungstengraphics.com>
30 */
31
32 #include "brw_defines.h"
33 #include "brw_context.h"
34 #include "brw_eu.h"
35 #include "brw_util.h"
36 #include "brw_state.h"
37 #include "brw_clip.h"
38
39 #define FRONT_UNFILLED_BIT 0x1
40 #define BACK_UNFILLED_BIT 0x2
41
42
43 static void compile_clip_prog( struct brw_context *brw,
44 struct brw_clip_prog_key *key )
45 {
46 struct brw_clip_compile c;
47 const unsigned *program;
48 unsigned program_size;
49 unsigned delta;
50 unsigned i;
51
52 memset(&c, 0, sizeof(c));
53
54 /* Begin the compilation:
55 */
56 brw_init_compile(&c.func);
57
58 c.func.single_program_flow = 1;
59
60 c.key = *key;
61
62
63 /* Need to locate the two positions present in vertex + header.
64 * These are currently hardcoded:
65 */
66 c.header_position_offset = ATTR_SIZE;
67
68 for (i = 0, delta = REG_SIZE; i < PIPE_MAX_SHADER_OUTPUTS; i++)
69 if (c.key.attrs & (1<<i)) {
70 c.offset[i] = delta;
71 delta += ATTR_SIZE;
72 }
73
74 c.nr_attrs = brw_count_bits(c.key.attrs);
75 c.nr_regs = (c.nr_attrs + 1) / 2 + 1; /* are vertices packed, or reg-aligned? */
76 c.nr_bytes = c.nr_regs * REG_SIZE;
77
78 c.prog_data.clip_mode = c.key.clip_mode; /* XXX */
79
80 /* For some reason the thread is spawned with only 4 channels
81 * unmasked.
82 */
83 brw_set_mask_control(&c.func, BRW_MASK_DISABLE);
84
85
86 /* Would ideally have the option of producing a program which could
87 * do all three:
88 */
89 switch (key->primitive) {
90 case PIPE_PRIM_TRIANGLES:
91 #if 0
92 if (key->do_unfilled)
93 brw_emit_unfilled_clip( &c );
94 else
95 #endif
96 brw_emit_tri_clip( &c );
97 break;
98 case PIPE_PRIM_LINES:
99 brw_emit_line_clip( &c );
100 break;
101 case PIPE_PRIM_POINTS:
102 brw_emit_point_clip( &c );
103 break;
104 default:
105 assert(0);
106 return;
107 }
108
109
110
111 /* get the program
112 */
113 program = brw_get_program(&c.func, &program_size);
114
115 /* Upload
116 */
117 brw->clip.prog_gs_offset = brw_upload_cache( &brw->cache[BRW_CLIP_PROG],
118 &c.key,
119 sizeof(c.key),
120 program,
121 program_size,
122 &c.prog_data,
123 &brw->clip.prog_data );
124 }
125
126
127 static boolean search_cache( struct brw_context *brw,
128 struct brw_clip_prog_key *key )
129 {
130 return brw_search_cache(&brw->cache[BRW_CLIP_PROG],
131 key, sizeof(*key),
132 &brw->clip.prog_data,
133 &brw->clip.prog_gs_offset);
134 }
135
136
137
138
139 /* Calculate interpolants for triangle and line rasterization.
140 */
141 static void upload_clip_prog(struct brw_context *brw)
142 {
143 struct brw_clip_prog_key key;
144
145 memset(&key, 0, sizeof(key));
146
147 /* Populate the key:
148 */
149 /* BRW_NEW_REDUCED_PRIMITIVE */
150 key.primitive = brw->reduced_primitive;
151 /* CACHE_NEW_VS_PROG */
152 key.attrs = brw->vs.prog_data->outputs_written;
153 /* BRW_NEW_RASTER */
154 key.do_flat_shading = (brw->attribs.Raster->flatshade);
155 /* BRW_NEW_CLIP */
156 key.nr_userclip = brw->attribs.Clip.nr; /* XXX */
157
158 #if 0
159 key.clip_mode = BRW_CLIPMODE_NORMAL;
160
161 if (key.primitive == PIPE_PRIM_TRIANGLES) {
162 if (brw->attribs.Raster->cull_mode == PIPE_WINDING_BOTH)
163 key.clip_mode = BRW_CLIPMODE_REJECT_ALL;
164 else {
165 if (brw->attribs.Raster->fill_cw != PIPE_POLYGON_MODE_FILL ||
166 brw->attribs.Raster->fill_ccw != PIPE_POLYGON_MODE_FILL)
167 key.do_unfilled = 1;
168
169 /* Most cases the fixed function units will handle. Cases where
170 * one or more polygon faces are unfilled will require help:
171 */
172 if (key.do_unfilled) {
173 key.clip_mode = BRW_CLIPMODE_CLIP_NON_REJECTED;
174
175 if (brw->attribs.Raster->offset_cw ||
176 brw->attribs.Raster->offset_ccw) {
177 key.offset_units = brw->attribs.Raster->offset_units;
178 key.offset_factor = brw->attribs.Raster->offset_scale;
179 }
180 key.fill_ccw = brw->attribs.Raster->fill_ccw;
181 key.fill_cw = brw->attribs.Raster->fill_cw;
182 key.offset_ccw = brw->attribs.Raster->offset_ccw;
183 key.offset_cw = brw->attribs.Raster->offset_cw;
184 if (brw->attribs.Raster->light_twoside &&
185 key.fill_cw != CLIP_CULL)
186 key.copy_bfc_cw = 1;
187 }
188 }
189 }
190 #else
191 key.clip_mode = BRW_CLIPMODE_ACCEPT_ALL;
192 #endif
193
194 if (!search_cache(brw, &key))
195 compile_clip_prog( brw, &key );
196 }
197
198 const struct brw_tracked_state brw_clip_prog = {
199 .dirty = {
200 .brw = (BRW_NEW_RASTERIZER |
201 BRW_NEW_CLIP |
202 BRW_NEW_REDUCED_PRIMITIVE),
203 .cache = CACHE_NEW_VS_PROG
204 },
205 .update = upload_clip_prog
206 };