src/gallium/drivers/i965simple/brw_wm.h

   1 /*
   2  Copyright (C) Intel Corp.  2006.  All Rights Reserved.
   3  Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
   4  develop this 3D driver.
   5
   6  Permission is hereby granted, free of charge, to any person obtaining
   7  a copy of this software and associated documentation files (the
   8  "Software"), to deal in the Software without restriction, including
   9  without limitation the rights to use, copy, modify, merge, publish,
  10  distribute, sublicense, and/or sell copies of the Software, and to
  11  permit persons to whom the Software is furnished to do so, subject to
  12  the following conditions:
  13
  14  The above copyright notice and this permission notice (including the
  15  next paragraph) shall be included in all copies or substantial
  16  portions of the Software.
  17
  18  THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  19  EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  20  MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
  21  IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
  22  LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
  23  OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
  24  WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25
  26  **********************************************************************/
  27  /*
  28   * Authors:
  29   *   Keith Whitwell <keith@tungstengraphics.com>
  30   */
  31
  32
  33 #ifndef BRW_WM_H
  34 #define BRW_WM_H
  35
  36
  37 #include "brw_context.h"
  38 #include "brw_eu.h"
  39
  40 /* A big lookup table is used to figure out which and how many
  41  * additional regs will inserted before the main payload in the WM
  42  * program execution.  These mainly relate to depth and stencil
  43  * processing and the early-depth-test optimization.
  44  */
  45 #define IZ_PS_KILL_ALPHATEST_BIT    0x1
  46 #define IZ_PS_COMPUTES_DEPTH_BIT    0x2
  47 #define IZ_DEPTH_WRITE_ENABLE_BIT   0x4
  48 #define IZ_DEPTH_TEST_ENABLE_BIT    0x8
  49 #define IZ_STENCIL_WRITE_ENABLE_BIT 0x10
  50 #define IZ_STENCIL_TEST_ENABLE_BIT  0x20
  51 #define IZ_EARLY_DEPTH_TEST_BIT     0x40
  52 #define IZ_BIT_MAX                  0x80
  53
  54 #define AA_NEVER     0
  55 #define AA_SOMETIMES 1
  56 #define AA_ALWAYS    2
  57
  58 struct brw_wm_prog_key {
  59    unsigned source_depth_reg:3;
  60    unsigned aa_dest_stencil_reg:3;
  61    unsigned dest_depth_reg:3;
  62    unsigned nr_depth_regs:3;
  63    unsigned shadowtex_mask:8;
  64    unsigned computes_depth:1;   /* could be derived from program string */
  65    unsigned source_depth_to_render_target:1;
  66    unsigned runtime_check_aads_emit:1;
  67
  68    unsigned yuvtex_mask:8;
  69
  70    unsigned program_string_id;
  71 };
  72
  73
  74
  75
  76
  77 #define PROGRAM_INTERNAL_PARAM
  78 #define MAX_NV_FRAGMENT_PROGRAM_INSTRUCTIONS 1024 /* 72 for GL_ARB_f_p */
  79 #define BRW_WM_MAX_INSN  (MAX_NV_FRAGMENT_PROGRAM_INSTRUCTIONS*3 + PIPE_MAX_ATTRIBS + 3)
  80 #define BRW_WM_MAX_GRF   128            /* hardware limit */
  81 #define BRW_WM_MAX_VREG  (BRW_WM_MAX_INSN * 4)
  82 #define BRW_WM_MAX_REF   (BRW_WM_MAX_INSN * 12)
  83 #define BRW_WM_MAX_PARAM 256
  84 #define BRW_WM_MAX_CONST 256
  85 #define BRW_WM_MAX_KILLS MAX_NV_FRAGMENT_PROGRAM_INSTRUCTIONS
  86
  87 #define PAYLOAD_DEPTH     (PIPE_MAX_ATTRIBS)
  88
  89 #define MAX_IFSN 32
  90 #define MAX_LOOP_DEPTH 32
  91
  92 struct brw_wm_compile {
  93    struct brw_compile func;
  94    struct brw_wm_prog_key key;
  95    struct brw_wm_prog_data prog_data; /* result */
  96
  97    struct brw_fragment_program *fp;
  98
  99    unsigned grf_limit;
 100    unsigned max_wm_grf;
 101
 102
 103    struct brw_reg pixel_xy[2];
 104    struct brw_reg delta_xy[2];
 105    struct brw_reg pixel_w;
 106
 107
 108    struct brw_reg wm_regs[8][32][4];
 109
 110    struct brw_reg payload_depth[4];
 111    struct brw_reg payload_coef[16];
 112
 113    struct brw_reg emit_mask_reg;
 114
 115    struct brw_instruction *if_inst[MAX_IFSN];
 116    int if_insn;
 117
 118    struct brw_instruction *loop_inst[MAX_LOOP_DEPTH];
 119    int loop_insn;
 120
 121    struct brw_instruction *inst0;
 122    struct brw_instruction *inst1;
 123
 124    struct brw_reg stack;
 125    struct brw_indirect stack_index;
 126
 127    unsigned reg_index;
 128
 129    unsigned tmp_start;
 130    unsigned tmp_index;
 131 };
 132
 133
 134
 135 void brw_wm_lookup_iz( unsigned line_aa,
 136                        unsigned lookup,
 137                        struct brw_wm_prog_key *key );
 138
 139 void brw_wm_glsl_emit(struct brw_wm_compile *c);
 140 void brw_wm_emit_decls(struct brw_wm_compile *c);
 141
 142 #endif