src/gallium/drivers/i965simple/brw_wm_sampler_state.c

   1 /*
   2  Copyright (C) Intel Corp.  2006.  All Rights Reserved.
   3  Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
   4  develop this 3D driver.
   5
   6  Permission is hereby granted, free of charge, to any person obtaining
   7  a copy of this software and associated documentation files (the
   8  "Software"), to deal in the Software without restriction, including
   9  without limitation the rights to use, copy, modify, merge, publish,
  10  distribute, sublicense, and/or sell copies of the Software, and to
  11  permit persons to whom the Software is furnished to do so, subject to
  12  the following conditions:
  13
  14  The above copyright notice and this permission notice (including the
  15  next paragraph) shall be included in all copies or substantial
  16  portions of the Software.
  17
  18  THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  19  EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  20  MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
  21  IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
  22  LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
  23  OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
  24  WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25
  26  **********************************************************************/
  27  /*
  28   * Authors:
  29   *   Keith Whitwell <keith@tungstengraphics.com>
  30   */
  31
  32
  33 #include "brw_context.h"
  34 #include "brw_state.h"
  35 #include "brw_defines.h"
  36
  37 #include "pipe/p_util.h"
  38
  39
  40 #define COMPAREFUNC_ALWAYS              0
  41 #define COMPAREFUNC_NEVER               0x1
  42 #define COMPAREFUNC_LESS                0x2
  43 #define COMPAREFUNC_EQUAL               0x3
  44 #define COMPAREFUNC_LEQUAL              0x4
  45 #define COMPAREFUNC_GREATER             0x5
  46 #define COMPAREFUNC_NOTEQUAL            0x6
  47 #define COMPAREFUNC_GEQUAL              0x7
  48
  49 /* Samplers aren't strictly wm state from the hardware's perspective,
  50  * but that is the only situation in which we use them in this driver.
  51  */
  52
  53 static int intel_translate_shadow_compare_func(unsigned func)
  54 {
  55    switch(func) {
  56    case PIPE_FUNC_NEVER:
  57        return COMPAREFUNC_ALWAYS;
  58    case PIPE_FUNC_LESS:
  59        return COMPAREFUNC_LEQUAL;
  60    case PIPE_FUNC_LEQUAL:
  61        return COMPAREFUNC_LESS;
  62    case PIPE_FUNC_GREATER:
  63        return COMPAREFUNC_GEQUAL;
  64    case PIPE_FUNC_GEQUAL:
  65       return COMPAREFUNC_GREATER;
  66    case PIPE_FUNC_NOTEQUAL:
  67       return COMPAREFUNC_EQUAL;
  68    case PIPE_FUNC_EQUAL:
  69       return COMPAREFUNC_NOTEQUAL;
  70    case PIPE_FUNC_ALWAYS:
  71        return COMPAREFUNC_NEVER;
  72    }
  73
  74    debug_printf("Unknown value in %s: %x\n", __FUNCTION__, func);
  75    return COMPAREFUNC_NEVER;
  76 }
  77
  78 /* The brw (and related graphics cores) do not support GL_CLAMP.  The
  79  * Intel drivers for "other operating systems" implement GL_CLAMP as
  80  * GL_CLAMP_TO_EDGE, so the same is done here.
  81  */
  82 static unsigned translate_wrap_mode( int wrap )
  83 {
  84    switch( wrap ) {
  85    case PIPE_TEX_WRAP_REPEAT:
  86       return BRW_TEXCOORDMODE_WRAP;
  87    case PIPE_TEX_WRAP_CLAMP:
  88       return BRW_TEXCOORDMODE_CLAMP;
  89    case PIPE_TEX_WRAP_CLAMP_TO_EDGE:
  90       return BRW_TEXCOORDMODE_CLAMP; /* conform likes it this way */
  91    case PIPE_TEX_WRAP_CLAMP_TO_BORDER:
  92       return BRW_TEXCOORDMODE_CLAMP_BORDER;
  93    case PIPE_TEX_WRAP_MIRROR_REPEAT:
  94       return BRW_TEXCOORDMODE_MIRROR;
  95    default:
  96       return BRW_TEXCOORDMODE_WRAP;
  97    }
  98 }
  99
 100
 101 static unsigned U_FIXED(float value, unsigned frac_bits)
 102 {
 103    value *= (1<<frac_bits);
 104    return value < 0 ? 0 : value;
 105 }
 106
 107 static int S_FIXED(float value, unsigned frac_bits)
 108 {
 109    return value * (1<<frac_bits);
 110 }
 111
 112
 113 static unsigned upload_default_color( struct brw_context *brw,
 114                                       const float *color )
 115 {
 116    struct brw_sampler_default_color sdc;
 117
 118    COPY_4V(sdc.color, color);
 119
 120    return brw_cache_data( &brw->cache[BRW_SAMPLER_DEFAULT_COLOR], &sdc );
 121 }
 122
 123
 124 /*
 125  */
 126 static void brw_update_sampler_state( const struct pipe_sampler_state *pipe_sampler,
 127                                       unsigned sdc_gs_offset,
 128                                       struct brw_sampler_state *sampler)
 129 {
 130    memset(sampler, 0, sizeof(*sampler));
 131
 132    switch (pipe_sampler->min_mip_filter) {
 133    case PIPE_TEX_FILTER_NEAREST:
 134       sampler->ss0.min_filter = BRW_MAPFILTER_NEAREST;
 135       break;
 136    case PIPE_TEX_FILTER_LINEAR:
 137       sampler->ss0.min_filter = BRW_MAPFILTER_LINEAR;
 138       break;
 139    case PIPE_TEX_FILTER_ANISO:
 140       sampler->ss0.min_filter = BRW_MAPFILTER_ANISOTROPIC;
 141       break;
 142    default:
 143       break;
 144    }
 145
 146    switch (pipe_sampler->min_mip_filter) {
 147    case PIPE_TEX_MIPFILTER_NEAREST:
 148       sampler->ss0.mip_filter = BRW_MIPFILTER_NEAREST;
 149       break;
 150    case PIPE_TEX_MIPFILTER_LINEAR:
 151       sampler->ss0.mip_filter = BRW_MIPFILTER_LINEAR;
 152       break;
 153    case PIPE_TEX_MIPFILTER_NONE:
 154       sampler->ss0.mip_filter = BRW_MIPFILTER_NONE;
 155       break;
 156    default:
 157       break;
 158    }
 159    /* Set Anisotropy:
 160     */
 161    switch (pipe_sampler->mag_img_filter) {
 162    case PIPE_TEX_FILTER_NEAREST:
 163       sampler->ss0.mag_filter = BRW_MAPFILTER_NEAREST;
 164       break;
 165    case PIPE_TEX_FILTER_LINEAR:
 166       sampler->ss0.mag_filter = BRW_MAPFILTER_LINEAR;
 167       break;
 168    case PIPE_TEX_FILTER_ANISO:
 169       sampler->ss0.mag_filter = BRW_MAPFILTER_LINEAR;
 170       break;
 171    default:
 172       break;
 173    }
 174
 175    if (pipe_sampler->max_anisotropy > 2.0) {
 176       sampler->ss3.max_aniso = MAX2((pipe_sampler->max_anisotropy - 2) / 2,
 177                                     BRW_ANISORATIO_16);
 178    }
 179
 180    sampler->ss1.s_wrap_mode = translate_wrap_mode(pipe_sampler->wrap_s);
 181    sampler->ss1.r_wrap_mode = translate_wrap_mode(pipe_sampler->wrap_r);
 182    sampler->ss1.t_wrap_mode = translate_wrap_mode(pipe_sampler->wrap_t);
 183
 184    /* Fulsim complains if I don't do this.  Hardware doesn't mind:
 185     */
 186 #if 0
 187    if (texObj->Target == GL_TEXTURE_CUBE_MAP_ARB) {
 188       sampler->ss1.r_wrap_mode = BRW_TEXCOORDMODE_CUBE;
 189       sampler->ss1.s_wrap_mode = BRW_TEXCOORDMODE_CUBE;
 190       sampler->ss1.t_wrap_mode = BRW_TEXCOORDMODE_CUBE;
 191    }
 192 #endif
 193
 194    /* Set shadow function:
 195     */
 196    if (pipe_sampler->compare_mode == PIPE_TEX_COMPARE_R_TO_TEXTURE) {
 197       /* Shadowing is "enabled" by emitting a particular sampler
 198        * message (sample_c).  So need to recompile WM program when
 199        * shadow comparison is enabled on each/any texture unit.
 200        */
 201       sampler->ss0.shadow_function = intel_translate_shadow_compare_func(pipe_sampler->compare_func);
 202    }
 203
 204    /* Set LOD bias:
 205     */
 206    sampler->ss0.lod_bias = S_FIXED(CLAMP(pipe_sampler->lod_bias, -16, 15), 6);
 207
 208    sampler->ss0.lod_preclamp = 1; /* OpenGL mode */
 209    sampler->ss0.default_color_mode = 0; /* OpenGL/DX10 mode */
 210
 211    /* Set BaseMipLevel, MaxLOD, MinLOD:
 212     *
 213     * XXX: I don't think that using firstLevel, lastLevel works,
 214     * because we always setup the surface state as if firstLevel ==
 215     * level zero.  Probably have to subtract firstLevel from each of
 216     * these:
 217     */
 218    sampler->ss0.base_level = U_FIXED(0, 1);
 219
 220    sampler->ss1.max_lod = U_FIXED(MIN2(MAX2(pipe_sampler->max_lod, 0), 13), 6);
 221    sampler->ss1.min_lod = U_FIXED(MIN2(MAX2(pipe_sampler->min_lod, 0), 13), 6);
 222
 223    sampler->ss2.default_color_pointer = sdc_gs_offset >> 5;
 224 }
 225
 226
 227
 228 /* All samplers must be uploaded in a single contiguous array, which
 229  * complicates various things.  However, this is still too confusing -
 230  * FIXME: simplify all the different new texture state flags.
 231  */
 232 static void upload_wm_samplers(struct brw_context *brw)
 233 {
 234    unsigned unit;
 235    unsigned sampler_count = 0;
 236
 237    /* BRW_NEW_SAMPLER */
 238    for (unit = 0; unit < brw->num_textures && unit < brw->num_samplers;
 239         unit++) {
 240       /* determine unit enable/disable by looking for a bound texture */
 241       if (brw->attribs.Texture[unit]) {
 242          const struct pipe_sampler_state *sampler = brw->attribs.Samplers[unit];
 243          unsigned sdc_gs_offset = upload_default_color(brw, sampler->border_color);
 244
 245          brw_update_sampler_state(sampler,
 246                                   sdc_gs_offset,
 247                                   &brw->wm.sampler[unit]);
 248
 249          sampler_count = unit + 1;
 250       }
 251    }
 252
 253    if (brw->wm.sampler_count != sampler_count) {
 254       brw->wm.sampler_count = sampler_count;
 255       brw->state.dirty.cache |= CACHE_NEW_SAMPLER;
 256    }
 257
 258    brw->wm.sampler_gs_offset = 0;
 259
 260    if (brw->wm.sampler_count)
 261       brw->wm.sampler_gs_offset =
 262          brw_cache_data_sz(&brw->cache[BRW_SAMPLER],
 263                            brw->wm.sampler,
 264                            sizeof(struct brw_sampler_state) * brw->wm.sampler_count);
 265 }
 266
 267 const struct brw_tracked_state brw_wm_samplers = {
 268    .dirty = {
 269       .brw = BRW_NEW_SAMPLER,
 270       .cache = 0
 271    },
 272    .update = upload_wm_samplers
 273 };
 274