ilo: embed ilo_state_raster in ilo_rasterizer_state
[mesa.git] / src / gallium / drivers / ilo / core / ilo_builder_3d_bottom.h
1 /*
2 * Mesa 3-D graphics library
3 *
4 * Copyright (C) 2014 LunarG, Inc.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included
14 * in all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
23 *
24 * Authors:
25 * Chia-I Wu <olv@lunarg.com>
26 */
27
28 #ifndef ILO_BUILDER_3D_BOTTOM_H
29 #define ILO_BUILDER_3D_BOTTOM_H
30
31 #include "genhw/genhw.h"
32 #include "../ilo_shader.h"
33 #include "intel_winsys.h"
34
35 #include "ilo_core.h"
36 #include "ilo_dev.h"
37 #include "ilo_format.h"
38 #include "ilo_state_raster.h"
39 #include "ilo_state_viewport.h"
40 #include "ilo_builder.h"
41 #include "ilo_builder_3d_top.h"
42
43 static inline void
44 gen6_3DSTATE_CLIP(struct ilo_builder *builder,
45 const struct ilo_state_raster *rs)
46 {
47 const uint8_t cmd_len = 4;
48 uint32_t *dw;
49
50 ILO_DEV_ASSERT(builder->dev, 6, 8);
51
52 ilo_builder_batch_pointer(builder, cmd_len, &dw);
53
54 dw[0] = GEN6_RENDER_CMD(3D, 3DSTATE_CLIP) | (cmd_len - 2);
55 /* see raster_set_gen6_3DSTATE_CLIP() */
56 dw[1] = rs->clip[0];
57 dw[2] = rs->clip[1];
58 dw[3] = rs->clip[2];
59 }
60
61 static inline void
62 gen8_internal_3dstate_sbe(struct ilo_builder *builder,
63 uint8_t cmd_len, uint32_t *dw,
64 const struct ilo_shader_state *fs,
65 int sprite_coord_mode)
66 {
67 const struct ilo_kernel_routing *routing;
68 int vue_offset, vue_len, out_count;
69
70 ILO_DEV_ASSERT(builder->dev, 6, 8);
71
72 assert(cmd_len == 4);
73
74 dw[0] = GEN7_RENDER_CMD(3D, 3DSTATE_SBE) | (cmd_len - 2);
75
76 if (!fs) {
77 dw[1] = 1 << GEN7_SBE_DW1_URB_READ_LEN__SHIFT;
78 dw[2] = 0;
79 dw[3] = 0;
80 return;
81 }
82
83 routing = ilo_shader_get_kernel_routing(fs);
84
85 vue_offset = routing->source_skip;
86 assert(vue_offset % 2 == 0);
87 vue_offset /= 2;
88
89 vue_len = (routing->source_len + 1) / 2;
90 if (!vue_len)
91 vue_len = 1;
92
93 out_count = ilo_shader_get_kernel_param(fs, ILO_KERNEL_INPUT_COUNT);
94 assert(out_count <= 32);
95
96 dw[1] = out_count << GEN7_SBE_DW1_ATTR_COUNT__SHIFT |
97 vue_len << GEN7_SBE_DW1_URB_READ_LEN__SHIFT;
98
99 if (ilo_dev_gen(builder->dev) >= ILO_GEN(8)) {
100 dw[1] |= GEN8_SBE_DW1_USE_URB_READ_LEN |
101 GEN8_SBE_DW1_USE_URB_READ_OFFSET |
102 vue_offset << GEN8_SBE_DW1_URB_READ_OFFSET__SHIFT;
103 } else {
104 dw[1] |= vue_offset << GEN7_SBE_DW1_URB_READ_OFFSET__SHIFT;
105 }
106
107 if (routing->swizzle_enable)
108 dw[1] |= GEN7_SBE_DW1_ATTR_SWIZZLE_ENABLE;
109
110 switch (sprite_coord_mode) {
111 case PIPE_SPRITE_COORD_UPPER_LEFT:
112 dw[1] |= GEN7_SBE_DW1_POINT_SPRITE_TEXCOORD_UPPERLEFT;
113 break;
114 case PIPE_SPRITE_COORD_LOWER_LEFT:
115 dw[1] |= GEN7_SBE_DW1_POINT_SPRITE_TEXCOORD_LOWERLEFT;
116 break;
117 }
118
119 /*
120 * From the Ivy Bridge PRM, volume 2 part 1, page 268:
121 *
122 * "This field (Point Sprite Texture Coordinate Enable) must be
123 * programmed to 0 when non-point primitives are rendered."
124 *
125 * TODO We do not check that yet.
126 */
127 dw[2] = routing->point_sprite_enable;
128
129 dw[3] = routing->const_interp_enable;
130 }
131
132 static inline void
133 gen8_internal_3dstate_sbe_swiz(struct ilo_builder *builder,
134 uint8_t cmd_len, uint32_t *dw,
135 const struct ilo_shader_state *fs)
136 {
137 const struct ilo_kernel_routing *routing;
138
139 ILO_DEV_ASSERT(builder->dev, 6, 8);
140
141 assert(cmd_len == 11);
142
143 dw[0] = GEN8_RENDER_CMD(3D, 3DSTATE_SBE_SWIZ) | (cmd_len - 2);
144
145 if (!fs) {
146 memset(&dw[1], 0, sizeof(*dw) * (cmd_len - 1));
147 return;
148 }
149
150 routing = ilo_shader_get_kernel_routing(fs);
151
152 STATIC_ASSERT(sizeof(routing->swizzles) >= sizeof(*dw) * 8);
153 memcpy(&dw[1], routing->swizzles, sizeof(*dw) * 8);
154
155 /* WrapShortest enables */
156 dw[9] = 0;
157 dw[10] = 0;
158 }
159
160 static inline void
161 gen6_3DSTATE_SF(struct ilo_builder *builder,
162 const struct ilo_state_raster *rs,
163 unsigned sprite_coord_mode,
164 const struct ilo_shader_state *fs)
165 {
166 const uint8_t cmd_len = 20;
167 uint32_t gen8_3dstate_sbe[4], gen8_3dstate_sbe_swiz[11];
168 uint32_t *dw;
169
170 ILO_DEV_ASSERT(builder->dev, 6, 6);
171
172 gen8_internal_3dstate_sbe(builder, Elements(gen8_3dstate_sbe),
173 gen8_3dstate_sbe, fs, sprite_coord_mode);
174 gen8_internal_3dstate_sbe_swiz(builder, Elements(gen8_3dstate_sbe_swiz),
175 gen8_3dstate_sbe_swiz, fs);
176
177 ilo_builder_batch_pointer(builder, cmd_len, &dw);
178
179 dw[0] = GEN6_RENDER_CMD(3D, 3DSTATE_SF) | (cmd_len - 2);
180 dw[1] = gen8_3dstate_sbe[1];
181
182 /* see raster_set_gen7_3DSTATE_SF() */
183 dw[2] = rs->sf[0];
184 dw[3] = rs->sf[1];
185 dw[4] = rs->sf[2];
186 dw[5] = rs->raster[1];
187 dw[6] = rs->raster[2];
188 dw[7] = rs->raster[3];
189
190 memcpy(&dw[8], &gen8_3dstate_sbe_swiz[1], sizeof(*dw) * 8);
191 dw[16] = gen8_3dstate_sbe[2];
192 dw[17] = gen8_3dstate_sbe[3];
193 dw[18] = gen8_3dstate_sbe_swiz[9];
194 dw[19] = gen8_3dstate_sbe_swiz[10];
195 }
196
197 static inline void
198 gen7_3DSTATE_SF(struct ilo_builder *builder,
199 const struct ilo_state_raster *rs)
200 {
201 const uint8_t cmd_len = (ilo_dev_gen(builder->dev) >= ILO_GEN(8)) ? 4 : 7;
202 uint32_t *dw;
203
204 ILO_DEV_ASSERT(builder->dev, 7, 8);
205
206 ilo_builder_batch_pointer(builder, cmd_len, &dw);
207
208 dw[0] = GEN6_RENDER_CMD(3D, 3DSTATE_SF) | (cmd_len - 2);
209
210 /* see raster_set_gen7_3DSTATE_SF() or raster_set_gen8_3DSTATE_SF() */
211 dw[1] = rs->sf[0];
212 dw[2] = rs->sf[1];
213 dw[3] = rs->sf[2];
214 if (ilo_dev_gen(builder->dev) < ILO_GEN(8)) {
215 dw[4] = rs->raster[1];
216 dw[5] = rs->raster[2];
217 dw[6] = rs->raster[3];
218 }
219 }
220
221 static inline void
222 gen7_3DSTATE_SBE(struct ilo_builder *builder,
223 const struct ilo_shader_state *fs,
224 int sprite_coord_mode)
225 {
226 const uint8_t cmd_len = 14;
227 uint32_t gen8_3dstate_sbe[4], gen8_3dstate_sbe_swiz[11];
228 uint32_t *dw;
229
230 ILO_DEV_ASSERT(builder->dev, 7, 7.5);
231
232 gen8_internal_3dstate_sbe(builder, Elements(gen8_3dstate_sbe),
233 gen8_3dstate_sbe, fs, sprite_coord_mode);
234 gen8_internal_3dstate_sbe_swiz(builder, Elements(gen8_3dstate_sbe_swiz),
235 gen8_3dstate_sbe_swiz, fs);
236
237 ilo_builder_batch_pointer(builder, cmd_len, &dw);
238
239 dw[0] = GEN7_RENDER_CMD(3D, 3DSTATE_SBE) | (cmd_len - 2);
240 dw[1] = gen8_3dstate_sbe[1];
241 memcpy(&dw[2], &gen8_3dstate_sbe_swiz[1], sizeof(*dw) * 8);
242 dw[10] = gen8_3dstate_sbe[2];
243 dw[11] = gen8_3dstate_sbe[3];
244 dw[12] = gen8_3dstate_sbe_swiz[9];
245 dw[13] = gen8_3dstate_sbe_swiz[10];
246 }
247
248 static inline void
249 gen8_3DSTATE_SBE(struct ilo_builder *builder,
250 const struct ilo_shader_state *fs,
251 int sprite_coord_mode)
252 {
253 const uint8_t cmd_len = 4;
254 uint32_t *dw;
255
256 ILO_DEV_ASSERT(builder->dev, 8, 8);
257
258 ilo_builder_batch_pointer(builder, cmd_len, &dw);
259
260 gen8_internal_3dstate_sbe(builder, cmd_len, dw, fs, sprite_coord_mode);
261 }
262
263 static inline void
264 gen8_3DSTATE_SBE_SWIZ(struct ilo_builder *builder,
265 const struct ilo_shader_state *fs)
266 {
267 const uint8_t cmd_len = 11;
268 uint32_t *dw;
269
270 ILO_DEV_ASSERT(builder->dev, 8, 8);
271
272 ilo_builder_batch_pointer(builder, cmd_len, &dw);
273
274 gen8_internal_3dstate_sbe_swiz(builder, cmd_len, dw, fs);
275 }
276
277 static inline void
278 gen8_3DSTATE_RASTER(struct ilo_builder *builder,
279 const struct ilo_state_raster *rs)
280 {
281 const uint8_t cmd_len = 5;
282 uint32_t *dw;
283
284 ILO_DEV_ASSERT(builder->dev, 8, 8);
285
286 ilo_builder_batch_pointer(builder, cmd_len, &dw);
287
288 dw[0] = GEN8_RENDER_CMD(3D, 3DSTATE_RASTER) | (cmd_len - 2);
289 /* see raster_set_gen8_3DSTATE_RASTER() */
290 dw[1] = rs->raster[0];
291 dw[2] = rs->raster[1];
292 dw[3] = rs->raster[2];
293 dw[4] = rs->raster[3];
294 }
295
296 static inline void
297 gen6_3DSTATE_WM(struct ilo_builder *builder,
298 const struct ilo_state_raster *rs,
299 const struct ilo_shader_state *fs,
300 bool dual_blend, bool cc_may_kill)
301 {
302 const uint8_t cmd_len = 9;
303 const bool multisample = false;
304 const int num_samples = 1;
305 uint32_t dw2, dw4, dw5, dw6, *dw;
306
307 ILO_DEV_ASSERT(builder->dev, 6, 6);
308
309 dw2 = 0;
310 /* see raster_set_gen6_3dstate_wm() */
311 dw4 = rs->raster[0];
312 dw5 = rs->raster[1];
313 dw6 = rs->raster[2];
314
315 if (fs) {
316 const struct ilo_shader_cso *cso;
317
318 cso = ilo_shader_get_kernel_cso(fs);
319 /* see fs_init_cso_gen6() */
320 dw2 |= cso->payload[0];
321 dw4 |= cso->payload[1];
322 dw5 |= cso->payload[2];
323 dw6 |= cso->payload[3];
324 } else {
325 const int max_threads = (builder->dev->gt == 2) ? 80 : 40;
326
327 /* honor the valid range even if dispatching is disabled */
328 dw5 |= (max_threads - 1) << GEN6_WM_DW5_MAX_THREADS__SHIFT;
329 }
330
331 if (cc_may_kill)
332 dw5 |= GEN6_WM_DW5_PS_KILL_PIXEL | GEN6_WM_DW5_PS_DISPATCH_ENABLE;
333
334 if (dual_blend)
335 dw5 |= GEN6_WM_DW5_PS_DUAL_SOURCE_BLEND;
336
337 if (multisample && num_samples > 1)
338 dw6 |= GEN6_WM_DW6_MSDISPMODE_PERPIXEL;
339
340 ilo_builder_batch_pointer(builder, cmd_len, &dw);
341
342 dw[0] = GEN6_RENDER_CMD(3D, 3DSTATE_WM) | (cmd_len - 2);
343 dw[1] = ilo_shader_get_kernel_offset(fs);
344 dw[2] = dw2;
345 dw[3] = 0; /* scratch */
346 dw[4] = dw4;
347 dw[5] = dw5;
348 dw[6] = dw6;
349 dw[7] = 0; /* kernel 1 */
350 dw[8] = 0; /* kernel 2 */
351 }
352
353 static inline void
354 gen7_3DSTATE_WM(struct ilo_builder *builder,
355 const struct ilo_state_raster *rs,
356 const struct ilo_shader_state *fs,
357 bool cc_may_kill)
358 {
359 const uint8_t cmd_len = 3;
360 const bool multisample = false;
361 const int num_samples = 1;
362 uint32_t dw1, dw2, *dw;
363
364 ILO_DEV_ASSERT(builder->dev, 7, 7.5);
365
366 /* see raster_set_gen8_3DSTATE_WM() */
367 dw1 = rs->wm[0];
368
369 if (fs) {
370 const struct ilo_shader_cso *cso;
371
372 cso = ilo_shader_get_kernel_cso(fs);
373 /* see fs_init_cso_gen7() */
374 dw1 |= cso->payload[3];
375 }
376
377 if (cc_may_kill)
378 dw1 |= GEN7_WM_DW1_PS_DISPATCH_ENABLE | GEN7_WM_DW1_PS_KILL_PIXEL;
379
380 dw2 = 0;
381 if (multisample && num_samples > 1)
382 dw2 |= GEN7_WM_DW2_MSDISPMODE_PERPIXEL;
383
384 ilo_builder_batch_pointer(builder, cmd_len, &dw);
385
386 dw[0] = GEN6_RENDER_CMD(3D, 3DSTATE_WM) | (cmd_len - 2);
387 dw[1] = dw1;
388 dw[2] = dw2;
389 }
390
391 static inline void
392 gen8_3DSTATE_WM(struct ilo_builder *builder,
393 const struct ilo_state_raster *rs)
394 {
395 const uint8_t cmd_len = 2;
396 uint32_t *dw;
397
398 ILO_DEV_ASSERT(builder->dev, 8, 8);
399
400 ilo_builder_batch_pointer(builder, cmd_len, &dw);
401
402 dw[0] = GEN6_RENDER_CMD(3D, 3DSTATE_WM) | (cmd_len - 2);
403 /* see raster_set_gen8_3DSTATE_WM() */
404 dw[1] = rs->wm[0];
405 }
406
407 static inline void
408 gen8_3DSTATE_WM_DEPTH_STENCIL(struct ilo_builder *builder,
409 const struct ilo_dsa_state *dsa)
410 {
411 const uint8_t cmd_len = 3;
412 uint32_t dw1, dw2, *dw;
413
414 ILO_DEV_ASSERT(builder->dev, 8, 8);
415
416 dw1 = dsa->payload[0];
417 dw2 = dsa->payload[1];
418
419 ilo_builder_batch_pointer(builder, cmd_len, &dw);
420
421 dw[0] = GEN8_RENDER_CMD(3D, 3DSTATE_WM_DEPTH_STENCIL) | (cmd_len - 2);
422 dw[1] = dw1;
423 dw[2] = dw2;
424 }
425
426 static inline void
427 gen8_3DSTATE_WM_HZ_OP(struct ilo_builder *builder,
428 const struct ilo_state_raster *rs,
429 uint16_t width, uint16_t height)
430 {
431 const uint8_t cmd_len = 5;
432 uint32_t *dw;
433
434 ILO_DEV_ASSERT(builder->dev, 8, 8);
435
436 ilo_builder_batch_pointer(builder, cmd_len, &dw);
437
438 dw[0] = GEN8_RENDER_CMD(3D, 3DSTATE_WM_HZ_OP) | (cmd_len - 2);
439 /* see raster_set_gen8_3dstate_wm_hz_op() */
440 dw[1] = rs->wm[1];
441 dw[2] = 0;
442 /* exclusive */
443 dw[3] = height << 16 | width;
444 dw[4] = rs->wm[2];
445 }
446
447 static inline void
448 gen8_disable_3DSTATE_WM_HZ_OP(struct ilo_builder *builder)
449 {
450 const uint8_t cmd_len = 5;
451 uint32_t *dw;
452
453 ILO_DEV_ASSERT(builder->dev, 8, 8);
454
455 ilo_builder_batch_pointer(builder, cmd_len, &dw);
456
457 dw[0] = GEN8_RENDER_CMD(3D, 3DSTATE_WM_HZ_OP) | (cmd_len - 2);
458 dw[1] = 0;
459 dw[2] = 0;
460 dw[3] = 0;
461 dw[4] = 0;
462 }
463
464 static inline void
465 gen8_3DSTATE_WM_CHROMAKEY(struct ilo_builder *builder)
466 {
467 const uint8_t cmd_len = 2;
468 uint32_t *dw;
469
470 ILO_DEV_ASSERT(builder->dev, 8, 8);
471
472 ilo_builder_batch_pointer(builder, cmd_len, &dw);
473
474 dw[0] = GEN8_RENDER_CMD(3D, 3DSTATE_WM_CHROMAKEY) | (cmd_len - 2);
475 dw[1] = 0;
476 }
477
478 static inline void
479 gen7_3DSTATE_PS(struct ilo_builder *builder,
480 const struct ilo_shader_state *fs,
481 bool dual_blend)
482 {
483 const uint8_t cmd_len = 8;
484 const struct ilo_shader_cso *cso;
485 uint32_t dw2, dw4, dw5, *dw;
486
487 ILO_DEV_ASSERT(builder->dev, 7, 7.5);
488
489 /* see fs_init_cso_gen7() */
490 cso = ilo_shader_get_kernel_cso(fs);
491 dw2 = cso->payload[0];
492 dw4 = cso->payload[1];
493 dw5 = cso->payload[2];
494
495 if (dual_blend)
496 dw4 |= GEN7_PS_DW4_DUAL_SOURCE_BLEND;
497
498 ilo_builder_batch_pointer(builder, cmd_len, &dw);
499
500 dw[0] = GEN7_RENDER_CMD(3D, 3DSTATE_PS) | (cmd_len - 2);
501 dw[1] = ilo_shader_get_kernel_offset(fs);
502 dw[2] = dw2;
503 dw[3] = 0; /* scratch */
504 dw[4] = dw4;
505 dw[5] = dw5;
506 dw[6] = 0; /* kernel 1 */
507 dw[7] = 0; /* kernel 2 */
508 }
509
510 static inline void
511 gen7_disable_3DSTATE_PS(struct ilo_builder *builder)
512 {
513 const uint8_t cmd_len = 8;
514 int max_threads;
515 uint32_t dw4, *dw;
516
517 ILO_DEV_ASSERT(builder->dev, 7, 7.5);
518
519 /* GPU hangs if none of the dispatch enable bits is set */
520 dw4 = GEN6_PS_DISPATCH_8 << GEN7_PS_DW4_DISPATCH_MODE__SHIFT;
521
522 /* see brwCreateContext() */
523 switch (ilo_dev_gen(builder->dev)) {
524 case ILO_GEN(7.5):
525 max_threads = (builder->dev->gt == 3) ? 408 :
526 (builder->dev->gt == 2) ? 204 : 102;
527 dw4 |= (max_threads - 1) << GEN75_PS_DW4_MAX_THREADS__SHIFT;
528 break;
529 case ILO_GEN(7):
530 default:
531 max_threads = (builder->dev->gt == 2) ? 172 : 48;
532 dw4 |= (max_threads - 1) << GEN7_PS_DW4_MAX_THREADS__SHIFT;
533 break;
534 }
535
536 ilo_builder_batch_pointer(builder, cmd_len, &dw);
537
538 dw[0] = GEN7_RENDER_CMD(3D, 3DSTATE_PS) | (cmd_len - 2);
539 dw[1] = 0;
540 dw[2] = 0;
541 dw[3] = 0;
542 dw[4] = dw4;
543 dw[5] = 0;
544 dw[6] = 0;
545 dw[7] = 0;
546 }
547
548 static inline void
549 gen8_3DSTATE_PS(struct ilo_builder *builder,
550 const struct ilo_shader_state *fs)
551 {
552 const uint8_t cmd_len = 12;
553 const struct ilo_shader_cso *cso;
554 uint32_t dw3, dw6, dw7, *dw;
555
556 ILO_DEV_ASSERT(builder->dev, 8, 8);
557
558 /* see fs_init_cso_gen8() */
559 cso = ilo_shader_get_kernel_cso(fs);
560 dw3 = cso->payload[0];
561 dw6 = cso->payload[1];
562 dw7 = cso->payload[2];
563
564 ilo_builder_batch_pointer(builder, cmd_len, &dw);
565
566 dw[0] = GEN7_RENDER_CMD(3D, 3DSTATE_PS) | (cmd_len - 2);
567 dw[1] = ilo_shader_get_kernel_offset(fs);
568 dw[2] = 0;
569 dw[3] = dw3;
570 dw[4] = 0; /* scratch */
571 dw[5] = 0;
572 dw[6] = dw6;
573 dw[7] = dw7;
574 dw[8] = 0; /* kernel 1 */
575 dw[9] = 0;
576 dw[10] = 0; /* kernel 2 */
577 dw[11] = 0;
578 }
579
580 static inline void
581 gen8_3DSTATE_PS_EXTRA(struct ilo_builder *builder,
582 const struct ilo_shader_state *fs,
583 bool cc_may_kill, bool per_sample)
584 {
585 const uint8_t cmd_len = 2;
586 const struct ilo_shader_cso *cso;
587 uint32_t dw1, *dw;
588
589 ILO_DEV_ASSERT(builder->dev, 8, 8);
590
591 /* see fs_init_cso_gen8() */
592 cso = ilo_shader_get_kernel_cso(fs);
593 dw1 = cso->payload[3];
594
595 if (cc_may_kill)
596 dw1 |= GEN8_PSX_DW1_VALID | GEN8_PSX_DW1_KILL_PIXEL;
597 if (per_sample)
598 dw1 |= GEN8_PSX_DW1_PER_SAMPLE;
599
600 ilo_builder_batch_pointer(builder, cmd_len, &dw);
601
602 dw[0] = GEN8_RENDER_CMD(3D, 3DSTATE_PS_EXTRA) | (cmd_len - 2);
603 dw[1] = dw1;
604 }
605
606 static inline void
607 gen8_3DSTATE_PS_BLEND(struct ilo_builder *builder,
608 const struct ilo_blend_state *blend,
609 const struct ilo_fb_state *fb,
610 const struct ilo_dsa_state *dsa)
611 {
612 const uint8_t cmd_len = 2;
613 uint32_t dw1, *dw;
614
615 ILO_DEV_ASSERT(builder->dev, 8, 8);
616
617 dw1 = 0;
618 if (blend->alpha_to_coverage && fb->num_samples > 1)
619 dw1 |= GEN8_PS_BLEND_DW1_ALPHA_TO_COVERAGE;
620
621 if (fb->state.nr_cbufs && fb->state.cbufs[0]) {
622 const struct ilo_fb_blend_caps *caps = &fb->blend_caps[0];
623
624 dw1 |= GEN8_PS_BLEND_DW1_WRITABLE_RT;
625 if (caps->can_blend) {
626 if (caps->dst_alpha_forced_one)
627 dw1 |= blend->dw_ps_blend_dst_alpha_forced_one;
628 else
629 dw1 |= blend->dw_ps_blend;
630 }
631
632 if (caps->can_alpha_test)
633 dw1 |= dsa->dw_ps_blend_alpha;
634 } else {
635 dw1 |= dsa->dw_ps_blend_alpha;
636 }
637
638 ilo_builder_batch_pointer(builder, cmd_len, &dw);
639
640 dw[0] = GEN8_RENDER_CMD(3D, 3DSTATE_PS_BLEND) | (cmd_len - 2);
641 dw[1] = dw1;
642 }
643
644 static inline void
645 gen6_3DSTATE_CONSTANT_PS(struct ilo_builder *builder,
646 const uint32_t *bufs, const int *sizes,
647 int num_bufs)
648 {
649 gen6_3dstate_constant(builder, GEN6_RENDER_OPCODE_3DSTATE_CONSTANT_PS,
650 bufs, sizes, num_bufs);
651 }
652
653 static inline void
654 gen7_3DSTATE_CONSTANT_PS(struct ilo_builder *builder,
655 const uint32_t *bufs, const int *sizes,
656 int num_bufs)
657 {
658 gen7_3dstate_constant(builder, GEN6_RENDER_OPCODE_3DSTATE_CONSTANT_PS,
659 bufs, sizes, num_bufs);
660 }
661
662 static inline void
663 gen7_3DSTATE_BINDING_TABLE_POINTERS_PS(struct ilo_builder *builder,
664 uint32_t binding_table)
665 {
666 ILO_DEV_ASSERT(builder->dev, 7, 8);
667
668 gen7_3dstate_pointer(builder,
669 GEN7_RENDER_OPCODE_3DSTATE_BINDING_TABLE_POINTERS_PS,
670 binding_table);
671 }
672
673 static inline void
674 gen7_3DSTATE_SAMPLER_STATE_POINTERS_PS(struct ilo_builder *builder,
675 uint32_t sampler_state)
676 {
677 ILO_DEV_ASSERT(builder->dev, 7, 8);
678
679 gen7_3dstate_pointer(builder,
680 GEN7_RENDER_OPCODE_3DSTATE_SAMPLER_STATE_POINTERS_PS,
681 sampler_state);
682 }
683
684 static inline void
685 gen6_3DSTATE_MULTISAMPLE(struct ilo_builder *builder,
686 const struct ilo_state_raster *rs,
687 const uint32_t *pattern, int pattern_len)
688 {
689 const uint8_t cmd_len = (ilo_dev_gen(builder->dev) >= ILO_GEN(7)) ? 4 : 3;
690 uint32_t *dw;
691
692 ILO_DEV_ASSERT(builder->dev, 6, 7.5);
693
694 ilo_builder_batch_pointer(builder, cmd_len, &dw);
695
696 dw[0] = GEN6_RENDER_CMD(3D, 3DSTATE_MULTISAMPLE) | (cmd_len - 2);
697 /* see raster_set_gen8_3DSTATE_MULTISAMPLE() */
698 dw[1] = rs->sample[0];
699
700 assert(pattern_len == 1 || pattern_len == 2);
701 dw[2] = pattern[0];
702 if (ilo_dev_gen(builder->dev) >= ILO_GEN(7))
703 dw[3] = (pattern_len == 2) ? pattern[1] : 0;
704 }
705
706 static inline void
707 gen8_3DSTATE_MULTISAMPLE(struct ilo_builder *builder,
708 const struct ilo_state_raster *rs)
709 {
710 const uint8_t cmd_len = 2;
711 uint32_t *dw;
712
713 ILO_DEV_ASSERT(builder->dev, 8, 8);
714
715 ilo_builder_batch_pointer(builder, cmd_len, &dw);
716
717 dw[0] = GEN8_RENDER_CMD(3D, 3DSTATE_MULTISAMPLE) | (cmd_len - 2);
718 /* see raster_set_gen8_3DSTATE_MULTISAMPLE() */
719 dw[1] = rs->sample[0];
720 }
721
722 static inline void
723 gen8_3DSTATE_SAMPLE_PATTERN(struct ilo_builder *builder,
724 const uint32_t *pattern_1x,
725 const uint32_t *pattern_2x,
726 const uint32_t *pattern_4x,
727 const uint32_t *pattern_8x,
728 const uint32_t *pattern_16x)
729 {
730 const uint8_t cmd_len = 9;
731 uint32_t *dw;
732
733 ILO_DEV_ASSERT(builder->dev, 8, 8);
734
735 ilo_builder_batch_pointer(builder, cmd_len, &dw);
736
737 dw[0] = GEN8_RENDER_CMD(3D, 3DSTATE_SAMPLE_PATTERN) | (cmd_len - 2);
738 dw[1] = pattern_16x[3];
739 dw[2] = pattern_16x[2];
740 dw[3] = pattern_16x[1];
741 dw[4] = pattern_16x[0];
742 dw[5] = pattern_8x[1];
743 dw[6] = pattern_8x[0];
744 dw[7] = pattern_4x[0];
745 dw[8] = pattern_1x[0] << 16 |
746 pattern_2x[0];
747 }
748
749 static inline void
750 gen6_3DSTATE_SAMPLE_MASK(struct ilo_builder *builder,
751 const struct ilo_state_raster *rs)
752 {
753 const uint8_t cmd_len = 2;
754 uint32_t *dw;
755
756 ILO_DEV_ASSERT(builder->dev, 6, 8);
757
758 ilo_builder_batch_pointer(builder, cmd_len, &dw);
759
760 dw[0] = GEN6_RENDER_CMD(3D, 3DSTATE_SAMPLE_MASK) | (cmd_len - 2);
761 /* see raster_set_gen6_3DSTATE_SAMPLE_MASK() */
762 dw[1] = rs->sample[1];
763 }
764
765 static inline void
766 gen6_3DSTATE_DRAWING_RECTANGLE(struct ilo_builder *builder,
767 unsigned x, unsigned y,
768 unsigned width, unsigned height)
769 {
770 const uint8_t cmd_len = 4;
771 unsigned xmax = x + width - 1;
772 unsigned ymax = y + height - 1;
773 unsigned rect_limit;
774 uint32_t *dw;
775
776 ILO_DEV_ASSERT(builder->dev, 6, 8);
777
778 if (ilo_dev_gen(builder->dev) >= ILO_GEN(7)) {
779 rect_limit = 16383;
780 }
781 else {
782 /*
783 * From the Sandy Bridge PRM, volume 2 part 1, page 230:
784 *
785 * "[DevSNB] Errata: This field (Clipped Drawing Rectangle Y Min)
786 * must be an even number"
787 */
788 assert(y % 2 == 0);
789
790 rect_limit = 8191;
791 }
792
793 if (x > rect_limit) x = rect_limit;
794 if (y > rect_limit) y = rect_limit;
795 if (xmax > rect_limit) xmax = rect_limit;
796 if (ymax > rect_limit) ymax = rect_limit;
797
798 ilo_builder_batch_pointer(builder, cmd_len, &dw);
799
800 dw[0] = GEN6_RENDER_CMD(3D, 3DSTATE_DRAWING_RECTANGLE) | (cmd_len - 2);
801 dw[1] = y << 16 | x;
802 dw[2] = ymax << 16 | xmax;
803 /*
804 * There is no need to set the origin. It is intended to support front
805 * buffer rendering.
806 */
807 dw[3] = 0;
808 }
809
810 static inline void
811 gen6_3DSTATE_POLY_STIPPLE_OFFSET(struct ilo_builder *builder,
812 int x_offset, int y_offset)
813 {
814 const uint8_t cmd_len = 2;
815 uint32_t *dw;
816
817 ILO_DEV_ASSERT(builder->dev, 6, 8);
818
819 assert(x_offset >= 0 && x_offset <= 31);
820 assert(y_offset >= 0 && y_offset <= 31);
821
822 ilo_builder_batch_pointer(builder, cmd_len, &dw);
823
824 dw[0] = GEN6_RENDER_CMD(3D, 3DSTATE_POLY_STIPPLE_OFFSET) | (cmd_len - 2);
825 dw[1] = x_offset << 8 | y_offset;
826 }
827
828 static inline void
829 gen6_3DSTATE_POLY_STIPPLE_PATTERN(struct ilo_builder *builder,
830 const struct pipe_poly_stipple *pattern)
831 {
832 const uint8_t cmd_len = 33;
833 uint32_t *dw;
834 int i;
835
836 ILO_DEV_ASSERT(builder->dev, 6, 8);
837
838 ilo_builder_batch_pointer(builder, cmd_len, &dw);
839
840 dw[0] = GEN6_RENDER_CMD(3D, 3DSTATE_POLY_STIPPLE_PATTERN) | (cmd_len - 2);
841 dw++;
842
843 STATIC_ASSERT(Elements(pattern->stipple) == 32);
844 for (i = 0; i < 32; i++)
845 dw[i] = pattern->stipple[i];
846 }
847
848 static inline void
849 gen6_3DSTATE_LINE_STIPPLE(struct ilo_builder *builder,
850 unsigned pattern, unsigned factor)
851 {
852 const uint8_t cmd_len = 3;
853 unsigned inverse;
854 uint32_t *dw;
855
856 ILO_DEV_ASSERT(builder->dev, 6, 8);
857
858 assert((pattern & 0xffff) == pattern);
859 assert(factor >= 1 && factor <= 256);
860
861 ilo_builder_batch_pointer(builder, cmd_len, &dw);
862
863 dw[0] = GEN6_RENDER_CMD(3D, 3DSTATE_LINE_STIPPLE) | (cmd_len - 2);
864 dw[1] = pattern;
865
866 if (ilo_dev_gen(builder->dev) >= ILO_GEN(7)) {
867 /* in U1.16 */
868 inverse = 65536 / factor;
869
870 dw[2] = inverse << GEN7_LINE_STIPPLE_DW2_INVERSE_REPEAT_COUNT__SHIFT |
871 factor;
872 }
873 else {
874 /* in U1.13 */
875 inverse = 8192 / factor;
876
877 dw[2] = inverse << GEN6_LINE_STIPPLE_DW2_INVERSE_REPEAT_COUNT__SHIFT |
878 factor;
879 }
880 }
881
882 static inline void
883 gen6_3DSTATE_AA_LINE_PARAMETERS(struct ilo_builder *builder)
884 {
885 const uint8_t cmd_len = 3;
886 const uint32_t dw[3] = {
887 GEN6_RENDER_CMD(3D, 3DSTATE_AA_LINE_PARAMETERS) | (cmd_len - 2),
888 0 << GEN6_AA_LINE_DW1_BIAS__SHIFT | 0,
889 0 << GEN6_AA_LINE_DW2_CAP_BIAS__SHIFT | 0,
890 };
891
892 ILO_DEV_ASSERT(builder->dev, 6, 8);
893
894 ilo_builder_batch_write(builder, cmd_len, dw);
895 }
896
897 static inline void
898 gen6_3DSTATE_DEPTH_BUFFER(struct ilo_builder *builder,
899 const struct ilo_state_zs *zs)
900 {
901 const uint32_t cmd = (ilo_dev_gen(builder->dev) >= ILO_GEN(7)) ?
902 GEN7_RENDER_CMD(3D, 3DSTATE_DEPTH_BUFFER) :
903 GEN6_RENDER_CMD(3D, 3DSTATE_DEPTH_BUFFER);
904 const uint8_t cmd_len = (ilo_dev_gen(builder->dev) >= ILO_GEN(8)) ? 8 : 7;
905 uint32_t *dw;
906 unsigned pos;
907
908 ILO_DEV_ASSERT(builder->dev, 6, 8);
909
910 pos = ilo_builder_batch_pointer(builder, cmd_len, &dw);
911
912 dw[0] = cmd | (cmd_len - 2);
913
914 /*
915 * see zs_set_gen6_3DSTATE_DEPTH_BUFFER() and
916 * zs_set_gen7_3DSTATE_DEPTH_BUFFER()
917 */
918 if (ilo_dev_gen(builder->dev) >= ILO_GEN(8)) {
919 dw[1] = zs->depth[0];
920 dw[2] = 0;
921 dw[3] = 0;
922 dw[4] = zs->depth[2];
923 dw[5] = zs->depth[3];
924 dw[6] = 0;
925 dw[7] = zs->depth[4];
926
927 dw[5] |= builder->mocs << GEN8_DEPTH_DW5_MOCS__SHIFT;
928
929 if (zs->depth_bo) {
930 ilo_builder_batch_reloc64(builder, pos + 2, zs->depth_bo,
931 zs->depth[1], (zs->z_readonly) ? 0 : INTEL_RELOC_WRITE);
932 }
933 } else {
934 dw[1] = zs->depth[0];
935 dw[2] = 0;
936 dw[3] = zs->depth[2];
937 dw[4] = zs->depth[3];
938 dw[5] = 0;
939 dw[6] = zs->depth[4];
940
941 if (ilo_dev_gen(builder->dev) >= ILO_GEN(7))
942 dw[4] |= builder->mocs << GEN7_DEPTH_DW4_MOCS__SHIFT;
943 else
944 dw[6] |= builder->mocs << GEN6_DEPTH_DW6_MOCS__SHIFT;
945
946 if (zs->depth_bo) {
947 ilo_builder_batch_reloc(builder, pos + 2, zs->depth_bo,
948 zs->depth[1], (zs->z_readonly) ? 0 : INTEL_RELOC_WRITE);
949 }
950 }
951 }
952
953 static inline void
954 gen6_3DSTATE_STENCIL_BUFFER(struct ilo_builder *builder,
955 const struct ilo_state_zs *zs)
956 {
957 const uint32_t cmd = (ilo_dev_gen(builder->dev) >= ILO_GEN(7)) ?
958 GEN7_RENDER_CMD(3D, 3DSTATE_STENCIL_BUFFER) :
959 GEN6_RENDER_CMD(3D, 3DSTATE_STENCIL_BUFFER);
960 const uint8_t cmd_len = (ilo_dev_gen(builder->dev) >= ILO_GEN(8)) ? 5 : 3;
961 uint32_t *dw;
962 unsigned pos;
963
964 ILO_DEV_ASSERT(builder->dev, 6, 8);
965
966 pos = ilo_builder_batch_pointer(builder, cmd_len, &dw);
967
968 dw[0] = cmd | (cmd_len - 2);
969
970 /* see zs_set_gen6_3DSTATE_STENCIL_BUFFER() */
971 if (ilo_dev_gen(builder->dev) >= ILO_GEN(8)) {
972 dw[1] = zs->stencil[0];
973 dw[2] = 0;
974 dw[3] = 0;
975 dw[4] = zs->stencil[2];
976
977 dw[1] |= builder->mocs << GEN8_STENCIL_DW1_MOCS__SHIFT;
978
979 if (zs->stencil_bo) {
980 ilo_builder_batch_reloc64(builder, pos + 2, zs->stencil_bo,
981 zs->stencil[1], (zs->s_readonly) ? 0 : INTEL_RELOC_WRITE);
982 }
983 } else {
984 dw[1] = zs->stencil[0];
985 dw[2] = 0;
986
987 dw[1] |= builder->mocs << GEN6_STENCIL_DW1_MOCS__SHIFT;
988
989 if (zs->stencil_bo) {
990 ilo_builder_batch_reloc(builder, pos + 2, zs->stencil_bo,
991 zs->stencil[1], (zs->s_readonly) ? 0 : INTEL_RELOC_WRITE);
992 }
993 }
994 }
995
996 static inline void
997 gen6_3DSTATE_HIER_DEPTH_BUFFER(struct ilo_builder *builder,
998 const struct ilo_state_zs *zs)
999 {
1000 const uint32_t cmd = (ilo_dev_gen(builder->dev) >= ILO_GEN(7)) ?
1001 GEN7_RENDER_CMD(3D, 3DSTATE_HIER_DEPTH_BUFFER) :
1002 GEN6_RENDER_CMD(3D, 3DSTATE_HIER_DEPTH_BUFFER);
1003 const uint8_t cmd_len = (ilo_dev_gen(builder->dev) >= ILO_GEN(8)) ? 5 : 3;
1004 uint32_t *dw;
1005 unsigned pos;
1006
1007 ILO_DEV_ASSERT(builder->dev, 6, 8);
1008
1009 pos = ilo_builder_batch_pointer(builder, cmd_len, &dw);
1010
1011 dw[0] = cmd | (cmd_len - 2);
1012
1013 /* see zs_set_gen6_3DSTATE_HIER_DEPTH_BUFFER() */
1014 if (ilo_dev_gen(builder->dev) >= ILO_GEN(8)) {
1015 dw[1] = zs->hiz[0];
1016 dw[2] = 0;
1017 dw[3] = 0;
1018 dw[4] = zs->hiz[2];
1019
1020 dw[1] |= builder->mocs << GEN8_HIZ_DW1_MOCS__SHIFT;
1021
1022 if (zs->hiz_bo) {
1023 ilo_builder_batch_reloc64(builder, pos + 2, zs->hiz_bo,
1024 zs->hiz[1], (zs->z_readonly) ? 0 : INTEL_RELOC_WRITE);
1025 }
1026 } else {
1027 dw[1] = zs->hiz[0];
1028 dw[2] = 0;
1029
1030 dw[1] |= builder->mocs << GEN6_HIZ_DW1_MOCS__SHIFT;
1031
1032 if (zs->hiz_bo) {
1033 ilo_builder_batch_reloc(builder, pos + 2, zs->hiz_bo,
1034 zs->hiz[1], (zs->z_readonly) ? 0 : INTEL_RELOC_WRITE);
1035 }
1036 }
1037 }
1038
1039 static inline void
1040 gen6_3DSTATE_CLEAR_PARAMS(struct ilo_builder *builder,
1041 uint32_t clear_val)
1042 {
1043 const uint8_t cmd_len = 2;
1044 uint32_t *dw;
1045
1046 ILO_DEV_ASSERT(builder->dev, 6, 6);
1047
1048 ilo_builder_batch_pointer(builder, cmd_len, &dw);
1049
1050 dw[0] = GEN6_RENDER_CMD(3D, 3DSTATE_CLEAR_PARAMS) |
1051 GEN6_CLEAR_PARAMS_DW0_VALID |
1052 (cmd_len - 2);
1053 dw[1] = clear_val;
1054 }
1055
1056 static inline void
1057 gen7_3DSTATE_CLEAR_PARAMS(struct ilo_builder *builder,
1058 uint32_t clear_val)
1059 {
1060 const uint8_t cmd_len = 3;
1061 uint32_t *dw;
1062
1063 ILO_DEV_ASSERT(builder->dev, 7, 8);
1064
1065 ilo_builder_batch_pointer(builder, cmd_len, &dw);
1066
1067 dw[0] = GEN7_RENDER_CMD(3D, 3DSTATE_CLEAR_PARAMS) | (cmd_len - 2);
1068 dw[1] = clear_val;
1069 dw[2] = GEN7_CLEAR_PARAMS_DW2_VALID;
1070 }
1071
1072 static inline void
1073 gen6_3DSTATE_VIEWPORT_STATE_POINTERS(struct ilo_builder *builder,
1074 uint32_t clip_viewport,
1075 uint32_t sf_viewport,
1076 uint32_t cc_viewport)
1077 {
1078 const uint8_t cmd_len = 4;
1079 uint32_t *dw;
1080
1081 ILO_DEV_ASSERT(builder->dev, 6, 6);
1082
1083 ilo_builder_batch_pointer(builder, cmd_len, &dw);
1084
1085 dw[0] = GEN6_RENDER_CMD(3D, 3DSTATE_VIEWPORT_STATE_POINTERS) |
1086 GEN6_VP_PTR_DW0_CLIP_CHANGED |
1087 GEN6_VP_PTR_DW0_SF_CHANGED |
1088 GEN6_VP_PTR_DW0_CC_CHANGED |
1089 (cmd_len - 2);
1090 dw[1] = clip_viewport;
1091 dw[2] = sf_viewport;
1092 dw[3] = cc_viewport;
1093 }
1094
1095 static inline void
1096 gen6_3DSTATE_SCISSOR_STATE_POINTERS(struct ilo_builder *builder,
1097 uint32_t scissor_rect)
1098 {
1099 const uint8_t cmd_len = 2;
1100 uint32_t *dw;
1101
1102 ILO_DEV_ASSERT(builder->dev, 6, 8);
1103
1104 ilo_builder_batch_pointer(builder, cmd_len, &dw);
1105
1106 dw[0] = GEN6_RENDER_CMD(3D, 3DSTATE_SCISSOR_STATE_POINTERS) |
1107 (cmd_len - 2);
1108 dw[1] = scissor_rect;
1109 }
1110
1111 static inline void
1112 gen6_3DSTATE_CC_STATE_POINTERS(struct ilo_builder *builder,
1113 uint32_t blend_state,
1114 uint32_t depth_stencil_state,
1115 uint32_t color_calc_state)
1116 {
1117 const uint8_t cmd_len = 4;
1118 uint32_t *dw;
1119
1120 ILO_DEV_ASSERT(builder->dev, 6, 6);
1121
1122 ilo_builder_batch_pointer(builder, cmd_len, &dw);
1123
1124 dw[0] = GEN6_RENDER_CMD(3D, 3DSTATE_CC_STATE_POINTERS) | (cmd_len - 2);
1125 dw[1] = blend_state | GEN6_CC_PTR_DW1_BLEND_CHANGED;
1126 dw[2] = depth_stencil_state | GEN6_CC_PTR_DW2_ZS_CHANGED;
1127 dw[3] = color_calc_state | GEN6_CC_PTR_DW3_CC_CHANGED;
1128 }
1129
1130 static inline void
1131 gen7_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP(struct ilo_builder *builder,
1132 uint32_t sf_clip_viewport)
1133 {
1134 ILO_DEV_ASSERT(builder->dev, 7, 8);
1135
1136 gen7_3dstate_pointer(builder,
1137 GEN7_RENDER_OPCODE_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP,
1138 sf_clip_viewport);
1139 }
1140
1141 static inline void
1142 gen7_3DSTATE_VIEWPORT_STATE_POINTERS_CC(struct ilo_builder *builder,
1143 uint32_t cc_viewport)
1144 {
1145 ILO_DEV_ASSERT(builder->dev, 7, 8);
1146
1147 gen7_3dstate_pointer(builder,
1148 GEN7_RENDER_OPCODE_3DSTATE_VIEWPORT_STATE_POINTERS_CC,
1149 cc_viewport);
1150 }
1151
1152 static inline void
1153 gen7_3DSTATE_CC_STATE_POINTERS(struct ilo_builder *builder,
1154 uint32_t color_calc_state)
1155 {
1156 ILO_DEV_ASSERT(builder->dev, 7, 8);
1157
1158 if (ilo_dev_gen(builder->dev) >= ILO_GEN(8))
1159 color_calc_state |= 1;
1160
1161 gen7_3dstate_pointer(builder,
1162 GEN6_RENDER_OPCODE_3DSTATE_CC_STATE_POINTERS, color_calc_state);
1163 }
1164
1165 static inline void
1166 gen7_3DSTATE_DEPTH_STENCIL_STATE_POINTERS(struct ilo_builder *builder,
1167 uint32_t depth_stencil_state)
1168 {
1169 ILO_DEV_ASSERT(builder->dev, 7, 8);
1170
1171 gen7_3dstate_pointer(builder,
1172 GEN7_RENDER_OPCODE_3DSTATE_DEPTH_STENCIL_STATE_POINTERS,
1173 depth_stencil_state);
1174 }
1175
1176 static inline void
1177 gen7_3DSTATE_BLEND_STATE_POINTERS(struct ilo_builder *builder,
1178 uint32_t blend_state)
1179 {
1180 ILO_DEV_ASSERT(builder->dev, 7, 8);
1181
1182 if (ilo_dev_gen(builder->dev) >= ILO_GEN(8))
1183 blend_state |= 1;
1184
1185 gen7_3dstate_pointer(builder,
1186 GEN7_RENDER_OPCODE_3DSTATE_BLEND_STATE_POINTERS,
1187 blend_state);
1188 }
1189
1190 static inline uint32_t
1191 gen6_CLIP_VIEWPORT(struct ilo_builder *builder,
1192 const struct ilo_state_viewport *vp)
1193 {
1194 const int state_align = 32;
1195 const int state_len = 4 * vp->count;
1196 uint32_t state_offset, *dw;
1197 int i;
1198
1199 ILO_DEV_ASSERT(builder->dev, 6, 6);
1200
1201 state_offset = ilo_builder_dynamic_pointer(builder,
1202 ILO_BUILDER_ITEM_CLIP_VIEWPORT, state_align, state_len, &dw);
1203
1204 for (i = 0; i < vp->count; i++) {
1205 /* see viewport_matrix_set_gen7_SF_CLIP_VIEWPORT() */
1206 dw[0] = vp->sf_clip[i][8];
1207 dw[1] = vp->sf_clip[i][9];
1208 dw[2] = vp->sf_clip[i][10];
1209 dw[3] = vp->sf_clip[i][11];
1210
1211 dw += 4;
1212 }
1213
1214 return state_offset;
1215 }
1216
1217 static inline uint32_t
1218 gen6_SF_VIEWPORT(struct ilo_builder *builder,
1219 const struct ilo_state_viewport *vp)
1220 {
1221 const int state_align = 32;
1222 const int state_len = 8 * vp->count;
1223 uint32_t state_offset, *dw;
1224 int i;
1225
1226 ILO_DEV_ASSERT(builder->dev, 6, 6);
1227
1228 state_offset = ilo_builder_dynamic_pointer(builder,
1229 ILO_BUILDER_ITEM_SF_VIEWPORT, state_align, state_len, &dw);
1230
1231 for (i = 0; i < vp->count; i++) {
1232 /* see viewport_matrix_set_gen7_SF_CLIP_VIEWPORT() */
1233 memcpy(dw, vp->sf_clip[i], sizeof(*dw) * 8);
1234
1235 dw += 8;
1236 }
1237
1238 return state_offset;
1239 }
1240
1241 static inline uint32_t
1242 gen7_SF_CLIP_VIEWPORT(struct ilo_builder *builder,
1243 const struct ilo_state_viewport *vp)
1244 {
1245 const int state_align = 64;
1246 const int state_len = 16 * vp->count;
1247
1248 ILO_DEV_ASSERT(builder->dev, 7, 8);
1249
1250 /* see viewport_matrix_set_gen7_SF_CLIP_VIEWPORT() */
1251 return ilo_builder_dynamic_write(builder, ILO_BUILDER_ITEM_SF_VIEWPORT,
1252 state_align, state_len, (const uint32_t *) vp->sf_clip);
1253 }
1254
1255 static inline uint32_t
1256 gen6_CC_VIEWPORT(struct ilo_builder *builder,
1257 const struct ilo_state_viewport *vp)
1258 {
1259 const int state_align = 32;
1260 const int state_len = 2 * vp->count;
1261
1262 ILO_DEV_ASSERT(builder->dev, 6, 8);
1263
1264 /* see viewport_matrix_set_gen6_CC_VIEWPORT() */
1265 return ilo_builder_dynamic_write(builder, ILO_BUILDER_ITEM_CC_VIEWPORT,
1266 state_align, state_len, (const uint32_t *) vp->cc);
1267 }
1268
1269 static inline uint32_t
1270 gen6_SCISSOR_RECT(struct ilo_builder *builder,
1271 const struct ilo_state_viewport *vp)
1272 {
1273 const int state_align = 32;
1274 const int state_len = 2 * vp->count;
1275
1276 ILO_DEV_ASSERT(builder->dev, 6, 8);
1277
1278 /* see viewport_scissor_set_gen6_SCISSOR_RECT() */
1279 return ilo_builder_dynamic_write(builder, ILO_BUILDER_ITEM_SCISSOR_RECT,
1280 state_align, state_len, (const uint32_t *) vp->scissor);
1281 }
1282
1283 static inline uint32_t
1284 gen6_COLOR_CALC_STATE(struct ilo_builder *builder,
1285 const struct pipe_stencil_ref *stencil_ref,
1286 ubyte alpha_ref,
1287 const struct pipe_blend_color *blend_color)
1288 {
1289 const int state_align = 64;
1290 const int state_len = 6;
1291 uint32_t state_offset, *dw;
1292
1293 ILO_DEV_ASSERT(builder->dev, 6, 8);
1294
1295 state_offset = ilo_builder_dynamic_pointer(builder,
1296 ILO_BUILDER_ITEM_COLOR_CALC, state_align, state_len, &dw);
1297
1298 dw[0] = stencil_ref->ref_value[0] << 24 |
1299 stencil_ref->ref_value[1] << 16 |
1300 GEN6_CC_DW0_ALPHATEST_UNORM8;
1301 dw[1] = alpha_ref;
1302 dw[2] = fui(blend_color->color[0]);
1303 dw[3] = fui(blend_color->color[1]);
1304 dw[4] = fui(blend_color->color[2]);
1305 dw[5] = fui(blend_color->color[3]);
1306
1307 return state_offset;
1308 }
1309
1310 static inline uint32_t
1311 gen6_DEPTH_STENCIL_STATE(struct ilo_builder *builder,
1312 const struct ilo_dsa_state *dsa)
1313 {
1314 const int state_align = 64;
1315 const int state_len = 3;
1316
1317 ILO_DEV_ASSERT(builder->dev, 6, 7.5);
1318
1319 STATIC_ASSERT(Elements(dsa->payload) >= state_len);
1320
1321 return ilo_builder_dynamic_write(builder, ILO_BUILDER_ITEM_DEPTH_STENCIL,
1322 state_align, state_len, dsa->payload);
1323 }
1324
1325 static inline uint32_t
1326 gen6_BLEND_STATE(struct ilo_builder *builder,
1327 const struct ilo_blend_state *blend,
1328 const struct ilo_fb_state *fb,
1329 const struct ilo_dsa_state *dsa)
1330 {
1331 const int state_align = 64;
1332 int state_len;
1333 uint32_t state_offset, *dw;
1334 unsigned num_targets, i;
1335
1336 ILO_DEV_ASSERT(builder->dev, 6, 7.5);
1337
1338 /*
1339 * From the Sandy Bridge PRM, volume 2 part 1, page 376:
1340 *
1341 * "The blend state is stored as an array of up to 8 elements..."
1342 */
1343 num_targets = fb->state.nr_cbufs;
1344 assert(num_targets <= 8);
1345
1346 if (!num_targets) {
1347 if (!dsa->dw_blend_alpha)
1348 return 0;
1349 /* to be able to reference alpha func */
1350 num_targets = 1;
1351 }
1352
1353 state_len = 2 * num_targets;
1354
1355 state_offset = ilo_builder_dynamic_pointer(builder,
1356 ILO_BUILDER_ITEM_BLEND, state_align, state_len, &dw);
1357
1358 for (i = 0; i < num_targets; i++) {
1359 const struct ilo_blend_cso *cso = &blend->cso[i];
1360
1361 dw[0] = cso->payload[0];
1362 dw[1] = cso->payload[1] | blend->dw_shared;
1363
1364 if (i < fb->state.nr_cbufs && fb->state.cbufs[i]) {
1365 const struct ilo_fb_blend_caps *caps = &fb->blend_caps[i];
1366
1367 if (caps->can_blend) {
1368 if (caps->dst_alpha_forced_one)
1369 dw[0] |= cso->dw_blend_dst_alpha_forced_one;
1370 else
1371 dw[0] |= cso->dw_blend;
1372 }
1373
1374 if (caps->can_logicop)
1375 dw[1] |= blend->dw_logicop;
1376
1377 if (caps->can_alpha_test)
1378 dw[1] |= dsa->dw_blend_alpha;
1379 } else {
1380 dw[1] |= GEN6_RT_DW1_WRITE_DISABLES_A |
1381 GEN6_RT_DW1_WRITE_DISABLES_R |
1382 GEN6_RT_DW1_WRITE_DISABLES_G |
1383 GEN6_RT_DW1_WRITE_DISABLES_B |
1384 dsa->dw_blend_alpha;
1385 }
1386
1387 /*
1388 * From the Sandy Bridge PRM, volume 2 part 1, page 356:
1389 *
1390 * "When NumSamples = 1, AlphaToCoverage and AlphaToCoverage
1391 * Dither both must be disabled."
1392 *
1393 * There is no such limitation on GEN7, or for AlphaToOne. But GL
1394 * requires that anyway.
1395 */
1396 if (fb->num_samples > 1)
1397 dw[1] |= blend->dw_alpha_mod;
1398
1399 dw += 2;
1400 }
1401
1402 return state_offset;
1403 }
1404
1405 static inline uint32_t
1406 gen8_BLEND_STATE(struct ilo_builder *builder,
1407 const struct ilo_blend_state *blend,
1408 const struct ilo_fb_state *fb,
1409 const struct ilo_dsa_state *dsa)
1410 {
1411 const int state_align = 64;
1412 const int state_len = 1 + 2 * fb->state.nr_cbufs;
1413 uint32_t state_offset, *dw;
1414 unsigned i;
1415
1416 ILO_DEV_ASSERT(builder->dev, 8, 8);
1417
1418 assert(fb->state.nr_cbufs <= 8);
1419
1420 state_offset = ilo_builder_dynamic_pointer(builder,
1421 ILO_BUILDER_ITEM_BLEND, state_align, state_len, &dw);
1422
1423 dw[0] = blend->dw_shared;
1424 if (fb->num_samples > 1)
1425 dw[0] |= blend->dw_alpha_mod;
1426 if (!fb->state.nr_cbufs || fb->blend_caps[0].can_alpha_test)
1427 dw[0] |= dsa->dw_blend_alpha;
1428 dw++;
1429
1430 for (i = 0; i < fb->state.nr_cbufs; i++) {
1431 const struct ilo_fb_blend_caps *caps = &fb->blend_caps[i];
1432 const struct ilo_blend_cso *cso = &blend->cso[i];
1433
1434 dw[0] = cso->payload[0];
1435 dw[1] = cso->payload[1];
1436
1437 if (fb->state.cbufs[i]) {
1438 if (caps->can_blend) {
1439 if (caps->dst_alpha_forced_one)
1440 dw[0] |= cso->dw_blend_dst_alpha_forced_one;
1441 else
1442 dw[0] |= cso->dw_blend;
1443 }
1444
1445 if (caps->can_logicop)
1446 dw[1] |= blend->dw_logicop;
1447 } else {
1448 dw[0] |= GEN8_RT_DW0_WRITE_DISABLES_A |
1449 GEN8_RT_DW0_WRITE_DISABLES_R |
1450 GEN8_RT_DW0_WRITE_DISABLES_G |
1451 GEN8_RT_DW0_WRITE_DISABLES_B;
1452 }
1453
1454 dw += 2;
1455 }
1456
1457 return state_offset;
1458 }
1459
1460 #endif /* ILO_BUILDER_3D_BOTTOM_H */