2 * Mesa 3-D graphics library
4 * Copyright (C) 2014 LunarG, Inc.
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice shall be included
14 * in all copies or substantial portions of the Software.
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
25 * Chia-I Wu <olv@lunarg.com>
28 #ifndef ILO_BUILDER_3D_BOTTOM_H
29 #define ILO_BUILDER_3D_BOTTOM_H
31 #include "genhw/genhw.h"
32 #include "../ilo_shader.h"
33 #include "intel_winsys.h"
37 #include "ilo_format.h"
38 #include "ilo_state_raster.h"
39 #include "ilo_state_viewport.h"
40 #include "ilo_builder.h"
41 #include "ilo_builder_3d_top.h"
44 gen6_3DSTATE_CLIP(struct ilo_builder
*builder
,
45 const struct ilo_state_raster
*rs
)
47 const uint8_t cmd_len
= 4;
50 ILO_DEV_ASSERT(builder
->dev
, 6, 8);
52 ilo_builder_batch_pointer(builder
, cmd_len
, &dw
);
54 dw
[0] = GEN6_RENDER_CMD(3D
, 3DSTATE_CLIP
) | (cmd_len
- 2);
55 /* see raster_set_gen6_3DSTATE_CLIP() */
62 gen8_internal_3dstate_sbe(struct ilo_builder
*builder
,
63 uint8_t cmd_len
, uint32_t *dw
,
64 const struct ilo_shader_state
*fs
,
65 int sprite_coord_mode
)
67 const struct ilo_kernel_routing
*routing
;
68 int vue_offset
, vue_len
, out_count
;
70 ILO_DEV_ASSERT(builder
->dev
, 6, 8);
74 dw
[0] = GEN7_RENDER_CMD(3D
, 3DSTATE_SBE
) | (cmd_len
- 2);
77 dw
[1] = 1 << GEN7_SBE_DW1_URB_READ_LEN__SHIFT
;
83 routing
= ilo_shader_get_kernel_routing(fs
);
85 vue_offset
= routing
->source_skip
;
86 assert(vue_offset
% 2 == 0);
89 vue_len
= (routing
->source_len
+ 1) / 2;
93 out_count
= ilo_shader_get_kernel_param(fs
, ILO_KERNEL_INPUT_COUNT
);
94 assert(out_count
<= 32);
96 dw
[1] = out_count
<< GEN7_SBE_DW1_ATTR_COUNT__SHIFT
|
97 vue_len
<< GEN7_SBE_DW1_URB_READ_LEN__SHIFT
;
99 if (ilo_dev_gen(builder
->dev
) >= ILO_GEN(8)) {
100 dw
[1] |= GEN8_SBE_DW1_USE_URB_READ_LEN
|
101 GEN8_SBE_DW1_USE_URB_READ_OFFSET
|
102 vue_offset
<< GEN8_SBE_DW1_URB_READ_OFFSET__SHIFT
;
104 dw
[1] |= vue_offset
<< GEN7_SBE_DW1_URB_READ_OFFSET__SHIFT
;
107 if (routing
->swizzle_enable
)
108 dw
[1] |= GEN7_SBE_DW1_ATTR_SWIZZLE_ENABLE
;
110 switch (sprite_coord_mode
) {
111 case PIPE_SPRITE_COORD_UPPER_LEFT
:
112 dw
[1] |= GEN7_SBE_DW1_POINT_SPRITE_TEXCOORD_UPPERLEFT
;
114 case PIPE_SPRITE_COORD_LOWER_LEFT
:
115 dw
[1] |= GEN7_SBE_DW1_POINT_SPRITE_TEXCOORD_LOWERLEFT
;
120 * From the Ivy Bridge PRM, volume 2 part 1, page 268:
122 * "This field (Point Sprite Texture Coordinate Enable) must be
123 * programmed to 0 when non-point primitives are rendered."
125 * TODO We do not check that yet.
127 dw
[2] = routing
->point_sprite_enable
;
129 dw
[3] = routing
->const_interp_enable
;
133 gen8_internal_3dstate_sbe_swiz(struct ilo_builder
*builder
,
134 uint8_t cmd_len
, uint32_t *dw
,
135 const struct ilo_shader_state
*fs
)
137 const struct ilo_kernel_routing
*routing
;
139 ILO_DEV_ASSERT(builder
->dev
, 6, 8);
141 assert(cmd_len
== 11);
143 dw
[0] = GEN8_RENDER_CMD(3D
, 3DSTATE_SBE_SWIZ
) | (cmd_len
- 2);
146 memset(&dw
[1], 0, sizeof(*dw
) * (cmd_len
- 1));
150 routing
= ilo_shader_get_kernel_routing(fs
);
152 STATIC_ASSERT(sizeof(routing
->swizzles
) >= sizeof(*dw
) * 8);
153 memcpy(&dw
[1], routing
->swizzles
, sizeof(*dw
) * 8);
155 /* WrapShortest enables */
161 gen6_3DSTATE_SF(struct ilo_builder
*builder
,
162 const struct ilo_state_raster
*rs
,
163 unsigned sprite_coord_mode
,
164 const struct ilo_shader_state
*fs
)
166 const uint8_t cmd_len
= 20;
167 uint32_t gen8_3dstate_sbe
[4], gen8_3dstate_sbe_swiz
[11];
170 ILO_DEV_ASSERT(builder
->dev
, 6, 6);
172 gen8_internal_3dstate_sbe(builder
, Elements(gen8_3dstate_sbe
),
173 gen8_3dstate_sbe
, fs
, sprite_coord_mode
);
174 gen8_internal_3dstate_sbe_swiz(builder
, Elements(gen8_3dstate_sbe_swiz
),
175 gen8_3dstate_sbe_swiz
, fs
);
177 ilo_builder_batch_pointer(builder
, cmd_len
, &dw
);
179 dw
[0] = GEN6_RENDER_CMD(3D
, 3DSTATE_SF
) | (cmd_len
- 2);
180 dw
[1] = gen8_3dstate_sbe
[1];
182 /* see raster_set_gen7_3DSTATE_SF() */
186 dw
[5] = rs
->raster
[1];
187 dw
[6] = rs
->raster
[2];
188 dw
[7] = rs
->raster
[3];
190 memcpy(&dw
[8], &gen8_3dstate_sbe_swiz
[1], sizeof(*dw
) * 8);
191 dw
[16] = gen8_3dstate_sbe
[2];
192 dw
[17] = gen8_3dstate_sbe
[3];
193 dw
[18] = gen8_3dstate_sbe_swiz
[9];
194 dw
[19] = gen8_3dstate_sbe_swiz
[10];
198 gen7_3DSTATE_SF(struct ilo_builder
*builder
,
199 const struct ilo_state_raster
*rs
)
201 const uint8_t cmd_len
= (ilo_dev_gen(builder
->dev
) >= ILO_GEN(8)) ? 4 : 7;
204 ILO_DEV_ASSERT(builder
->dev
, 7, 8);
206 ilo_builder_batch_pointer(builder
, cmd_len
, &dw
);
208 dw
[0] = GEN6_RENDER_CMD(3D
, 3DSTATE_SF
) | (cmd_len
- 2);
210 /* see raster_set_gen7_3DSTATE_SF() or raster_set_gen8_3DSTATE_SF() */
214 if (ilo_dev_gen(builder
->dev
) < ILO_GEN(8)) {
215 dw
[4] = rs
->raster
[1];
216 dw
[5] = rs
->raster
[2];
217 dw
[6] = rs
->raster
[3];
222 gen7_3DSTATE_SBE(struct ilo_builder
*builder
,
223 const struct ilo_shader_state
*fs
,
224 int sprite_coord_mode
)
226 const uint8_t cmd_len
= 14;
227 uint32_t gen8_3dstate_sbe
[4], gen8_3dstate_sbe_swiz
[11];
230 ILO_DEV_ASSERT(builder
->dev
, 7, 7.5);
232 gen8_internal_3dstate_sbe(builder
, Elements(gen8_3dstate_sbe
),
233 gen8_3dstate_sbe
, fs
, sprite_coord_mode
);
234 gen8_internal_3dstate_sbe_swiz(builder
, Elements(gen8_3dstate_sbe_swiz
),
235 gen8_3dstate_sbe_swiz
, fs
);
237 ilo_builder_batch_pointer(builder
, cmd_len
, &dw
);
239 dw
[0] = GEN7_RENDER_CMD(3D
, 3DSTATE_SBE
) | (cmd_len
- 2);
240 dw
[1] = gen8_3dstate_sbe
[1];
241 memcpy(&dw
[2], &gen8_3dstate_sbe_swiz
[1], sizeof(*dw
) * 8);
242 dw
[10] = gen8_3dstate_sbe
[2];
243 dw
[11] = gen8_3dstate_sbe
[3];
244 dw
[12] = gen8_3dstate_sbe_swiz
[9];
245 dw
[13] = gen8_3dstate_sbe_swiz
[10];
249 gen8_3DSTATE_SBE(struct ilo_builder
*builder
,
250 const struct ilo_shader_state
*fs
,
251 int sprite_coord_mode
)
253 const uint8_t cmd_len
= 4;
256 ILO_DEV_ASSERT(builder
->dev
, 8, 8);
258 ilo_builder_batch_pointer(builder
, cmd_len
, &dw
);
260 gen8_internal_3dstate_sbe(builder
, cmd_len
, dw
, fs
, sprite_coord_mode
);
264 gen8_3DSTATE_SBE_SWIZ(struct ilo_builder
*builder
,
265 const struct ilo_shader_state
*fs
)
267 const uint8_t cmd_len
= 11;
270 ILO_DEV_ASSERT(builder
->dev
, 8, 8);
272 ilo_builder_batch_pointer(builder
, cmd_len
, &dw
);
274 gen8_internal_3dstate_sbe_swiz(builder
, cmd_len
, dw
, fs
);
278 gen8_3DSTATE_RASTER(struct ilo_builder
*builder
,
279 const struct ilo_state_raster
*rs
)
281 const uint8_t cmd_len
= 5;
284 ILO_DEV_ASSERT(builder
->dev
, 8, 8);
286 ilo_builder_batch_pointer(builder
, cmd_len
, &dw
);
288 dw
[0] = GEN8_RENDER_CMD(3D
, 3DSTATE_RASTER
) | (cmd_len
- 2);
289 /* see raster_set_gen8_3DSTATE_RASTER() */
290 dw
[1] = rs
->raster
[0];
291 dw
[2] = rs
->raster
[1];
292 dw
[3] = rs
->raster
[2];
293 dw
[4] = rs
->raster
[3];
297 gen6_3DSTATE_WM(struct ilo_builder
*builder
,
298 const struct ilo_state_raster
*rs
,
299 const struct ilo_shader_state
*fs
,
300 bool dual_blend
, bool cc_may_kill
)
302 const uint8_t cmd_len
= 9;
303 const bool multisample
= false;
304 const int num_samples
= 1;
305 uint32_t dw2
, dw4
, dw5
, dw6
, *dw
;
307 ILO_DEV_ASSERT(builder
->dev
, 6, 6);
310 /* see raster_set_gen6_3dstate_wm() */
316 const struct ilo_shader_cso
*cso
;
318 cso
= ilo_shader_get_kernel_cso(fs
);
319 /* see fs_init_cso_gen6() */
320 dw2
|= cso
->payload
[0];
321 dw4
|= cso
->payload
[1];
322 dw5
|= cso
->payload
[2];
323 dw6
|= cso
->payload
[3];
325 const int max_threads
= (builder
->dev
->gt
== 2) ? 80 : 40;
327 /* honor the valid range even if dispatching is disabled */
328 dw5
|= (max_threads
- 1) << GEN6_WM_DW5_MAX_THREADS__SHIFT
;
332 dw5
|= GEN6_WM_DW5_PS_KILL_PIXEL
| GEN6_WM_DW5_PS_DISPATCH_ENABLE
;
335 dw5
|= GEN6_WM_DW5_PS_DUAL_SOURCE_BLEND
;
337 if (multisample
&& num_samples
> 1)
338 dw6
|= GEN6_WM_DW6_MSDISPMODE_PERPIXEL
;
340 ilo_builder_batch_pointer(builder
, cmd_len
, &dw
);
342 dw
[0] = GEN6_RENDER_CMD(3D
, 3DSTATE_WM
) | (cmd_len
- 2);
343 dw
[1] = ilo_shader_get_kernel_offset(fs
);
345 dw
[3] = 0; /* scratch */
349 dw
[7] = 0; /* kernel 1 */
350 dw
[8] = 0; /* kernel 2 */
354 gen7_3DSTATE_WM(struct ilo_builder
*builder
,
355 const struct ilo_state_raster
*rs
,
356 const struct ilo_shader_state
*fs
,
359 const uint8_t cmd_len
= 3;
360 const bool multisample
= false;
361 const int num_samples
= 1;
362 uint32_t dw1
, dw2
, *dw
;
364 ILO_DEV_ASSERT(builder
->dev
, 7, 7.5);
366 /* see raster_set_gen8_3DSTATE_WM() */
370 const struct ilo_shader_cso
*cso
;
372 cso
= ilo_shader_get_kernel_cso(fs
);
373 /* see fs_init_cso_gen7() */
374 dw1
|= cso
->payload
[3];
378 dw1
|= GEN7_WM_DW1_PS_DISPATCH_ENABLE
| GEN7_WM_DW1_PS_KILL_PIXEL
;
381 if (multisample
&& num_samples
> 1)
382 dw2
|= GEN7_WM_DW2_MSDISPMODE_PERPIXEL
;
384 ilo_builder_batch_pointer(builder
, cmd_len
, &dw
);
386 dw
[0] = GEN6_RENDER_CMD(3D
, 3DSTATE_WM
) | (cmd_len
- 2);
392 gen8_3DSTATE_WM(struct ilo_builder
*builder
,
393 const struct ilo_state_raster
*rs
)
395 const uint8_t cmd_len
= 2;
398 ILO_DEV_ASSERT(builder
->dev
, 8, 8);
400 ilo_builder_batch_pointer(builder
, cmd_len
, &dw
);
402 dw
[0] = GEN6_RENDER_CMD(3D
, 3DSTATE_WM
) | (cmd_len
- 2);
403 /* see raster_set_gen8_3DSTATE_WM() */
408 gen8_3DSTATE_WM_DEPTH_STENCIL(struct ilo_builder
*builder
,
409 const struct ilo_dsa_state
*dsa
)
411 const uint8_t cmd_len
= 3;
412 uint32_t dw1
, dw2
, *dw
;
414 ILO_DEV_ASSERT(builder
->dev
, 8, 8);
416 dw1
= dsa
->payload
[0];
417 dw2
= dsa
->payload
[1];
419 ilo_builder_batch_pointer(builder
, cmd_len
, &dw
);
421 dw
[0] = GEN8_RENDER_CMD(3D
, 3DSTATE_WM_DEPTH_STENCIL
) | (cmd_len
- 2);
427 gen8_3DSTATE_WM_HZ_OP(struct ilo_builder
*builder
,
428 const struct ilo_state_raster
*rs
,
429 uint16_t width
, uint16_t height
)
431 const uint8_t cmd_len
= 5;
434 ILO_DEV_ASSERT(builder
->dev
, 8, 8);
436 ilo_builder_batch_pointer(builder
, cmd_len
, &dw
);
438 dw
[0] = GEN8_RENDER_CMD(3D
, 3DSTATE_WM_HZ_OP
) | (cmd_len
- 2);
439 /* see raster_set_gen8_3dstate_wm_hz_op() */
443 dw
[3] = height
<< 16 | width
;
448 gen8_disable_3DSTATE_WM_HZ_OP(struct ilo_builder
*builder
)
450 const uint8_t cmd_len
= 5;
453 ILO_DEV_ASSERT(builder
->dev
, 8, 8);
455 ilo_builder_batch_pointer(builder
, cmd_len
, &dw
);
457 dw
[0] = GEN8_RENDER_CMD(3D
, 3DSTATE_WM_HZ_OP
) | (cmd_len
- 2);
465 gen8_3DSTATE_WM_CHROMAKEY(struct ilo_builder
*builder
)
467 const uint8_t cmd_len
= 2;
470 ILO_DEV_ASSERT(builder
->dev
, 8, 8);
472 ilo_builder_batch_pointer(builder
, cmd_len
, &dw
);
474 dw
[0] = GEN8_RENDER_CMD(3D
, 3DSTATE_WM_CHROMAKEY
) | (cmd_len
- 2);
479 gen7_3DSTATE_PS(struct ilo_builder
*builder
,
480 const struct ilo_shader_state
*fs
,
483 const uint8_t cmd_len
= 8;
484 const struct ilo_shader_cso
*cso
;
485 uint32_t dw2
, dw4
, dw5
, *dw
;
487 ILO_DEV_ASSERT(builder
->dev
, 7, 7.5);
489 /* see fs_init_cso_gen7() */
490 cso
= ilo_shader_get_kernel_cso(fs
);
491 dw2
= cso
->payload
[0];
492 dw4
= cso
->payload
[1];
493 dw5
= cso
->payload
[2];
496 dw4
|= GEN7_PS_DW4_DUAL_SOURCE_BLEND
;
498 ilo_builder_batch_pointer(builder
, cmd_len
, &dw
);
500 dw
[0] = GEN7_RENDER_CMD(3D
, 3DSTATE_PS
) | (cmd_len
- 2);
501 dw
[1] = ilo_shader_get_kernel_offset(fs
);
503 dw
[3] = 0; /* scratch */
506 dw
[6] = 0; /* kernel 1 */
507 dw
[7] = 0; /* kernel 2 */
511 gen7_disable_3DSTATE_PS(struct ilo_builder
*builder
)
513 const uint8_t cmd_len
= 8;
517 ILO_DEV_ASSERT(builder
->dev
, 7, 7.5);
519 /* GPU hangs if none of the dispatch enable bits is set */
520 dw4
= GEN6_PS_DISPATCH_8
<< GEN7_PS_DW4_DISPATCH_MODE__SHIFT
;
522 /* see brwCreateContext() */
523 switch (ilo_dev_gen(builder
->dev
)) {
525 max_threads
= (builder
->dev
->gt
== 3) ? 408 :
526 (builder
->dev
->gt
== 2) ? 204 : 102;
527 dw4
|= (max_threads
- 1) << GEN75_PS_DW4_MAX_THREADS__SHIFT
;
531 max_threads
= (builder
->dev
->gt
== 2) ? 172 : 48;
532 dw4
|= (max_threads
- 1) << GEN7_PS_DW4_MAX_THREADS__SHIFT
;
536 ilo_builder_batch_pointer(builder
, cmd_len
, &dw
);
538 dw
[0] = GEN7_RENDER_CMD(3D
, 3DSTATE_PS
) | (cmd_len
- 2);
549 gen8_3DSTATE_PS(struct ilo_builder
*builder
,
550 const struct ilo_shader_state
*fs
)
552 const uint8_t cmd_len
= 12;
553 const struct ilo_shader_cso
*cso
;
554 uint32_t dw3
, dw6
, dw7
, *dw
;
556 ILO_DEV_ASSERT(builder
->dev
, 8, 8);
558 /* see fs_init_cso_gen8() */
559 cso
= ilo_shader_get_kernel_cso(fs
);
560 dw3
= cso
->payload
[0];
561 dw6
= cso
->payload
[1];
562 dw7
= cso
->payload
[2];
564 ilo_builder_batch_pointer(builder
, cmd_len
, &dw
);
566 dw
[0] = GEN7_RENDER_CMD(3D
, 3DSTATE_PS
) | (cmd_len
- 2);
567 dw
[1] = ilo_shader_get_kernel_offset(fs
);
570 dw
[4] = 0; /* scratch */
574 dw
[8] = 0; /* kernel 1 */
576 dw
[10] = 0; /* kernel 2 */
581 gen8_3DSTATE_PS_EXTRA(struct ilo_builder
*builder
,
582 const struct ilo_shader_state
*fs
,
583 bool cc_may_kill
, bool per_sample
)
585 const uint8_t cmd_len
= 2;
586 const struct ilo_shader_cso
*cso
;
589 ILO_DEV_ASSERT(builder
->dev
, 8, 8);
591 /* see fs_init_cso_gen8() */
592 cso
= ilo_shader_get_kernel_cso(fs
);
593 dw1
= cso
->payload
[3];
596 dw1
|= GEN8_PSX_DW1_VALID
| GEN8_PSX_DW1_KILL_PIXEL
;
598 dw1
|= GEN8_PSX_DW1_PER_SAMPLE
;
600 ilo_builder_batch_pointer(builder
, cmd_len
, &dw
);
602 dw
[0] = GEN8_RENDER_CMD(3D
, 3DSTATE_PS_EXTRA
) | (cmd_len
- 2);
607 gen8_3DSTATE_PS_BLEND(struct ilo_builder
*builder
,
608 const struct ilo_blend_state
*blend
,
609 const struct ilo_fb_state
*fb
,
610 const struct ilo_dsa_state
*dsa
)
612 const uint8_t cmd_len
= 2;
615 ILO_DEV_ASSERT(builder
->dev
, 8, 8);
618 if (blend
->alpha_to_coverage
&& fb
->num_samples
> 1)
619 dw1
|= GEN8_PS_BLEND_DW1_ALPHA_TO_COVERAGE
;
621 if (fb
->state
.nr_cbufs
&& fb
->state
.cbufs
[0]) {
622 const struct ilo_fb_blend_caps
*caps
= &fb
->blend_caps
[0];
624 dw1
|= GEN8_PS_BLEND_DW1_WRITABLE_RT
;
625 if (caps
->can_blend
) {
626 if (caps
->dst_alpha_forced_one
)
627 dw1
|= blend
->dw_ps_blend_dst_alpha_forced_one
;
629 dw1
|= blend
->dw_ps_blend
;
632 if (caps
->can_alpha_test
)
633 dw1
|= dsa
->dw_ps_blend_alpha
;
635 dw1
|= dsa
->dw_ps_blend_alpha
;
638 ilo_builder_batch_pointer(builder
, cmd_len
, &dw
);
640 dw
[0] = GEN8_RENDER_CMD(3D
, 3DSTATE_PS_BLEND
) | (cmd_len
- 2);
645 gen6_3DSTATE_CONSTANT_PS(struct ilo_builder
*builder
,
646 const uint32_t *bufs
, const int *sizes
,
649 gen6_3dstate_constant(builder
, GEN6_RENDER_OPCODE_3DSTATE_CONSTANT_PS
,
650 bufs
, sizes
, num_bufs
);
654 gen7_3DSTATE_CONSTANT_PS(struct ilo_builder
*builder
,
655 const uint32_t *bufs
, const int *sizes
,
658 gen7_3dstate_constant(builder
, GEN6_RENDER_OPCODE_3DSTATE_CONSTANT_PS
,
659 bufs
, sizes
, num_bufs
);
663 gen7_3DSTATE_BINDING_TABLE_POINTERS_PS(struct ilo_builder
*builder
,
664 uint32_t binding_table
)
666 ILO_DEV_ASSERT(builder
->dev
, 7, 8);
668 gen7_3dstate_pointer(builder
,
669 GEN7_RENDER_OPCODE_3DSTATE_BINDING_TABLE_POINTERS_PS
,
674 gen7_3DSTATE_SAMPLER_STATE_POINTERS_PS(struct ilo_builder
*builder
,
675 uint32_t sampler_state
)
677 ILO_DEV_ASSERT(builder
->dev
, 7, 8);
679 gen7_3dstate_pointer(builder
,
680 GEN7_RENDER_OPCODE_3DSTATE_SAMPLER_STATE_POINTERS_PS
,
685 gen6_3DSTATE_MULTISAMPLE(struct ilo_builder
*builder
,
686 const struct ilo_state_raster
*rs
,
687 const uint32_t *pattern
, int pattern_len
)
689 const uint8_t cmd_len
= (ilo_dev_gen(builder
->dev
) >= ILO_GEN(7)) ? 4 : 3;
692 ILO_DEV_ASSERT(builder
->dev
, 6, 7.5);
694 ilo_builder_batch_pointer(builder
, cmd_len
, &dw
);
696 dw
[0] = GEN6_RENDER_CMD(3D
, 3DSTATE_MULTISAMPLE
) | (cmd_len
- 2);
697 /* see raster_set_gen8_3DSTATE_MULTISAMPLE() */
698 dw
[1] = rs
->sample
[0];
700 assert(pattern_len
== 1 || pattern_len
== 2);
702 if (ilo_dev_gen(builder
->dev
) >= ILO_GEN(7))
703 dw
[3] = (pattern_len
== 2) ? pattern
[1] : 0;
707 gen8_3DSTATE_MULTISAMPLE(struct ilo_builder
*builder
,
708 const struct ilo_state_raster
*rs
)
710 const uint8_t cmd_len
= 2;
713 ILO_DEV_ASSERT(builder
->dev
, 8, 8);
715 ilo_builder_batch_pointer(builder
, cmd_len
, &dw
);
717 dw
[0] = GEN8_RENDER_CMD(3D
, 3DSTATE_MULTISAMPLE
) | (cmd_len
- 2);
718 /* see raster_set_gen8_3DSTATE_MULTISAMPLE() */
719 dw
[1] = rs
->sample
[0];
723 gen8_3DSTATE_SAMPLE_PATTERN(struct ilo_builder
*builder
,
724 const uint32_t *pattern_1x
,
725 const uint32_t *pattern_2x
,
726 const uint32_t *pattern_4x
,
727 const uint32_t *pattern_8x
,
728 const uint32_t *pattern_16x
)
730 const uint8_t cmd_len
= 9;
733 ILO_DEV_ASSERT(builder
->dev
, 8, 8);
735 ilo_builder_batch_pointer(builder
, cmd_len
, &dw
);
737 dw
[0] = GEN8_RENDER_CMD(3D
, 3DSTATE_SAMPLE_PATTERN
) | (cmd_len
- 2);
738 dw
[1] = pattern_16x
[3];
739 dw
[2] = pattern_16x
[2];
740 dw
[3] = pattern_16x
[1];
741 dw
[4] = pattern_16x
[0];
742 dw
[5] = pattern_8x
[1];
743 dw
[6] = pattern_8x
[0];
744 dw
[7] = pattern_4x
[0];
745 dw
[8] = pattern_1x
[0] << 16 |
750 gen6_3DSTATE_SAMPLE_MASK(struct ilo_builder
*builder
,
751 const struct ilo_state_raster
*rs
)
753 const uint8_t cmd_len
= 2;
756 ILO_DEV_ASSERT(builder
->dev
, 6, 8);
758 ilo_builder_batch_pointer(builder
, cmd_len
, &dw
);
760 dw
[0] = GEN6_RENDER_CMD(3D
, 3DSTATE_SAMPLE_MASK
) | (cmd_len
- 2);
761 /* see raster_set_gen6_3DSTATE_SAMPLE_MASK() */
762 dw
[1] = rs
->sample
[1];
766 gen6_3DSTATE_DRAWING_RECTANGLE(struct ilo_builder
*builder
,
767 unsigned x
, unsigned y
,
768 unsigned width
, unsigned height
)
770 const uint8_t cmd_len
= 4;
771 unsigned xmax
= x
+ width
- 1;
772 unsigned ymax
= y
+ height
- 1;
776 ILO_DEV_ASSERT(builder
->dev
, 6, 8);
778 if (ilo_dev_gen(builder
->dev
) >= ILO_GEN(7)) {
783 * From the Sandy Bridge PRM, volume 2 part 1, page 230:
785 * "[DevSNB] Errata: This field (Clipped Drawing Rectangle Y Min)
786 * must be an even number"
793 if (x
> rect_limit
) x
= rect_limit
;
794 if (y
> rect_limit
) y
= rect_limit
;
795 if (xmax
> rect_limit
) xmax
= rect_limit
;
796 if (ymax
> rect_limit
) ymax
= rect_limit
;
798 ilo_builder_batch_pointer(builder
, cmd_len
, &dw
);
800 dw
[0] = GEN6_RENDER_CMD(3D
, 3DSTATE_DRAWING_RECTANGLE
) | (cmd_len
- 2);
802 dw
[2] = ymax
<< 16 | xmax
;
804 * There is no need to set the origin. It is intended to support front
811 gen6_3DSTATE_POLY_STIPPLE_OFFSET(struct ilo_builder
*builder
,
812 int x_offset
, int y_offset
)
814 const uint8_t cmd_len
= 2;
817 ILO_DEV_ASSERT(builder
->dev
, 6, 8);
819 assert(x_offset
>= 0 && x_offset
<= 31);
820 assert(y_offset
>= 0 && y_offset
<= 31);
822 ilo_builder_batch_pointer(builder
, cmd_len
, &dw
);
824 dw
[0] = GEN6_RENDER_CMD(3D
, 3DSTATE_POLY_STIPPLE_OFFSET
) | (cmd_len
- 2);
825 dw
[1] = x_offset
<< 8 | y_offset
;
829 gen6_3DSTATE_POLY_STIPPLE_PATTERN(struct ilo_builder
*builder
,
830 const struct pipe_poly_stipple
*pattern
)
832 const uint8_t cmd_len
= 33;
836 ILO_DEV_ASSERT(builder
->dev
, 6, 8);
838 ilo_builder_batch_pointer(builder
, cmd_len
, &dw
);
840 dw
[0] = GEN6_RENDER_CMD(3D
, 3DSTATE_POLY_STIPPLE_PATTERN
) | (cmd_len
- 2);
843 STATIC_ASSERT(Elements(pattern
->stipple
) == 32);
844 for (i
= 0; i
< 32; i
++)
845 dw
[i
] = pattern
->stipple
[i
];
849 gen6_3DSTATE_LINE_STIPPLE(struct ilo_builder
*builder
,
850 unsigned pattern
, unsigned factor
)
852 const uint8_t cmd_len
= 3;
856 ILO_DEV_ASSERT(builder
->dev
, 6, 8);
858 assert((pattern
& 0xffff) == pattern
);
859 assert(factor
>= 1 && factor
<= 256);
861 ilo_builder_batch_pointer(builder
, cmd_len
, &dw
);
863 dw
[0] = GEN6_RENDER_CMD(3D
, 3DSTATE_LINE_STIPPLE
) | (cmd_len
- 2);
866 if (ilo_dev_gen(builder
->dev
) >= ILO_GEN(7)) {
868 inverse
= 65536 / factor
;
870 dw
[2] = inverse
<< GEN7_LINE_STIPPLE_DW2_INVERSE_REPEAT_COUNT__SHIFT
|
875 inverse
= 8192 / factor
;
877 dw
[2] = inverse
<< GEN6_LINE_STIPPLE_DW2_INVERSE_REPEAT_COUNT__SHIFT
|
883 gen6_3DSTATE_AA_LINE_PARAMETERS(struct ilo_builder
*builder
)
885 const uint8_t cmd_len
= 3;
886 const uint32_t dw
[3] = {
887 GEN6_RENDER_CMD(3D
, 3DSTATE_AA_LINE_PARAMETERS
) | (cmd_len
- 2),
888 0 << GEN6_AA_LINE_DW1_BIAS__SHIFT
| 0,
889 0 << GEN6_AA_LINE_DW2_CAP_BIAS__SHIFT
| 0,
892 ILO_DEV_ASSERT(builder
->dev
, 6, 8);
894 ilo_builder_batch_write(builder
, cmd_len
, dw
);
898 gen6_3DSTATE_DEPTH_BUFFER(struct ilo_builder
*builder
,
899 const struct ilo_state_zs
*zs
)
901 const uint32_t cmd
= (ilo_dev_gen(builder
->dev
) >= ILO_GEN(7)) ?
902 GEN7_RENDER_CMD(3D
, 3DSTATE_DEPTH_BUFFER
) :
903 GEN6_RENDER_CMD(3D
, 3DSTATE_DEPTH_BUFFER
);
904 const uint8_t cmd_len
= (ilo_dev_gen(builder
->dev
) >= ILO_GEN(8)) ? 8 : 7;
908 ILO_DEV_ASSERT(builder
->dev
, 6, 8);
910 pos
= ilo_builder_batch_pointer(builder
, cmd_len
, &dw
);
912 dw
[0] = cmd
| (cmd_len
- 2);
915 * see zs_set_gen6_3DSTATE_DEPTH_BUFFER() and
916 * zs_set_gen7_3DSTATE_DEPTH_BUFFER()
918 if (ilo_dev_gen(builder
->dev
) >= ILO_GEN(8)) {
919 dw
[1] = zs
->depth
[0];
922 dw
[4] = zs
->depth
[2];
923 dw
[5] = zs
->depth
[3];
925 dw
[7] = zs
->depth
[4];
927 dw
[5] |= builder
->mocs
<< GEN8_DEPTH_DW5_MOCS__SHIFT
;
930 ilo_builder_batch_reloc64(builder
, pos
+ 2, zs
->depth_bo
,
931 zs
->depth
[1], (zs
->z_readonly
) ? 0 : INTEL_RELOC_WRITE
);
934 dw
[1] = zs
->depth
[0];
936 dw
[3] = zs
->depth
[2];
937 dw
[4] = zs
->depth
[3];
939 dw
[6] = zs
->depth
[4];
941 if (ilo_dev_gen(builder
->dev
) >= ILO_GEN(7))
942 dw
[4] |= builder
->mocs
<< GEN7_DEPTH_DW4_MOCS__SHIFT
;
944 dw
[6] |= builder
->mocs
<< GEN6_DEPTH_DW6_MOCS__SHIFT
;
947 ilo_builder_batch_reloc(builder
, pos
+ 2, zs
->depth_bo
,
948 zs
->depth
[1], (zs
->z_readonly
) ? 0 : INTEL_RELOC_WRITE
);
954 gen6_3DSTATE_STENCIL_BUFFER(struct ilo_builder
*builder
,
955 const struct ilo_state_zs
*zs
)
957 const uint32_t cmd
= (ilo_dev_gen(builder
->dev
) >= ILO_GEN(7)) ?
958 GEN7_RENDER_CMD(3D
, 3DSTATE_STENCIL_BUFFER
) :
959 GEN6_RENDER_CMD(3D
, 3DSTATE_STENCIL_BUFFER
);
960 const uint8_t cmd_len
= (ilo_dev_gen(builder
->dev
) >= ILO_GEN(8)) ? 5 : 3;
964 ILO_DEV_ASSERT(builder
->dev
, 6, 8);
966 pos
= ilo_builder_batch_pointer(builder
, cmd_len
, &dw
);
968 dw
[0] = cmd
| (cmd_len
- 2);
970 /* see zs_set_gen6_3DSTATE_STENCIL_BUFFER() */
971 if (ilo_dev_gen(builder
->dev
) >= ILO_GEN(8)) {
972 dw
[1] = zs
->stencil
[0];
975 dw
[4] = zs
->stencil
[2];
977 dw
[1] |= builder
->mocs
<< GEN8_STENCIL_DW1_MOCS__SHIFT
;
979 if (zs
->stencil_bo
) {
980 ilo_builder_batch_reloc64(builder
, pos
+ 2, zs
->stencil_bo
,
981 zs
->stencil
[1], (zs
->s_readonly
) ? 0 : INTEL_RELOC_WRITE
);
984 dw
[1] = zs
->stencil
[0];
987 dw
[1] |= builder
->mocs
<< GEN6_STENCIL_DW1_MOCS__SHIFT
;
989 if (zs
->stencil_bo
) {
990 ilo_builder_batch_reloc(builder
, pos
+ 2, zs
->stencil_bo
,
991 zs
->stencil
[1], (zs
->s_readonly
) ? 0 : INTEL_RELOC_WRITE
);
997 gen6_3DSTATE_HIER_DEPTH_BUFFER(struct ilo_builder
*builder
,
998 const struct ilo_state_zs
*zs
)
1000 const uint32_t cmd
= (ilo_dev_gen(builder
->dev
) >= ILO_GEN(7)) ?
1001 GEN7_RENDER_CMD(3D
, 3DSTATE_HIER_DEPTH_BUFFER
) :
1002 GEN6_RENDER_CMD(3D
, 3DSTATE_HIER_DEPTH_BUFFER
);
1003 const uint8_t cmd_len
= (ilo_dev_gen(builder
->dev
) >= ILO_GEN(8)) ? 5 : 3;
1007 ILO_DEV_ASSERT(builder
->dev
, 6, 8);
1009 pos
= ilo_builder_batch_pointer(builder
, cmd_len
, &dw
);
1011 dw
[0] = cmd
| (cmd_len
- 2);
1013 /* see zs_set_gen6_3DSTATE_HIER_DEPTH_BUFFER() */
1014 if (ilo_dev_gen(builder
->dev
) >= ILO_GEN(8)) {
1020 dw
[1] |= builder
->mocs
<< GEN8_HIZ_DW1_MOCS__SHIFT
;
1023 ilo_builder_batch_reloc64(builder
, pos
+ 2, zs
->hiz_bo
,
1024 zs
->hiz
[1], (zs
->z_readonly
) ? 0 : INTEL_RELOC_WRITE
);
1030 dw
[1] |= builder
->mocs
<< GEN6_HIZ_DW1_MOCS__SHIFT
;
1033 ilo_builder_batch_reloc(builder
, pos
+ 2, zs
->hiz_bo
,
1034 zs
->hiz
[1], (zs
->z_readonly
) ? 0 : INTEL_RELOC_WRITE
);
1040 gen6_3DSTATE_CLEAR_PARAMS(struct ilo_builder
*builder
,
1043 const uint8_t cmd_len
= 2;
1046 ILO_DEV_ASSERT(builder
->dev
, 6, 6);
1048 ilo_builder_batch_pointer(builder
, cmd_len
, &dw
);
1050 dw
[0] = GEN6_RENDER_CMD(3D
, 3DSTATE_CLEAR_PARAMS
) |
1051 GEN6_CLEAR_PARAMS_DW0_VALID
|
1057 gen7_3DSTATE_CLEAR_PARAMS(struct ilo_builder
*builder
,
1060 const uint8_t cmd_len
= 3;
1063 ILO_DEV_ASSERT(builder
->dev
, 7, 8);
1065 ilo_builder_batch_pointer(builder
, cmd_len
, &dw
);
1067 dw
[0] = GEN7_RENDER_CMD(3D
, 3DSTATE_CLEAR_PARAMS
) | (cmd_len
- 2);
1069 dw
[2] = GEN7_CLEAR_PARAMS_DW2_VALID
;
1073 gen6_3DSTATE_VIEWPORT_STATE_POINTERS(struct ilo_builder
*builder
,
1074 uint32_t clip_viewport
,
1075 uint32_t sf_viewport
,
1076 uint32_t cc_viewport
)
1078 const uint8_t cmd_len
= 4;
1081 ILO_DEV_ASSERT(builder
->dev
, 6, 6);
1083 ilo_builder_batch_pointer(builder
, cmd_len
, &dw
);
1085 dw
[0] = GEN6_RENDER_CMD(3D
, 3DSTATE_VIEWPORT_STATE_POINTERS
) |
1086 GEN6_VP_PTR_DW0_CLIP_CHANGED
|
1087 GEN6_VP_PTR_DW0_SF_CHANGED
|
1088 GEN6_VP_PTR_DW0_CC_CHANGED
|
1090 dw
[1] = clip_viewport
;
1091 dw
[2] = sf_viewport
;
1092 dw
[3] = cc_viewport
;
1096 gen6_3DSTATE_SCISSOR_STATE_POINTERS(struct ilo_builder
*builder
,
1097 uint32_t scissor_rect
)
1099 const uint8_t cmd_len
= 2;
1102 ILO_DEV_ASSERT(builder
->dev
, 6, 8);
1104 ilo_builder_batch_pointer(builder
, cmd_len
, &dw
);
1106 dw
[0] = GEN6_RENDER_CMD(3D
, 3DSTATE_SCISSOR_STATE_POINTERS
) |
1108 dw
[1] = scissor_rect
;
1112 gen6_3DSTATE_CC_STATE_POINTERS(struct ilo_builder
*builder
,
1113 uint32_t blend_state
,
1114 uint32_t depth_stencil_state
,
1115 uint32_t color_calc_state
)
1117 const uint8_t cmd_len
= 4;
1120 ILO_DEV_ASSERT(builder
->dev
, 6, 6);
1122 ilo_builder_batch_pointer(builder
, cmd_len
, &dw
);
1124 dw
[0] = GEN6_RENDER_CMD(3D
, 3DSTATE_CC_STATE_POINTERS
) | (cmd_len
- 2);
1125 dw
[1] = blend_state
| GEN6_CC_PTR_DW1_BLEND_CHANGED
;
1126 dw
[2] = depth_stencil_state
| GEN6_CC_PTR_DW2_ZS_CHANGED
;
1127 dw
[3] = color_calc_state
| GEN6_CC_PTR_DW3_CC_CHANGED
;
1131 gen7_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP(struct ilo_builder
*builder
,
1132 uint32_t sf_clip_viewport
)
1134 ILO_DEV_ASSERT(builder
->dev
, 7, 8);
1136 gen7_3dstate_pointer(builder
,
1137 GEN7_RENDER_OPCODE_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP
,
1142 gen7_3DSTATE_VIEWPORT_STATE_POINTERS_CC(struct ilo_builder
*builder
,
1143 uint32_t cc_viewport
)
1145 ILO_DEV_ASSERT(builder
->dev
, 7, 8);
1147 gen7_3dstate_pointer(builder
,
1148 GEN7_RENDER_OPCODE_3DSTATE_VIEWPORT_STATE_POINTERS_CC
,
1153 gen7_3DSTATE_CC_STATE_POINTERS(struct ilo_builder
*builder
,
1154 uint32_t color_calc_state
)
1156 ILO_DEV_ASSERT(builder
->dev
, 7, 8);
1158 if (ilo_dev_gen(builder
->dev
) >= ILO_GEN(8))
1159 color_calc_state
|= 1;
1161 gen7_3dstate_pointer(builder
,
1162 GEN6_RENDER_OPCODE_3DSTATE_CC_STATE_POINTERS
, color_calc_state
);
1166 gen7_3DSTATE_DEPTH_STENCIL_STATE_POINTERS(struct ilo_builder
*builder
,
1167 uint32_t depth_stencil_state
)
1169 ILO_DEV_ASSERT(builder
->dev
, 7, 8);
1171 gen7_3dstate_pointer(builder
,
1172 GEN7_RENDER_OPCODE_3DSTATE_DEPTH_STENCIL_STATE_POINTERS
,
1173 depth_stencil_state
);
1177 gen7_3DSTATE_BLEND_STATE_POINTERS(struct ilo_builder
*builder
,
1178 uint32_t blend_state
)
1180 ILO_DEV_ASSERT(builder
->dev
, 7, 8);
1182 if (ilo_dev_gen(builder
->dev
) >= ILO_GEN(8))
1185 gen7_3dstate_pointer(builder
,
1186 GEN7_RENDER_OPCODE_3DSTATE_BLEND_STATE_POINTERS
,
1190 static inline uint32_t
1191 gen6_CLIP_VIEWPORT(struct ilo_builder
*builder
,
1192 const struct ilo_state_viewport
*vp
)
1194 const int state_align
= 32;
1195 const int state_len
= 4 * vp
->count
;
1196 uint32_t state_offset
, *dw
;
1199 ILO_DEV_ASSERT(builder
->dev
, 6, 6);
1201 state_offset
= ilo_builder_dynamic_pointer(builder
,
1202 ILO_BUILDER_ITEM_CLIP_VIEWPORT
, state_align
, state_len
, &dw
);
1204 for (i
= 0; i
< vp
->count
; i
++) {
1205 /* see viewport_matrix_set_gen7_SF_CLIP_VIEWPORT() */
1206 dw
[0] = vp
->sf_clip
[i
][8];
1207 dw
[1] = vp
->sf_clip
[i
][9];
1208 dw
[2] = vp
->sf_clip
[i
][10];
1209 dw
[3] = vp
->sf_clip
[i
][11];
1214 return state_offset
;
1217 static inline uint32_t
1218 gen6_SF_VIEWPORT(struct ilo_builder
*builder
,
1219 const struct ilo_state_viewport
*vp
)
1221 const int state_align
= 32;
1222 const int state_len
= 8 * vp
->count
;
1223 uint32_t state_offset
, *dw
;
1226 ILO_DEV_ASSERT(builder
->dev
, 6, 6);
1228 state_offset
= ilo_builder_dynamic_pointer(builder
,
1229 ILO_BUILDER_ITEM_SF_VIEWPORT
, state_align
, state_len
, &dw
);
1231 for (i
= 0; i
< vp
->count
; i
++) {
1232 /* see viewport_matrix_set_gen7_SF_CLIP_VIEWPORT() */
1233 memcpy(dw
, vp
->sf_clip
[i
], sizeof(*dw
) * 8);
1238 return state_offset
;
1241 static inline uint32_t
1242 gen7_SF_CLIP_VIEWPORT(struct ilo_builder
*builder
,
1243 const struct ilo_state_viewport
*vp
)
1245 const int state_align
= 64;
1246 const int state_len
= 16 * vp
->count
;
1248 ILO_DEV_ASSERT(builder
->dev
, 7, 8);
1250 /* see viewport_matrix_set_gen7_SF_CLIP_VIEWPORT() */
1251 return ilo_builder_dynamic_write(builder
, ILO_BUILDER_ITEM_SF_VIEWPORT
,
1252 state_align
, state_len
, (const uint32_t *) vp
->sf_clip
);
1255 static inline uint32_t
1256 gen6_CC_VIEWPORT(struct ilo_builder
*builder
,
1257 const struct ilo_state_viewport
*vp
)
1259 const int state_align
= 32;
1260 const int state_len
= 2 * vp
->count
;
1262 ILO_DEV_ASSERT(builder
->dev
, 6, 8);
1264 /* see viewport_matrix_set_gen6_CC_VIEWPORT() */
1265 return ilo_builder_dynamic_write(builder
, ILO_BUILDER_ITEM_CC_VIEWPORT
,
1266 state_align
, state_len
, (const uint32_t *) vp
->cc
);
1269 static inline uint32_t
1270 gen6_SCISSOR_RECT(struct ilo_builder
*builder
,
1271 const struct ilo_state_viewport
*vp
)
1273 const int state_align
= 32;
1274 const int state_len
= 2 * vp
->count
;
1276 ILO_DEV_ASSERT(builder
->dev
, 6, 8);
1278 /* see viewport_scissor_set_gen6_SCISSOR_RECT() */
1279 return ilo_builder_dynamic_write(builder
, ILO_BUILDER_ITEM_SCISSOR_RECT
,
1280 state_align
, state_len
, (const uint32_t *) vp
->scissor
);
1283 static inline uint32_t
1284 gen6_COLOR_CALC_STATE(struct ilo_builder
*builder
,
1285 const struct pipe_stencil_ref
*stencil_ref
,
1287 const struct pipe_blend_color
*blend_color
)
1289 const int state_align
= 64;
1290 const int state_len
= 6;
1291 uint32_t state_offset
, *dw
;
1293 ILO_DEV_ASSERT(builder
->dev
, 6, 8);
1295 state_offset
= ilo_builder_dynamic_pointer(builder
,
1296 ILO_BUILDER_ITEM_COLOR_CALC
, state_align
, state_len
, &dw
);
1298 dw
[0] = stencil_ref
->ref_value
[0] << 24 |
1299 stencil_ref
->ref_value
[1] << 16 |
1300 GEN6_CC_DW0_ALPHATEST_UNORM8
;
1302 dw
[2] = fui(blend_color
->color
[0]);
1303 dw
[3] = fui(blend_color
->color
[1]);
1304 dw
[4] = fui(blend_color
->color
[2]);
1305 dw
[5] = fui(blend_color
->color
[3]);
1307 return state_offset
;
1310 static inline uint32_t
1311 gen6_DEPTH_STENCIL_STATE(struct ilo_builder
*builder
,
1312 const struct ilo_dsa_state
*dsa
)
1314 const int state_align
= 64;
1315 const int state_len
= 3;
1317 ILO_DEV_ASSERT(builder
->dev
, 6, 7.5);
1319 STATIC_ASSERT(Elements(dsa
->payload
) >= state_len
);
1321 return ilo_builder_dynamic_write(builder
, ILO_BUILDER_ITEM_DEPTH_STENCIL
,
1322 state_align
, state_len
, dsa
->payload
);
1325 static inline uint32_t
1326 gen6_BLEND_STATE(struct ilo_builder
*builder
,
1327 const struct ilo_blend_state
*blend
,
1328 const struct ilo_fb_state
*fb
,
1329 const struct ilo_dsa_state
*dsa
)
1331 const int state_align
= 64;
1333 uint32_t state_offset
, *dw
;
1334 unsigned num_targets
, i
;
1336 ILO_DEV_ASSERT(builder
->dev
, 6, 7.5);
1339 * From the Sandy Bridge PRM, volume 2 part 1, page 376:
1341 * "The blend state is stored as an array of up to 8 elements..."
1343 num_targets
= fb
->state
.nr_cbufs
;
1344 assert(num_targets
<= 8);
1347 if (!dsa
->dw_blend_alpha
)
1349 /* to be able to reference alpha func */
1353 state_len
= 2 * num_targets
;
1355 state_offset
= ilo_builder_dynamic_pointer(builder
,
1356 ILO_BUILDER_ITEM_BLEND
, state_align
, state_len
, &dw
);
1358 for (i
= 0; i
< num_targets
; i
++) {
1359 const struct ilo_blend_cso
*cso
= &blend
->cso
[i
];
1361 dw
[0] = cso
->payload
[0];
1362 dw
[1] = cso
->payload
[1] | blend
->dw_shared
;
1364 if (i
< fb
->state
.nr_cbufs
&& fb
->state
.cbufs
[i
]) {
1365 const struct ilo_fb_blend_caps
*caps
= &fb
->blend_caps
[i
];
1367 if (caps
->can_blend
) {
1368 if (caps
->dst_alpha_forced_one
)
1369 dw
[0] |= cso
->dw_blend_dst_alpha_forced_one
;
1371 dw
[0] |= cso
->dw_blend
;
1374 if (caps
->can_logicop
)
1375 dw
[1] |= blend
->dw_logicop
;
1377 if (caps
->can_alpha_test
)
1378 dw
[1] |= dsa
->dw_blend_alpha
;
1380 dw
[1] |= GEN6_RT_DW1_WRITE_DISABLES_A
|
1381 GEN6_RT_DW1_WRITE_DISABLES_R
|
1382 GEN6_RT_DW1_WRITE_DISABLES_G
|
1383 GEN6_RT_DW1_WRITE_DISABLES_B
|
1384 dsa
->dw_blend_alpha
;
1388 * From the Sandy Bridge PRM, volume 2 part 1, page 356:
1390 * "When NumSamples = 1, AlphaToCoverage and AlphaToCoverage
1391 * Dither both must be disabled."
1393 * There is no such limitation on GEN7, or for AlphaToOne. But GL
1394 * requires that anyway.
1396 if (fb
->num_samples
> 1)
1397 dw
[1] |= blend
->dw_alpha_mod
;
1402 return state_offset
;
1405 static inline uint32_t
1406 gen8_BLEND_STATE(struct ilo_builder
*builder
,
1407 const struct ilo_blend_state
*blend
,
1408 const struct ilo_fb_state
*fb
,
1409 const struct ilo_dsa_state
*dsa
)
1411 const int state_align
= 64;
1412 const int state_len
= 1 + 2 * fb
->state
.nr_cbufs
;
1413 uint32_t state_offset
, *dw
;
1416 ILO_DEV_ASSERT(builder
->dev
, 8, 8);
1418 assert(fb
->state
.nr_cbufs
<= 8);
1420 state_offset
= ilo_builder_dynamic_pointer(builder
,
1421 ILO_BUILDER_ITEM_BLEND
, state_align
, state_len
, &dw
);
1423 dw
[0] = blend
->dw_shared
;
1424 if (fb
->num_samples
> 1)
1425 dw
[0] |= blend
->dw_alpha_mod
;
1426 if (!fb
->state
.nr_cbufs
|| fb
->blend_caps
[0].can_alpha_test
)
1427 dw
[0] |= dsa
->dw_blend_alpha
;
1430 for (i
= 0; i
< fb
->state
.nr_cbufs
; i
++) {
1431 const struct ilo_fb_blend_caps
*caps
= &fb
->blend_caps
[i
];
1432 const struct ilo_blend_cso
*cso
= &blend
->cso
[i
];
1434 dw
[0] = cso
->payload
[0];
1435 dw
[1] = cso
->payload
[1];
1437 if (fb
->state
.cbufs
[i
]) {
1438 if (caps
->can_blend
) {
1439 if (caps
->dst_alpha_forced_one
)
1440 dw
[0] |= cso
->dw_blend_dst_alpha_forced_one
;
1442 dw
[0] |= cso
->dw_blend
;
1445 if (caps
->can_logicop
)
1446 dw
[1] |= blend
->dw_logicop
;
1448 dw
[0] |= GEN8_RT_DW0_WRITE_DISABLES_A
|
1449 GEN8_RT_DW0_WRITE_DISABLES_R
|
1450 GEN8_RT_DW0_WRITE_DISABLES_G
|
1451 GEN8_RT_DW0_WRITE_DISABLES_B
;
1457 return state_offset
;
1460 #endif /* ILO_BUILDER_3D_BOTTOM_H */