2 * Mesa 3-D graphics library
4 * Copyright (C) 2014 LunarG, Inc.
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice shall be included
14 * in all copies or substantial portions of the Software.
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
25 * Chia-I Wu <olv@lunarg.com>
28 #ifndef ILO_BUILDER_3D_TOP_H
29 #define ILO_BUILDER_3D_TOP_H
31 #include "genhw/genhw.h"
32 #include "../ilo_resource.h"
33 #include "../ilo_shader.h"
34 #include "intel_winsys.h"
38 #include "ilo_state_3d.h"
39 #include "ilo_builder.h"
42 gen6_3DSTATE_URB(struct ilo_builder
*builder
,
43 int vs_total_size
, int gs_total_size
,
44 int vs_entry_size
, int gs_entry_size
)
46 const uint8_t cmd_len
= 3;
47 const int row_size
= 128; /* 1024 bits */
48 int vs_alloc_size
, gs_alloc_size
;
49 int vs_num_entries
, gs_num_entries
;
52 ILO_DEV_ASSERT(builder
->dev
, 6, 6);
54 /* in 1024-bit URB rows */
55 vs_alloc_size
= (vs_entry_size
+ row_size
- 1) / row_size
;
56 gs_alloc_size
= (gs_entry_size
+ row_size
- 1) / row_size
;
58 /* the valid range is [1, 5] */
63 assert(vs_alloc_size
<= 5 && gs_alloc_size
<= 5);
65 /* the valid range is [24, 256] in multiples of 4 */
66 vs_num_entries
= (vs_total_size
/ row_size
/ vs_alloc_size
) & ~3;
67 if (vs_num_entries
> 256)
69 assert(vs_num_entries
>= 24);
71 /* the valid range is [0, 256] in multiples of 4 */
72 gs_num_entries
= (gs_total_size
/ row_size
/ gs_alloc_size
) & ~3;
73 if (gs_num_entries
> 256)
76 ilo_builder_batch_pointer(builder
, cmd_len
, &dw
);
78 dw
[0] = GEN6_RENDER_CMD(3D
, 3DSTATE_URB
) | (cmd_len
- 2);
79 dw
[1] = (vs_alloc_size
- 1) << GEN6_URB_DW1_VS_ENTRY_SIZE__SHIFT
|
80 vs_num_entries
<< GEN6_URB_DW1_VS_ENTRY_COUNT__SHIFT
;
81 dw
[2] = gs_num_entries
<< GEN6_URB_DW2_GS_ENTRY_COUNT__SHIFT
|
82 (gs_alloc_size
- 1) << GEN6_URB_DW2_GS_ENTRY_SIZE__SHIFT
;
86 gen7_3dstate_push_constant_alloc(struct ilo_builder
*builder
,
87 int subop
, int offset
, int size
)
89 const uint32_t cmd
= GEN6_RENDER_TYPE_RENDER
|
90 GEN6_RENDER_SUBTYPE_3D
|
92 const uint8_t cmd_len
= 2;
93 const int slice_count
= ((ilo_dev_gen(builder
->dev
) == ILO_GEN(7.5) &&
94 builder
->dev
->gt
== 3) ||
95 ilo_dev_gen(builder
->dev
) >= ILO_GEN(8)) ? 2 : 1;
99 ILO_DEV_ASSERT(builder
->dev
, 7, 8);
101 /* VS, HS, DS, GS, and PS variants */
102 assert(subop
>= GEN7_RENDER_OPCODE_3DSTATE_PUSH_CONSTANT_ALLOC_VS
&&
103 subop
<= GEN7_RENDER_OPCODE_3DSTATE_PUSH_CONSTANT_ALLOC_PS
);
106 * From the Ivy Bridge PRM, volume 2 part 1, page 68:
108 * "(A table that says the maximum size of each constant buffer is
111 * From the Ivy Bridge PRM, volume 2 part 1, page 115:
113 * "The sum of the Constant Buffer Offset and the Constant Buffer Size
114 * may not exceed the maximum value of the Constant Buffer Size."
116 * Thus, the valid range of buffer end is [0KB, 16KB].
118 end
= (offset
+ size
) / 1024;
119 if (end
> 16 * slice_count
) {
120 assert(!"invalid constant buffer end");
121 end
= 16 * slice_count
;
124 /* the valid range of buffer offset is [0KB, 15KB] */
125 offset
= (offset
+ 1023) / 1024;
126 if (offset
> 15 * slice_count
) {
127 assert(!"invalid constant buffer offset");
128 offset
= 15 * slice_count
;
136 /* the valid range of buffer size is [0KB, 15KB] */
138 if (size
> 15 * slice_count
) {
139 assert(!"invalid constant buffer size");
140 size
= 15 * slice_count
;
143 assert(offset
% slice_count
== 0 && size
% slice_count
== 0);
145 ilo_builder_batch_pointer(builder
, cmd_len
, &dw
);
147 dw
[0] = cmd
| (cmd_len
- 2);
148 dw
[1] = offset
<< GEN7_PCB_ALLOC_DW1_OFFSET__SHIFT
|
153 gen7_3DSTATE_PUSH_CONSTANT_ALLOC_VS(struct ilo_builder
*builder
,
154 int offset
, int size
)
156 gen7_3dstate_push_constant_alloc(builder
,
157 GEN7_RENDER_OPCODE_3DSTATE_PUSH_CONSTANT_ALLOC_VS
, offset
, size
);
161 gen7_3DSTATE_PUSH_CONSTANT_ALLOC_HS(struct ilo_builder
*builder
,
162 int offset
, int size
)
164 gen7_3dstate_push_constant_alloc(builder
,
165 GEN7_RENDER_OPCODE_3DSTATE_PUSH_CONSTANT_ALLOC_HS
, offset
, size
);
169 gen7_3DSTATE_PUSH_CONSTANT_ALLOC_DS(struct ilo_builder
*builder
,
170 int offset
, int size
)
172 gen7_3dstate_push_constant_alloc(builder
,
173 GEN7_RENDER_OPCODE_3DSTATE_PUSH_CONSTANT_ALLOC_DS
, offset
, size
);
177 gen7_3DSTATE_PUSH_CONSTANT_ALLOC_GS(struct ilo_builder
*builder
,
178 int offset
, int size
)
180 gen7_3dstate_push_constant_alloc(builder
,
181 GEN7_RENDER_OPCODE_3DSTATE_PUSH_CONSTANT_ALLOC_GS
, offset
, size
);
185 gen7_3DSTATE_PUSH_CONSTANT_ALLOC_PS(struct ilo_builder
*builder
,
186 int offset
, int size
)
188 gen7_3dstate_push_constant_alloc(builder
,
189 GEN7_RENDER_OPCODE_3DSTATE_PUSH_CONSTANT_ALLOC_PS
, offset
, size
);
193 gen7_3dstate_urb(struct ilo_builder
*builder
,
194 int subop
, int offset
, int size
,
197 const uint32_t cmd
= GEN6_RENDER_TYPE_RENDER
|
198 GEN6_RENDER_SUBTYPE_3D
|
200 const uint8_t cmd_len
= 2;
201 const int row_size
= 64; /* 512 bits */
202 int alloc_size
, num_entries
, min_entries
, max_entries
;
205 ILO_DEV_ASSERT(builder
->dev
, 7, 8);
207 /* VS, HS, DS, and GS variants */
208 assert(subop
>= GEN7_RENDER_OPCODE_3DSTATE_URB_VS
&&
209 subop
<= GEN7_RENDER_OPCODE_3DSTATE_URB_GS
);
211 /* in multiples of 8KB */
212 assert(offset
% 8192 == 0);
215 /* in multiple of 512-bit rows */
216 alloc_size
= (entry_size
+ row_size
- 1) / row_size
;
221 * From the Ivy Bridge PRM, volume 2 part 1, page 34:
223 * "VS URB Entry Allocation Size equal to 4(5 512-bit URB rows) may
224 * cause performance to decrease due to banking in the URB. Element
225 * sizes of 16 to 20 should be programmed with six 512-bit URB rows."
227 if (subop
== GEN7_RENDER_OPCODE_3DSTATE_URB_VS
&& alloc_size
== 5)
230 /* in multiples of 8 */
231 num_entries
= (size
/ row_size
/ alloc_size
) & ~7;
234 case GEN7_RENDER_OPCODE_3DSTATE_URB_VS
:
235 switch (ilo_dev_gen(builder
->dev
)) {
241 max_entries
= (builder
->dev
->gt
>= 2) ? 1664 : 640;
242 min_entries
= (builder
->dev
->gt
>= 2) ? 64 : 32;
246 max_entries
= (builder
->dev
->gt
== 2) ? 704 : 512;
251 assert(num_entries
>= min_entries
);
252 if (num_entries
> max_entries
)
253 num_entries
= max_entries
;
255 case GEN7_RENDER_OPCODE_3DSTATE_URB_HS
:
256 max_entries
= (builder
->dev
->gt
== 2) ? 64 : 32;
257 if (num_entries
> max_entries
)
258 num_entries
= max_entries
;
260 case GEN7_RENDER_OPCODE_3DSTATE_URB_DS
:
262 assert(num_entries
>= 138);
264 case GEN7_RENDER_OPCODE_3DSTATE_URB_GS
:
265 switch (ilo_dev_gen(builder
->dev
)) {
270 max_entries
= (builder
->dev
->gt
>= 2) ? 640 : 256;
274 max_entries
= (builder
->dev
->gt
== 2) ? 320 : 192;
278 if (num_entries
> max_entries
)
279 num_entries
= max_entries
;
285 ilo_builder_batch_pointer(builder
, cmd_len
, &dw
);
287 dw
[0] = cmd
| (cmd_len
- 2);
288 dw
[1] = offset
<< GEN7_URB_DW1_OFFSET__SHIFT
|
289 (alloc_size
- 1) << GEN7_URB_DW1_ENTRY_SIZE__SHIFT
|
294 gen7_3DSTATE_URB_VS(struct ilo_builder
*builder
,
295 int offset
, int size
, int entry_size
)
297 gen7_3dstate_urb(builder
, GEN7_RENDER_OPCODE_3DSTATE_URB_VS
,
298 offset
, size
, entry_size
);
302 gen7_3DSTATE_URB_HS(struct ilo_builder
*builder
,
303 int offset
, int size
, int entry_size
)
305 gen7_3dstate_urb(builder
, GEN7_RENDER_OPCODE_3DSTATE_URB_HS
,
306 offset
, size
, entry_size
);
310 gen7_3DSTATE_URB_DS(struct ilo_builder
*builder
,
311 int offset
, int size
, int entry_size
)
313 gen7_3dstate_urb(builder
, GEN7_RENDER_OPCODE_3DSTATE_URB_DS
,
314 offset
, size
, entry_size
);
318 gen7_3DSTATE_URB_GS(struct ilo_builder
*builder
,
319 int offset
, int size
, int entry_size
)
321 gen7_3dstate_urb(builder
, GEN7_RENDER_OPCODE_3DSTATE_URB_GS
,
322 offset
, size
, entry_size
);
326 gen75_3DSTATE_VF(struct ilo_builder
*builder
,
327 bool enable_cut_index
,
330 const uint8_t cmd_len
= 2;
333 ILO_DEV_ASSERT(builder
->dev
, 7.5, 8);
335 ilo_builder_batch_pointer(builder
, cmd_len
, &dw
);
337 dw
[0] = GEN75_RENDER_CMD(3D
, 3DSTATE_VF
) | (cmd_len
- 2);
338 if (enable_cut_index
)
339 dw
[0] |= GEN75_VF_DW0_CUT_INDEX_ENABLE
;
345 gen6_3DSTATE_VF_STATISTICS(struct ilo_builder
*builder
,
348 const uint8_t cmd_len
= 1;
349 const uint32_t dw0
= GEN6_RENDER_CMD(SINGLE_DW
, 3DSTATE_VF_STATISTICS
) |
352 ILO_DEV_ASSERT(builder
->dev
, 6, 8);
354 ilo_builder_batch_write(builder
, cmd_len
, &dw0
);
358 * Translate a pipe primitive type to the matching hardware primitive type.
361 gen6_3d_translate_pipe_prim(unsigned prim
)
363 static const int prim_mapping
[ILO_PRIM_MAX
] = {
364 [PIPE_PRIM_POINTS
] = GEN6_3DPRIM_POINTLIST
,
365 [PIPE_PRIM_LINES
] = GEN6_3DPRIM_LINELIST
,
366 [PIPE_PRIM_LINE_LOOP
] = GEN6_3DPRIM_LINELOOP
,
367 [PIPE_PRIM_LINE_STRIP
] = GEN6_3DPRIM_LINESTRIP
,
368 [PIPE_PRIM_TRIANGLES
] = GEN6_3DPRIM_TRILIST
,
369 [PIPE_PRIM_TRIANGLE_STRIP
] = GEN6_3DPRIM_TRISTRIP
,
370 [PIPE_PRIM_TRIANGLE_FAN
] = GEN6_3DPRIM_TRIFAN
,
371 [PIPE_PRIM_QUADS
] = GEN6_3DPRIM_QUADLIST
,
372 [PIPE_PRIM_QUAD_STRIP
] = GEN6_3DPRIM_QUADSTRIP
,
373 [PIPE_PRIM_POLYGON
] = GEN6_3DPRIM_POLYGON
,
374 [PIPE_PRIM_LINES_ADJACENCY
] = GEN6_3DPRIM_LINELIST_ADJ
,
375 [PIPE_PRIM_LINE_STRIP_ADJACENCY
] = GEN6_3DPRIM_LINESTRIP_ADJ
,
376 [PIPE_PRIM_TRIANGLES_ADJACENCY
] = GEN6_3DPRIM_TRILIST_ADJ
,
377 [PIPE_PRIM_TRIANGLE_STRIP_ADJACENCY
] = GEN6_3DPRIM_TRISTRIP_ADJ
,
378 [ILO_PRIM_RECTANGLES
] = GEN6_3DPRIM_RECTLIST
,
381 assert(prim_mapping
[prim
]);
383 return prim_mapping
[prim
];
387 gen8_3DSTATE_VF_TOPOLOGY(struct ilo_builder
*builder
, unsigned pipe_prim
)
389 const uint8_t cmd_len
= 2;
390 const int prim
= gen6_3d_translate_pipe_prim(pipe_prim
);
393 ILO_DEV_ASSERT(builder
->dev
, 8, 8);
395 ilo_builder_batch_pointer(builder
, cmd_len
, &dw
);
397 dw
[0] = GEN8_RENDER_CMD(3D
, 3DSTATE_VF_TOPOLOGY
) | (cmd_len
- 2);
402 gen8_3DSTATE_VF_INSTANCING(struct ilo_builder
*builder
,
403 int vb_index
, uint32_t step_rate
)
405 const uint8_t cmd_len
= 3;
408 ILO_DEV_ASSERT(builder
->dev
, 8, 8);
410 ilo_builder_batch_pointer(builder
, cmd_len
, &dw
);
412 dw
[0] = GEN8_RENDER_CMD(3D
, 3DSTATE_VF_INSTANCING
) | (cmd_len
- 2);
415 dw
[1] |= GEN8_INSTANCING_DW1_ENABLE
;
420 gen8_3DSTATE_VF_SGVS(struct ilo_builder
*builder
,
421 bool vid_enable
, int vid_ve
, int vid_comp
,
422 bool iid_enable
, int iid_ve
, int iid_comp
)
424 const uint8_t cmd_len
= 2;
427 ILO_DEV_ASSERT(builder
->dev
, 8, 8);
429 ilo_builder_batch_pointer(builder
, cmd_len
, &dw
);
431 dw
[0] = GEN8_RENDER_CMD(3D
, 3DSTATE_VF_SGVS
) | (cmd_len
- 2);
435 dw
[1] |= GEN8_SGVS_DW1_IID_ENABLE
|
436 vid_comp
<< GEN8_SGVS_DW1_IID_VE_COMP__SHIFT
|
437 vid_ve
<< GEN8_SGVS_DW1_IID_VE_INDEX__SHIFT
;
441 dw
[1] |= GEN8_SGVS_DW1_VID_ENABLE
|
442 vid_comp
<< GEN8_SGVS_DW1_VID_VE_COMP__SHIFT
|
443 vid_ve
<< GEN8_SGVS_DW1_VID_VE_INDEX__SHIFT
;
448 gen6_3DSTATE_VERTEX_BUFFERS(struct ilo_builder
*builder
,
449 const struct ilo_ve_state
*ve
,
450 const struct ilo_vb_state
*vb
)
454 unsigned pos
, hw_idx
;
456 ILO_DEV_ASSERT(builder
->dev
, 6, 8);
459 * From the Sandy Bridge PRM, volume 2 part 1, page 82:
461 * "From 1 to 33 VBs can be specified..."
463 assert(ve
->vb_count
<= 33);
468 cmd_len
= 1 + 4 * ve
->vb_count
;
469 pos
= ilo_builder_batch_pointer(builder
, cmd_len
, &dw
);
471 dw
[0] = GEN6_RENDER_CMD(3D
, 3DSTATE_VERTEX_BUFFERS
) | (cmd_len
- 2);
475 for (hw_idx
= 0; hw_idx
< ve
->vb_count
; hw_idx
++) {
476 const unsigned instance_divisor
= ve
->instance_divisors
[hw_idx
];
477 const unsigned pipe_idx
= ve
->vb_mapping
[hw_idx
];
478 const struct pipe_vertex_buffer
*cso
= &vb
->states
[pipe_idx
];
480 dw
[0] = hw_idx
<< GEN6_VB_DW0_INDEX__SHIFT
;
482 if (ilo_dev_gen(builder
->dev
) >= ILO_GEN(8))
483 dw
[0] |= builder
->mocs
<< GEN8_VB_DW0_MOCS__SHIFT
;
485 dw
[0] |= builder
->mocs
<< GEN6_VB_DW0_MOCS__SHIFT
;
487 if (ilo_dev_gen(builder
->dev
) >= ILO_GEN(7))
488 dw
[0] |= GEN7_VB_DW0_ADDR_MODIFIED
;
490 if (instance_divisor
)
491 dw
[0] |= GEN6_VB_DW0_ACCESS_INSTANCEDATA
;
493 dw
[0] |= GEN6_VB_DW0_ACCESS_VERTEXDATA
;
495 /* use null vb if there is no buffer or the stride is out of range */
496 if (!cso
->buffer
|| cso
->stride
> 2048) {
497 dw
[0] |= GEN6_VB_DW0_IS_NULL
;
500 dw
[3] = (ilo_dev_gen(builder
->dev
) >= ILO_GEN(8)) ?
501 0 : instance_divisor
;
506 dw
[0] |= cso
->stride
<< GEN6_VB_DW0_PITCH__SHIFT
;
508 if (ilo_dev_gen(builder
->dev
) >= ILO_GEN(8)) {
509 const struct ilo_buffer
*buf
= ilo_buffer(cso
->buffer
);
510 const uint32_t start_offset
= cso
->buffer_offset
;
512 ilo_builder_batch_reloc64(builder
, pos
+ 1,
513 buf
->bo
, start_offset
, 0);
514 dw
[3] = buf
->bo_size
;
516 const struct ilo_buffer
*buf
= ilo_buffer(cso
->buffer
);
517 const uint32_t start_offset
= cso
->buffer_offset
;
518 const uint32_t end_offset
= buf
->bo_size
- 1;
520 dw
[3] = instance_divisor
;
522 ilo_builder_batch_reloc(builder
, pos
+ 1, buf
->bo
, start_offset
, 0);
523 ilo_builder_batch_reloc(builder
, pos
+ 2, buf
->bo
, end_offset
, 0);
531 /* the user vertex buffer must be uploaded with gen6_user_vertex_buffer() */
533 gen6_user_3DSTATE_VERTEX_BUFFERS(struct ilo_builder
*builder
,
534 uint32_t vb_begin
, uint32_t vb_end
,
537 const struct ilo_builder_writer
*bat
=
538 &builder
->writers
[ILO_BUILDER_WRITER_BATCH
];
539 const uint8_t cmd_len
= 1 + 4;
543 ILO_DEV_ASSERT(builder
->dev
, 6, 7.5);
545 pos
= ilo_builder_batch_pointer(builder
, cmd_len
, &dw
);
547 dw
[0] = GEN6_RENDER_CMD(3D
, 3DSTATE_VERTEX_BUFFERS
) | (cmd_len
- 2);
551 /* VERTEX_BUFFER_STATE */
552 dw
[0] = 0 << GEN6_VB_DW0_INDEX__SHIFT
|
553 GEN6_VB_DW0_ACCESS_VERTEXDATA
|
554 stride
<< GEN6_VB_DW0_PITCH__SHIFT
;
555 if (ilo_dev_gen(builder
->dev
) >= ILO_GEN(7))
556 dw
[0] |= GEN7_VB_DW0_ADDR_MODIFIED
;
560 ilo_builder_batch_reloc(builder
, pos
+ 1, bat
->bo
, vb_begin
, 0);
561 ilo_builder_batch_reloc(builder
, pos
+ 2, bat
->bo
, vb_end
, 0);
565 gen6_3DSTATE_VERTEX_ELEMENTS(struct ilo_builder
*builder
,
566 const struct ilo_ve_state
*ve
)
572 ILO_DEV_ASSERT(builder
->dev
, 6, 8);
575 * From the Sandy Bridge PRM, volume 2 part 1, page 92:
577 * "At least one VERTEX_ELEMENT_STATE structure must be included."
579 * From the Sandy Bridge PRM, volume 2 part 1, page 93:
581 * "Up to 34 (DevSNB+) vertex elements are supported."
583 assert(ve
->count
+ ve
->prepend_nosrc_cso
>= 1);
584 assert(ve
->count
+ ve
->prepend_nosrc_cso
<= 34);
586 STATIC_ASSERT(Elements(ve
->cso
[0].payload
) == 2);
588 cmd_len
= 1 + 2 * (ve
->count
+ ve
->prepend_nosrc_cso
);
589 ilo_builder_batch_pointer(builder
, cmd_len
, &dw
);
591 dw
[0] = GEN6_RENDER_CMD(3D
, 3DSTATE_VERTEX_ELEMENTS
) | (cmd_len
- 2);
594 if (ve
->prepend_nosrc_cso
) {
595 memcpy(dw
, ve
->nosrc_cso
.payload
, sizeof(ve
->nosrc_cso
.payload
));
599 for (i
= 0; i
< ve
->count
- ve
->last_cso_edgeflag
; i
++) {
600 memcpy(dw
, ve
->cso
[i
].payload
, sizeof(ve
->cso
[i
].payload
));
604 if (ve
->last_cso_edgeflag
)
605 memcpy(dw
, ve
->edgeflag_cso
.payload
, sizeof(ve
->edgeflag_cso
.payload
));
609 gen6_3DSTATE_INDEX_BUFFER(struct ilo_builder
*builder
,
610 const struct ilo_ib_state
*ib
,
611 bool enable_cut_index
)
613 const uint8_t cmd_len
= 3;
614 struct ilo_buffer
*buf
= ilo_buffer(ib
->hw_resource
);
615 uint32_t start_offset
, end_offset
;
620 ILO_DEV_ASSERT(builder
->dev
, 6, 7.5);
625 /* this is moved to the new 3DSTATE_VF */
626 if (ilo_dev_gen(builder
->dev
) >= ILO_GEN(7.5))
627 assert(!enable_cut_index
);
629 switch (ib
->hw_index_size
) {
631 format
= GEN6_IB_DW0_FORMAT_DWORD
;
634 format
= GEN6_IB_DW0_FORMAT_WORD
;
637 format
= GEN6_IB_DW0_FORMAT_BYTE
;
640 assert(!"unknown index size");
641 format
= GEN6_IB_DW0_FORMAT_BYTE
;
646 * set start_offset to 0 here and adjust pipe_draw_info::start with
647 * ib->draw_start_offset in 3DPRIMITIVE
650 end_offset
= buf
->bo_size
;
652 /* end_offset must also be aligned and is inclusive */
653 end_offset
-= (end_offset
% ib
->hw_index_size
);
656 pos
= ilo_builder_batch_pointer(builder
, cmd_len
, &dw
);
658 dw
[0] = GEN6_RENDER_CMD(3D
, 3DSTATE_INDEX_BUFFER
) | (cmd_len
- 2) |
659 builder
->mocs
<< GEN6_IB_DW0_MOCS__SHIFT
|
661 if (enable_cut_index
)
662 dw
[0] |= GEN6_IB_DW0_CUT_INDEX_ENABLE
;
664 ilo_builder_batch_reloc(builder
, pos
+ 1, buf
->bo
, start_offset
, 0);
665 ilo_builder_batch_reloc(builder
, pos
+ 2, buf
->bo
, end_offset
, 0);
669 gen8_3DSTATE_INDEX_BUFFER(struct ilo_builder
*builder
,
670 const struct ilo_ib_state
*ib
)
672 const uint8_t cmd_len
= 5;
673 struct ilo_buffer
*buf
= ilo_buffer(ib
->hw_resource
);
678 ILO_DEV_ASSERT(builder
->dev
, 8, 8);
683 switch (ib
->hw_index_size
) {
685 format
= GEN8_IB_DW1_FORMAT_DWORD
;
688 format
= GEN8_IB_DW1_FORMAT_WORD
;
691 format
= GEN8_IB_DW1_FORMAT_BYTE
;
694 assert(!"unknown index size");
695 format
= GEN8_IB_DW1_FORMAT_BYTE
;
699 pos
= ilo_builder_batch_pointer(builder
, cmd_len
, &dw
);
701 dw
[0] = GEN6_RENDER_CMD(3D
, 3DSTATE_INDEX_BUFFER
) | (cmd_len
- 2);
703 builder
->mocs
<< GEN8_IB_DW1_MOCS__SHIFT
;
704 dw
[4] = buf
->bo_size
;
706 /* ignore ib->offset here in favor of adjusting 3DPRIMITIVE */
707 ilo_builder_batch_reloc64(builder
, pos
+ 2, buf
->bo
, 0, 0);
711 gen6_3DSTATE_VS(struct ilo_builder
*builder
,
712 const struct ilo_shader_state
*vs
)
714 const uint8_t cmd_len
= 6;
715 const struct ilo_shader_cso
*cso
;
716 uint32_t dw2
, dw4
, dw5
, *dw
;
718 ILO_DEV_ASSERT(builder
->dev
, 6, 7.5);
720 cso
= ilo_shader_get_kernel_cso(vs
);
721 dw2
= cso
->payload
[0];
722 dw4
= cso
->payload
[1];
723 dw5
= cso
->payload
[2];
725 ilo_builder_batch_pointer(builder
, cmd_len
, &dw
);
727 dw
[0] = GEN6_RENDER_CMD(3D
, 3DSTATE_VS
) | (cmd_len
- 2);
728 dw
[1] = ilo_shader_get_kernel_offset(vs
);
730 dw
[3] = 0; /* scratch */
736 gen8_3DSTATE_VS(struct ilo_builder
*builder
,
737 const struct ilo_shader_state
*vs
,
738 uint32_t clip_plane_enable
)
740 const uint8_t cmd_len
= 9;
741 const struct ilo_shader_cso
*cso
;
742 uint32_t dw3
, dw6
, dw7
, dw8
, *dw
;
744 ILO_DEV_ASSERT(builder
->dev
, 8, 8);
746 cso
= ilo_shader_get_kernel_cso(vs
);
747 dw3
= cso
->payload
[0];
748 dw6
= cso
->payload
[1];
749 dw7
= cso
->payload
[2];
750 dw8
= clip_plane_enable
<< GEN8_VS_DW8_UCP_CLIP_ENABLES__SHIFT
;
752 ilo_builder_batch_pointer(builder
, cmd_len
, &dw
);
754 dw
[0] = GEN6_RENDER_CMD(3D
, 3DSTATE_VS
) | (cmd_len
- 2);
755 dw
[1] = ilo_shader_get_kernel_offset(vs
);
758 dw
[4] = 0; /* scratch */
766 gen6_disable_3DSTATE_VS(struct ilo_builder
*builder
)
768 const uint8_t cmd_len
= 6;
771 ILO_DEV_ASSERT(builder
->dev
, 6, 7.5);
773 ilo_builder_batch_pointer(builder
, cmd_len
, &dw
);
775 dw
[0] = GEN6_RENDER_CMD(3D
, 3DSTATE_VS
) | (cmd_len
- 2);
784 gen7_disable_3DSTATE_HS(struct ilo_builder
*builder
)
786 const uint8_t cmd_len
= (ilo_dev_gen(builder
->dev
) >= ILO_GEN(8)) ? 9 : 7;
789 ILO_DEV_ASSERT(builder
->dev
, 7, 8);
791 ilo_builder_batch_pointer(builder
, cmd_len
, &dw
);
793 dw
[0] = GEN7_RENDER_CMD(3D
, 3DSTATE_HS
) | (cmd_len
- 2);
800 if (ilo_dev_gen(builder
->dev
) >= ILO_GEN(8)) {
807 gen7_3DSTATE_TE(struct ilo_builder
*builder
)
809 const uint8_t cmd_len
= 4;
812 ILO_DEV_ASSERT(builder
->dev
, 7, 8);
814 ilo_builder_batch_pointer(builder
, cmd_len
, &dw
);
816 dw
[0] = GEN7_RENDER_CMD(3D
, 3DSTATE_TE
) | (cmd_len
- 2);
823 gen7_disable_3DSTATE_DS(struct ilo_builder
*builder
)
825 const uint8_t cmd_len
= (ilo_dev_gen(builder
->dev
) >= ILO_GEN(8)) ? 9 : 6;
828 ILO_DEV_ASSERT(builder
->dev
, 7, 8);
830 ilo_builder_batch_pointer(builder
, cmd_len
, &dw
);
832 dw
[0] = GEN7_RENDER_CMD(3D
, 3DSTATE_DS
) | (cmd_len
- 2);
838 if (ilo_dev_gen(builder
->dev
) >= ILO_GEN(8)) {
846 gen6_3DSTATE_GS(struct ilo_builder
*builder
,
847 const struct ilo_shader_state
*gs
)
849 const uint8_t cmd_len
= 7;
850 const struct ilo_shader_cso
*cso
;
851 uint32_t dw2
, dw4
, dw5
, dw6
, *dw
;
853 ILO_DEV_ASSERT(builder
->dev
, 6, 6);
855 cso
= ilo_shader_get_kernel_cso(gs
);
856 dw2
= cso
->payload
[0];
857 dw4
= cso
->payload
[1];
858 dw5
= cso
->payload
[2];
859 dw6
= cso
->payload
[3];
861 ilo_builder_batch_pointer(builder
, cmd_len
, &dw
);
863 dw
[0] = GEN6_RENDER_CMD(3D
, 3DSTATE_GS
) | (cmd_len
- 2);
864 dw
[1] = ilo_shader_get_kernel_offset(gs
);
866 dw
[3] = 0; /* scratch */
873 gen6_so_3DSTATE_GS(struct ilo_builder
*builder
,
874 const struct ilo_shader_state
*vs
,
877 const uint8_t cmd_len
= 7;
878 struct ilo_shader_cso cso
;
879 enum ilo_kernel_param param
;
880 uint32_t dw2
, dw4
, dw5
, dw6
, *dw
;
882 ILO_DEV_ASSERT(builder
->dev
, 6, 6);
884 assert(ilo_shader_get_kernel_param(vs
, ILO_KERNEL_VS_GEN6_SO
));
886 switch (verts_per_prim
) {
888 param
= ILO_KERNEL_VS_GEN6_SO_POINT_OFFSET
;
891 param
= ILO_KERNEL_VS_GEN6_SO_LINE_OFFSET
;
894 param
= ILO_KERNEL_VS_GEN6_SO_TRI_OFFSET
;
898 /* cannot use VS's CSO */
899 ilo_gpe_init_gs_cso(builder
->dev
, vs
, &cso
);
900 dw2
= cso
.payload
[0];
901 dw4
= cso
.payload
[1];
902 dw5
= cso
.payload
[2];
903 dw6
= cso
.payload
[3];
905 ilo_builder_batch_pointer(builder
, cmd_len
, &dw
);
907 dw
[0] = GEN6_RENDER_CMD(3D
, 3DSTATE_GS
) | (cmd_len
- 2);
908 dw
[1] = ilo_shader_get_kernel_offset(vs
) +
909 ilo_shader_get_kernel_param(vs
, param
);
918 gen6_disable_3DSTATE_GS(struct ilo_builder
*builder
)
920 const uint8_t cmd_len
= 7;
923 ILO_DEV_ASSERT(builder
->dev
, 6, 6);
925 ilo_builder_batch_pointer(builder
, cmd_len
, &dw
);
927 dw
[0] = GEN6_RENDER_CMD(3D
, 3DSTATE_GS
) | (cmd_len
- 2);
931 /* honor the valid range of URB read length */
932 dw
[4] = 1 << GEN6_GS_DW4_URB_READ_LEN__SHIFT
;
933 dw
[5] = GEN6_GS_DW5_STATISTICS
;
938 gen6_3DSTATE_GS_SVB_INDEX(struct ilo_builder
*builder
,
939 int index
, unsigned svbi
,
941 bool load_vertex_count
)
943 const uint8_t cmd_len
= 4;
946 ILO_DEV_ASSERT(builder
->dev
, 6, 6);
947 assert(index
>= 0 && index
< 4);
949 ilo_builder_batch_pointer(builder
, cmd_len
, &dw
);
951 dw
[0] = GEN6_RENDER_CMD(3D
, 3DSTATE_GS_SVB_INDEX
) | (cmd_len
- 2);
953 dw
[1] = index
<< GEN6_SVBI_DW1_INDEX__SHIFT
;
954 if (load_vertex_count
)
955 dw
[1] |= GEN6_SVBI_DW1_LOAD_INTERNAL_VERTEX_COUNT
;
962 gen7_3DSTATE_GS(struct ilo_builder
*builder
,
963 const struct ilo_shader_state
*gs
)
965 const uint8_t cmd_len
= 7;
966 const struct ilo_shader_cso
*cso
;
967 uint32_t dw2
, dw4
, dw5
, *dw
;
969 ILO_DEV_ASSERT(builder
->dev
, 7, 7.5);
971 cso
= ilo_shader_get_kernel_cso(gs
);
972 dw2
= cso
->payload
[0];
973 dw4
= cso
->payload
[1];
974 dw5
= cso
->payload
[2];
976 ilo_builder_batch_pointer(builder
, cmd_len
, &dw
);
978 dw
[0] = GEN6_RENDER_CMD(3D
, 3DSTATE_GS
) | (cmd_len
- 2);
979 dw
[1] = ilo_shader_get_kernel_offset(gs
);
981 dw
[3] = 0; /* scratch */
988 gen7_disable_3DSTATE_GS(struct ilo_builder
*builder
)
990 const uint8_t cmd_len
= (ilo_dev_gen(builder
->dev
) >= ILO_GEN(8)) ? 10 : 7;
993 ILO_DEV_ASSERT(builder
->dev
, 7, 8);
995 ilo_builder_batch_pointer(builder
, cmd_len
, &dw
);
997 dw
[0] = GEN6_RENDER_CMD(3D
, 3DSTATE_GS
) | (cmd_len
- 2);
1003 if (ilo_dev_gen(builder
->dev
) >= ILO_GEN(8)) {
1004 dw
[7] = GEN8_GS_DW7_STATISTICS
;
1008 dw
[5] = GEN7_GS_DW5_STATISTICS
;
1014 gen7_3DSTATE_STREAMOUT(struct ilo_builder
*builder
,
1016 bool render_disable
,
1017 int vertex_attrib_count
,
1018 const int *buf_strides
)
1020 const uint8_t cmd_len
= (ilo_dev_gen(builder
->dev
) >= ILO_GEN(8)) ? 5 : 3;
1024 ILO_DEV_ASSERT(builder
->dev
, 7, 8);
1026 ilo_builder_batch_pointer(builder
, cmd_len
, &dw
);
1028 dw
[0] = GEN7_RENDER_CMD(3D
, 3DSTATE_STREAMOUT
) | (cmd_len
- 2);
1030 dw
[1] = render_stream
<< GEN7_SO_DW1_RENDER_STREAM_SELECT__SHIFT
;
1032 dw
[1] |= GEN7_SO_DW1_RENDER_DISABLE
;
1035 buf_mask
= ((bool) buf_strides
[3]) << 3 |
1036 ((bool) buf_strides
[2]) << 2 |
1037 ((bool) buf_strides
[1]) << 1 |
1038 ((bool) buf_strides
[0]);
1039 if (ilo_dev_gen(builder
->dev
) >= ILO_GEN(8)) {
1040 dw
[3] = buf_strides
[1] << 16 | buf_strides
[0];
1041 dw
[4] = buf_strides
[3] << 16 | buf_strides
[1];
1050 dw
[1] |= GEN7_SO_DW1_SO_ENABLE
|
1051 GEN7_SO_DW1_STATISTICS
;
1054 dw
[1] |= GEN7_REORDER_TRAILING
<< GEN7_SO_DW1_REORDER_MODE__SHIFT
;
1055 if (ilo_dev_gen(builder
->dev
) < ILO_GEN(8))
1056 dw
[1] |= buf_mask
<< GEN7_SO_DW1_BUFFER_ENABLES__SHIFT
;
1058 read_len
= (vertex_attrib_count
+ 1) / 2;
1062 dw
[2] = 0 << GEN7_SO_DW2_STREAM3_READ_OFFSET__SHIFT
|
1063 (read_len
- 1) << GEN7_SO_DW2_STREAM3_READ_LEN__SHIFT
|
1064 0 << GEN7_SO_DW2_STREAM2_READ_OFFSET__SHIFT
|
1065 (read_len
- 1) << GEN7_SO_DW2_STREAM2_READ_LEN__SHIFT
|
1066 0 << GEN7_SO_DW2_STREAM1_READ_OFFSET__SHIFT
|
1067 (read_len
- 1) << GEN7_SO_DW2_STREAM1_READ_LEN__SHIFT
|
1068 0 << GEN7_SO_DW2_STREAM0_READ_OFFSET__SHIFT
|
1069 (read_len
- 1) << GEN7_SO_DW2_STREAM0_READ_LEN__SHIFT
;
1076 gen7_3DSTATE_SO_DECL_LIST(struct ilo_builder
*builder
,
1077 const struct pipe_stream_output_info
*so_info
)
1080 * Note that "DWord Length" has 9 bits for this command and the type of
1081 * cmd_len cannot be uint8_t.
1087 uint16_t decls
[128];
1089 unsigned buf_offsets
[PIPE_MAX_SO_BUFFERS
];
1090 int hw_decl_count
, i
;
1093 ILO_DEV_ASSERT(builder
->dev
, 7, 8);
1095 memset(streams
, 0, sizeof(streams
));
1096 memset(buf_offsets
, 0, sizeof(buf_offsets
));
1098 for (i
= 0; i
< so_info
->num_outputs
; i
++) {
1099 unsigned decl
, st
, buf
, reg
, mask
;
1101 st
= so_info
->output
[i
].stream
;
1102 buf
= so_info
->output
[i
].output_buffer
;
1104 /* pad with holes */
1105 while (buf_offsets
[buf
] < so_info
->output
[i
].dst_offset
) {
1108 num_dwords
= so_info
->output
[i
].dst_offset
- buf_offsets
[buf
];
1112 decl
= buf
<< GEN7_SO_DECL_OUTPUT_SLOT__SHIFT
|
1113 GEN7_SO_DECL_HOLE_FLAG
|
1114 ((1 << num_dwords
) - 1) << GEN7_SO_DECL_COMPONENT_MASK__SHIFT
;
1116 assert(streams
[st
].decl_count
< Elements(streams
[st
].decls
));
1117 streams
[st
].decls
[streams
[st
].decl_count
++] = decl
;
1118 buf_offsets
[buf
] += num_dwords
;
1120 assert(buf_offsets
[buf
] == so_info
->output
[i
].dst_offset
);
1122 reg
= so_info
->output
[i
].register_index
;
1123 mask
= ((1 << so_info
->output
[i
].num_components
) - 1) <<
1124 so_info
->output
[i
].start_component
;
1126 decl
= buf
<< GEN7_SO_DECL_OUTPUT_SLOT__SHIFT
|
1127 reg
<< GEN7_SO_DECL_REG_INDEX__SHIFT
|
1128 mask
<< GEN7_SO_DECL_COMPONENT_MASK__SHIFT
;
1130 assert(streams
[st
].decl_count
< Elements(streams
[st
].decls
));
1132 streams
[st
].buf_selects
|= 1 << buf
;
1133 streams
[st
].decls
[streams
[st
].decl_count
++] = decl
;
1134 buf_offsets
[buf
] += so_info
->output
[i
].num_components
;
1137 if (ilo_dev_gen(builder
->dev
) >= ILO_GEN(7.5)) {
1138 hw_decl_count
= MAX4(streams
[0].decl_count
, streams
[1].decl_count
,
1139 streams
[2].decl_count
, streams
[3].decl_count
);
1142 * From the Ivy Bridge PRM, volume 2 part 1, page 201:
1144 * "Errata: All 128 decls for all four streams must be included
1145 * whenever this command is issued. The "Num Entries [n]" fields
1146 * still contain the actual numbers of valid decls."
1148 hw_decl_count
= 128;
1151 cmd_len
= 3 + 2 * hw_decl_count
;
1153 ilo_builder_batch_pointer(builder
, cmd_len
, &dw
);
1155 dw
[0] = GEN7_RENDER_CMD(3D
, 3DSTATE_SO_DECL_LIST
) | (cmd_len
- 2);
1156 dw
[1] = streams
[3].buf_selects
<< GEN7_SO_DECL_DW1_STREAM3_BUFFER_SELECTS__SHIFT
|
1157 streams
[2].buf_selects
<< GEN7_SO_DECL_DW1_STREAM2_BUFFER_SELECTS__SHIFT
|
1158 streams
[1].buf_selects
<< GEN7_SO_DECL_DW1_STREAM1_BUFFER_SELECTS__SHIFT
|
1159 streams
[0].buf_selects
<< GEN7_SO_DECL_DW1_STREAM0_BUFFER_SELECTS__SHIFT
;
1160 dw
[2] = streams
[3].decl_count
<< GEN7_SO_DECL_DW2_STREAM3_ENTRY_COUNT__SHIFT
|
1161 streams
[2].decl_count
<< GEN7_SO_DECL_DW2_STREAM2_ENTRY_COUNT__SHIFT
|
1162 streams
[1].decl_count
<< GEN7_SO_DECL_DW2_STREAM1_ENTRY_COUNT__SHIFT
|
1163 streams
[0].decl_count
<< GEN7_SO_DECL_DW2_STREAM0_ENTRY_COUNT__SHIFT
;
1166 for (i
= 0; i
< hw_decl_count
; i
++) {
1167 dw
[0] = streams
[1].decls
[i
] << 16 | streams
[0].decls
[i
];
1168 dw
[1] = streams
[3].decls
[i
] << 16 | streams
[2].decls
[i
];
1174 gen7_3DSTATE_SO_BUFFER(struct ilo_builder
*builder
, int index
, int stride
,
1175 const struct pipe_stream_output_target
*so_target
)
1177 const uint8_t cmd_len
= (ilo_dev_gen(builder
->dev
) >= ILO_GEN(8)) ? 8 : 4;
1178 struct ilo_buffer
*buf
;
1183 ILO_DEV_ASSERT(builder
->dev
, 7, 8);
1185 buf
= ilo_buffer(so_target
->buffer
);
1188 assert(stride
% 4 == 0);
1189 assert(so_target
->buffer_offset
% 4 == 0);
1192 start
= so_target
->buffer_offset
& ~3;
1193 end
= (start
+ so_target
->buffer_size
) & ~3;
1195 pos
= ilo_builder_batch_pointer(builder
, cmd_len
, &dw
);
1197 dw
[0] = GEN7_RENDER_CMD(3D
, 3DSTATE_SO_BUFFER
) | (cmd_len
- 2);
1198 dw
[1] = index
<< GEN7_SO_BUF_DW1_INDEX__SHIFT
|
1201 if (ilo_dev_gen(builder
->dev
) >= ILO_GEN(8)) {
1202 dw
[1] |= builder
->mocs
<< GEN8_SO_BUF_DW1_MOCS__SHIFT
;
1204 dw
[4] = end
- start
;
1209 ilo_builder_batch_reloc64(builder
, pos
+ 2,
1210 buf
->bo
, start
, INTEL_RELOC_WRITE
);
1212 dw
[1] |= builder
->mocs
<< GEN7_SO_BUF_DW1_MOCS__SHIFT
;
1214 ilo_builder_batch_reloc(builder
, pos
+ 2,
1215 buf
->bo
, start
, INTEL_RELOC_WRITE
);
1216 ilo_builder_batch_reloc(builder
, pos
+ 3,
1217 buf
->bo
, end
, INTEL_RELOC_WRITE
);
1222 gen7_disable_3DSTATE_SO_BUFFER(struct ilo_builder
*builder
, int index
)
1224 const uint8_t cmd_len
= (ilo_dev_gen(builder
->dev
) >= ILO_GEN(8)) ? 8 : 4;
1227 ILO_DEV_ASSERT(builder
->dev
, 7, 8);
1229 ilo_builder_batch_pointer(builder
, cmd_len
, &dw
);
1231 dw
[0] = GEN7_RENDER_CMD(3D
, 3DSTATE_SO_BUFFER
) | (cmd_len
- 2);
1232 dw
[1] = index
<< GEN7_SO_BUF_DW1_INDEX__SHIFT
;
1236 if (ilo_dev_gen(builder
->dev
) >= ILO_GEN(8)) {
1245 gen6_3DSTATE_BINDING_TABLE_POINTERS(struct ilo_builder
*builder
,
1246 uint32_t vs_binding_table
,
1247 uint32_t gs_binding_table
,
1248 uint32_t ps_binding_table
)
1250 const uint8_t cmd_len
= 4;
1253 ILO_DEV_ASSERT(builder
->dev
, 6, 6);
1255 ilo_builder_batch_pointer(builder
, cmd_len
, &dw
);
1257 dw
[0] = GEN6_RENDER_CMD(3D
, 3DSTATE_BINDING_TABLE_POINTERS
) |
1258 GEN6_BINDING_TABLE_PTR_DW0_VS_CHANGED
|
1259 GEN6_BINDING_TABLE_PTR_DW0_GS_CHANGED
|
1260 GEN6_BINDING_TABLE_PTR_DW0_PS_CHANGED
|
1262 dw
[1] = vs_binding_table
;
1263 dw
[2] = gs_binding_table
;
1264 dw
[3] = ps_binding_table
;
1268 gen6_3DSTATE_SAMPLER_STATE_POINTERS(struct ilo_builder
*builder
,
1269 uint32_t vs_sampler_state
,
1270 uint32_t gs_sampler_state
,
1271 uint32_t ps_sampler_state
)
1273 const uint8_t cmd_len
= 4;
1276 ILO_DEV_ASSERT(builder
->dev
, 6, 6);
1278 ilo_builder_batch_pointer(builder
, cmd_len
, &dw
);
1280 dw
[0] = GEN6_RENDER_CMD(3D
, 3DSTATE_SAMPLER_STATE_POINTERS
) |
1281 GEN6_SAMPLER_PTR_DW0_VS_CHANGED
|
1282 GEN6_SAMPLER_PTR_DW0_GS_CHANGED
|
1283 GEN6_SAMPLER_PTR_DW0_PS_CHANGED
|
1285 dw
[1] = vs_sampler_state
;
1286 dw
[2] = gs_sampler_state
;
1287 dw
[3] = ps_sampler_state
;
1291 gen7_3dstate_pointer(struct ilo_builder
*builder
,
1292 int subop
, uint32_t pointer
)
1294 const uint32_t cmd
= GEN6_RENDER_TYPE_RENDER
|
1295 GEN6_RENDER_SUBTYPE_3D
|
1297 const uint8_t cmd_len
= 2;
1300 ILO_DEV_ASSERT(builder
->dev
, 7, 8);
1302 ilo_builder_batch_pointer(builder
, cmd_len
, &dw
);
1304 dw
[0] = cmd
| (cmd_len
- 2);
1309 gen7_3DSTATE_BINDING_TABLE_POINTERS_VS(struct ilo_builder
*builder
,
1310 uint32_t binding_table
)
1312 gen7_3dstate_pointer(builder
,
1313 GEN7_RENDER_OPCODE_3DSTATE_BINDING_TABLE_POINTERS_VS
,
1318 gen7_3DSTATE_BINDING_TABLE_POINTERS_HS(struct ilo_builder
*builder
,
1319 uint32_t binding_table
)
1321 gen7_3dstate_pointer(builder
,
1322 GEN7_RENDER_OPCODE_3DSTATE_BINDING_TABLE_POINTERS_HS
,
1327 gen7_3DSTATE_BINDING_TABLE_POINTERS_DS(struct ilo_builder
*builder
,
1328 uint32_t binding_table
)
1330 gen7_3dstate_pointer(builder
,
1331 GEN7_RENDER_OPCODE_3DSTATE_BINDING_TABLE_POINTERS_DS
,
1336 gen7_3DSTATE_BINDING_TABLE_POINTERS_GS(struct ilo_builder
*builder
,
1337 uint32_t binding_table
)
1339 gen7_3dstate_pointer(builder
,
1340 GEN7_RENDER_OPCODE_3DSTATE_BINDING_TABLE_POINTERS_GS
,
1345 gen7_3DSTATE_SAMPLER_STATE_POINTERS_VS(struct ilo_builder
*builder
,
1346 uint32_t sampler_state
)
1348 gen7_3dstate_pointer(builder
,
1349 GEN7_RENDER_OPCODE_3DSTATE_SAMPLER_STATE_POINTERS_VS
,
1354 gen7_3DSTATE_SAMPLER_STATE_POINTERS_HS(struct ilo_builder
*builder
,
1355 uint32_t sampler_state
)
1357 gen7_3dstate_pointer(builder
,
1358 GEN7_RENDER_OPCODE_3DSTATE_SAMPLER_STATE_POINTERS_HS
,
1363 gen7_3DSTATE_SAMPLER_STATE_POINTERS_DS(struct ilo_builder
*builder
,
1364 uint32_t sampler_state
)
1366 gen7_3dstate_pointer(builder
,
1367 GEN7_RENDER_OPCODE_3DSTATE_SAMPLER_STATE_POINTERS_DS
,
1372 gen7_3DSTATE_SAMPLER_STATE_POINTERS_GS(struct ilo_builder
*builder
,
1373 uint32_t sampler_state
)
1375 gen7_3dstate_pointer(builder
,
1376 GEN7_RENDER_OPCODE_3DSTATE_SAMPLER_STATE_POINTERS_GS
,
1381 gen6_3dstate_constant(struct ilo_builder
*builder
, int subop
,
1382 const uint32_t *bufs
, const int *sizes
,
1385 const uint32_t cmd
= GEN6_RENDER_TYPE_RENDER
|
1386 GEN6_RENDER_SUBTYPE_3D
|
1388 const uint8_t cmd_len
= 5;
1389 unsigned buf_enabled
= 0x0;
1390 uint32_t buf_dw
[4], *dw
;
1391 int max_read_length
, total_read_length
;
1394 ILO_DEV_ASSERT(builder
->dev
, 6, 6);
1396 assert(num_bufs
<= 4);
1399 * From the Sandy Bridge PRM, volume 2 part 1, page 138:
1401 * "(3DSTATE_CONSTANT_VS) The sum of all four read length fields (each
1402 * incremented to represent the actual read length) must be less than
1405 * From the Sandy Bridge PRM, volume 2 part 1, page 161:
1407 * "(3DSTATE_CONSTANT_GS) The sum of all four read length fields (each
1408 * incremented to represent the actual read length) must be less than
1411 * From the Sandy Bridge PRM, volume 2 part 1, page 287:
1413 * "(3DSTATE_CONSTANT_PS) The sum of all four read length fields (each
1414 * incremented to represent the actual read length) must be less than
1418 case GEN6_RENDER_OPCODE_3DSTATE_CONSTANT_VS
:
1419 max_read_length
= 32;
1421 case GEN6_RENDER_OPCODE_3DSTATE_CONSTANT_GS
:
1422 case GEN6_RENDER_OPCODE_3DSTATE_CONSTANT_PS
:
1423 max_read_length
= 64;
1426 assert(!"unknown pcb subop");
1427 max_read_length
= 0;
1431 total_read_length
= 0;
1432 for (i
= 0; i
< 4; i
++) {
1433 if (i
< num_bufs
&& sizes
[i
]) {
1434 /* in 256-bit units */
1435 const int read_len
= (sizes
[i
] + 31) / 32;
1437 assert(bufs
[i
] % 32 == 0);
1438 assert(read_len
<= 32);
1440 buf_enabled
|= 1 << i
;
1441 buf_dw
[i
] = bufs
[i
] | (read_len
- 1);
1443 total_read_length
+= read_len
;
1449 assert(total_read_length
<= max_read_length
);
1451 ilo_builder_batch_pointer(builder
, cmd_len
, &dw
);
1453 dw
[0] = cmd
| (cmd_len
- 2) |
1454 buf_enabled
<< GEN6_CONSTANT_DW0_BUFFER_ENABLES__SHIFT
|
1455 builder
->mocs
<< GEN6_CONSTANT_DW0_MOCS__SHIFT
;
1457 memcpy(&dw
[1], buf_dw
, sizeof(buf_dw
));
1461 gen6_3DSTATE_CONSTANT_VS(struct ilo_builder
*builder
,
1462 const uint32_t *bufs
, const int *sizes
,
1465 gen6_3dstate_constant(builder
, GEN6_RENDER_OPCODE_3DSTATE_CONSTANT_VS
,
1466 bufs
, sizes
, num_bufs
);
1470 gen6_3DSTATE_CONSTANT_GS(struct ilo_builder
*builder
,
1471 const uint32_t *bufs
, const int *sizes
,
1474 gen6_3dstate_constant(builder
, GEN6_RENDER_OPCODE_3DSTATE_CONSTANT_GS
,
1475 bufs
, sizes
, num_bufs
);
1479 gen7_3dstate_constant(struct ilo_builder
*builder
,
1481 const uint32_t *bufs
, const int *sizes
,
1484 const uint32_t cmd
= GEN6_RENDER_TYPE_RENDER
|
1485 GEN6_RENDER_SUBTYPE_3D
|
1487 const uint8_t cmd_len
= (ilo_dev_gen(builder
->dev
) >= ILO_GEN(8)) ? 11 : 7;
1488 uint32_t payload
[6], *dw
;
1489 int total_read_length
, i
;
1491 ILO_DEV_ASSERT(builder
->dev
, 7, 8);
1493 /* VS, HS, DS, GS, and PS variants */
1494 assert(subop
>= GEN6_RENDER_OPCODE_3DSTATE_CONSTANT_VS
&&
1495 subop
<= GEN7_RENDER_OPCODE_3DSTATE_CONSTANT_DS
&&
1496 subop
!= GEN6_RENDER_OPCODE_3DSTATE_SAMPLE_MASK
);
1498 assert(num_bufs
<= 4);
1503 total_read_length
= 0;
1504 for (i
= 0; i
< 4; i
++) {
1508 * From the Ivy Bridge PRM, volume 2 part 1, page 112:
1510 * "Constant buffers must be enabled in order from Constant Buffer 0
1511 * to Constant Buffer 3 within this command. For example, it is
1512 * not allowed to enable Constant Buffer 1 by programming a
1513 * non-zero value in the VS Constant Buffer 1 Read Length without a
1514 * non-zero value in VS Constant Buffer 0 Read Length."
1516 if (i
>= num_bufs
|| !sizes
[i
]) {
1517 for (; i
< 4; i
++) {
1518 assert(i
>= num_bufs
|| !sizes
[i
]);
1524 /* read lengths are in 256-bit units */
1525 read_len
= (sizes
[i
] + 31) / 32;
1526 /* the lower 5 bits are used for memory object control state */
1527 assert(bufs
[i
] % 32 == 0);
1529 payload
[i
/ 2] |= read_len
<< ((i
% 2) ? 16 : 0);
1530 payload
[2 + i
] = bufs
[i
];
1532 total_read_length
+= read_len
;
1536 * From the Ivy Bridge PRM, volume 2 part 1, page 113:
1538 * "The sum of all four read length fields must be less than or equal
1539 * to the size of 64"
1541 assert(total_read_length
<= 64);
1543 ilo_builder_batch_pointer(builder
, cmd_len
, &dw
);
1545 dw
[0] = cmd
| (cmd_len
- 2);
1546 if (ilo_dev_gen(builder
->dev
) >= ILO_GEN(8)) {
1558 payload
[2] |= builder
->mocs
<< GEN7_CONSTANT_DW_ADDR_MOCS__SHIFT
;
1560 memcpy(&dw
[1], payload
, sizeof(payload
));
1565 gen7_3DSTATE_CONSTANT_VS(struct ilo_builder
*builder
,
1566 const uint32_t *bufs
, const int *sizes
,
1569 gen7_3dstate_constant(builder
, GEN6_RENDER_OPCODE_3DSTATE_CONSTANT_VS
,
1570 bufs
, sizes
, num_bufs
);
1574 gen7_3DSTATE_CONSTANT_HS(struct ilo_builder
*builder
,
1575 const uint32_t *bufs
, const int *sizes
,
1578 gen7_3dstate_constant(builder
, GEN7_RENDER_OPCODE_3DSTATE_CONSTANT_HS
,
1579 bufs
, sizes
, num_bufs
);
1583 gen7_3DSTATE_CONSTANT_DS(struct ilo_builder
*builder
,
1584 const uint32_t *bufs
, const int *sizes
,
1587 gen7_3dstate_constant(builder
, GEN7_RENDER_OPCODE_3DSTATE_CONSTANT_DS
,
1588 bufs
, sizes
, num_bufs
);
1592 gen7_3DSTATE_CONSTANT_GS(struct ilo_builder
*builder
,
1593 const uint32_t *bufs
, const int *sizes
,
1596 gen7_3dstate_constant(builder
, GEN6_RENDER_OPCODE_3DSTATE_CONSTANT_GS
,
1597 bufs
, sizes
, num_bufs
);
1600 static inline uint32_t
1601 gen6_BINDING_TABLE_STATE(struct ilo_builder
*builder
,
1602 const uint32_t *surface_states
,
1603 int num_surface_states
)
1605 const int state_align
= 32;
1606 const int state_len
= num_surface_states
;
1607 uint32_t state_offset
, *dw
;
1609 ILO_DEV_ASSERT(builder
->dev
, 6, 8);
1612 * From the Sandy Bridge PRM, volume 4 part 1, page 69:
1614 * "It is stored as an array of up to 256 elements..."
1616 assert(num_surface_states
<= 256);
1618 if (!num_surface_states
)
1621 state_offset
= ilo_builder_surface_pointer(builder
,
1622 ILO_BUILDER_ITEM_BINDING_TABLE
, state_align
, state_len
, &dw
);
1623 memcpy(dw
, surface_states
, state_len
<< 2);
1625 return state_offset
;
1628 static inline uint32_t
1629 gen6_SURFACE_STATE(struct ilo_builder
*builder
,
1630 const struct ilo_view_surface
*surf
,
1633 int state_align
, state_len
;
1634 uint32_t state_offset
, *dw
;
1636 ILO_DEV_ASSERT(builder
->dev
, 6, 8);
1638 if (ilo_dev_gen(builder
->dev
) >= ILO_GEN(8)) {
1642 state_offset
= ilo_builder_surface_pointer(builder
,
1643 ILO_BUILDER_ITEM_SURFACE
, state_align
, state_len
, &dw
);
1644 memcpy(dw
, surf
->payload
, state_len
<< 2);
1647 const uint32_t mocs
= (surf
->scanout
) ?
1648 (GEN8_MOCS_MT_PTE
| GEN8_MOCS_CT_L3
) : builder
->mocs
;
1650 dw
[1] |= mocs
<< GEN8_SURFACE_DW1_MOCS__SHIFT
;
1652 ilo_builder_surface_reloc64(builder
, state_offset
, 8, surf
->bo
,
1653 surf
->payload
[8], (for_render
) ? INTEL_RELOC_WRITE
: 0);
1657 state_len
= (ilo_dev_gen(builder
->dev
) >= ILO_GEN(7)) ? 8 : 6;
1659 state_offset
= ilo_builder_surface_pointer(builder
,
1660 ILO_BUILDER_ITEM_SURFACE
, state_align
, state_len
, &dw
);
1661 memcpy(dw
, surf
->payload
, state_len
<< 2);
1665 * For scanouts, we should not enable caching in LLC. Since we only
1666 * enable that on Gen8+, we are fine here.
1668 dw
[5] |= builder
->mocs
<< GEN6_SURFACE_DW5_MOCS__SHIFT
;
1670 ilo_builder_surface_reloc(builder
, state_offset
, 1, surf
->bo
,
1671 surf
->payload
[1], (for_render
) ? INTEL_RELOC_WRITE
: 0);
1675 return state_offset
;
1678 static inline uint32_t
1679 gen6_so_SURFACE_STATE(struct ilo_builder
*builder
,
1680 const struct pipe_stream_output_target
*so
,
1681 const struct pipe_stream_output_info
*so_info
,
1684 struct ilo_buffer
*buf
= ilo_buffer(so
->buffer
);
1685 unsigned bo_offset
, struct_size
;
1686 enum pipe_format elem_format
;
1687 struct ilo_view_surface surf
;
1689 ILO_DEV_ASSERT(builder
->dev
, 6, 6);
1691 bo_offset
= so
->buffer_offset
+ so_info
->output
[so_index
].dst_offset
* 4;
1692 struct_size
= so_info
->stride
[so_info
->output
[so_index
].output_buffer
] * 4;
1694 switch (so_info
->output
[so_index
].num_components
) {
1696 elem_format
= PIPE_FORMAT_R32_FLOAT
;
1699 elem_format
= PIPE_FORMAT_R32G32_FLOAT
;
1702 elem_format
= PIPE_FORMAT_R32G32B32_FLOAT
;
1705 elem_format
= PIPE_FORMAT_R32G32B32A32_FLOAT
;
1708 assert(!"unexpected SO components length");
1709 elem_format
= PIPE_FORMAT_R32_FLOAT
;
1713 ilo_gpe_init_view_surface_for_buffer(builder
->dev
, buf
, bo_offset
,
1714 so
->buffer_size
, struct_size
, elem_format
, false, &surf
);
1716 return gen6_SURFACE_STATE(builder
, &surf
, false);
1719 static inline uint32_t
1720 gen6_SAMPLER_STATE(struct ilo_builder
*builder
,
1721 const struct ilo_sampler_cso
* const *samplers
,
1722 const struct pipe_sampler_view
* const *views
,
1723 const uint32_t *sampler_border_colors
,
1726 const int state_align
= 32;
1727 const int state_len
= 4 * num_samplers
;
1728 uint32_t state_offset
, *dw
;
1731 ILO_DEV_ASSERT(builder
->dev
, 6, 8);
1734 * From the Sandy Bridge PRM, volume 4 part 1, page 101:
1736 * "The sampler state is stored as an array of up to 16 elements..."
1738 assert(num_samplers
<= 16);
1744 * From the Sandy Bridge PRM, volume 2 part 1, page 132:
1746 * "(Sampler Count of 3DSTATE_VS) Specifies how many samplers (in
1747 * multiples of 4) the vertex shader 0 kernel uses. Used only for
1748 * prefetching the associated sampler state entries.
1750 * It also applies to other shader stages.
1752 ilo_builder_dynamic_pad_top(builder
, 4 * (4 - (num_samplers
% 4)));
1754 state_offset
= ilo_builder_dynamic_pointer(builder
,
1755 ILO_BUILDER_ITEM_SAMPLER
, state_align
, state_len
, &dw
);
1757 for (i
= 0; i
< num_samplers
; i
++) {
1758 const struct ilo_sampler_cso
*sampler
= samplers
[i
];
1759 const struct pipe_sampler_view
*view
= views
[i
];
1760 const uint32_t border_color
= sampler_border_colors
[i
];
1761 uint32_t dw_filter
, dw_wrap
;
1763 /* there may be holes */
1764 if (!sampler
|| !view
) {
1765 /* disabled sampler */
1775 /* determine filter and wrap modes */
1776 switch (view
->texture
->target
) {
1777 case PIPE_TEXTURE_1D
:
1778 dw_filter
= (sampler
->anisotropic
) ?
1779 sampler
->dw_filter_aniso
: sampler
->dw_filter
;
1780 dw_wrap
= sampler
->dw_wrap_1d
;
1782 case PIPE_TEXTURE_3D
:
1784 * From the Sandy Bridge PRM, volume 4 part 1, page 103:
1786 * "Only MAPFILTER_NEAREST and MAPFILTER_LINEAR are supported for
1787 * surfaces of type SURFTYPE_3D."
1789 dw_filter
= sampler
->dw_filter
;
1790 dw_wrap
= sampler
->dw_wrap
;
1792 case PIPE_TEXTURE_CUBE
:
1793 dw_filter
= (sampler
->anisotropic
) ?
1794 sampler
->dw_filter_aniso
: sampler
->dw_filter
;
1795 dw_wrap
= sampler
->dw_wrap_cube
;
1798 dw_filter
= (sampler
->anisotropic
) ?
1799 sampler
->dw_filter_aniso
: sampler
->dw_filter
;
1800 dw_wrap
= sampler
->dw_wrap
;
1804 dw
[0] = sampler
->payload
[0];
1805 dw
[1] = sampler
->payload
[1];
1806 assert(!(border_color
& 0x1f));
1807 dw
[2] = border_color
;
1808 dw
[3] = sampler
->payload
[2];
1812 if (ilo_dev_gen(builder
->dev
) >= ILO_GEN(7)) {
1817 * From the Sandy Bridge PRM, volume 4 part 1, page 21:
1819 * "[DevSNB] Errata: Incorrect behavior is observed in cases
1820 * where the min and mag mode filters are different and
1821 * SurfMinLOD is nonzero. The determination of MagMode uses the
1822 * following equation instead of the one in the above
1823 * pseudocode: MagMode = (LOD + SurfMinLOD - Base <= 0)"
1825 * As a way to work around that, we set Base to
1826 * view->u.tex.first_level.
1828 dw
[0] |= view
->u
.tex
.first_level
<< 22;
1836 return state_offset
;
1839 static inline uint32_t
1840 gen6_SAMPLER_BORDER_COLOR_STATE(struct ilo_builder
*builder
,
1841 const struct ilo_sampler_cso
*sampler
)
1843 const int state_align
=
1844 (ilo_dev_gen(builder
->dev
) >= ILO_GEN(8)) ? 64 : 32;
1845 const int state_len
= (ilo_dev_gen(builder
->dev
) >= ILO_GEN(7)) ? 4 : 12;
1847 ILO_DEV_ASSERT(builder
->dev
, 6, 8);
1849 assert(Elements(sampler
->payload
) >= 3 + state_len
);
1851 /* see ilo_gpe_init_sampler_cso() */
1852 return ilo_builder_dynamic_write(builder
, ILO_BUILDER_ITEM_BLOB
,
1853 state_align
, state_len
, &sampler
->payload
[3]);
1856 static inline uint32_t
1857 gen6_push_constant_buffer(struct ilo_builder
*builder
,
1858 int size
, void **pcb
)
1861 * For all VS, GS, FS, and CS push constant buffers, they must be aligned
1862 * to 32 bytes, and their sizes are specified in 256-bit units.
1864 const int state_align
= 32;
1865 const int state_len
= align(size
, 32) / 4;
1866 uint32_t state_offset
;
1869 ILO_DEV_ASSERT(builder
->dev
, 6, 8);
1871 state_offset
= ilo_builder_dynamic_pointer(builder
,
1872 ILO_BUILDER_ITEM_BLOB
, state_align
, state_len
, (uint32_t **) &buf
);
1874 /* zero out the unused range */
1875 if (size
< state_len
* 4)
1876 memset(&buf
[size
], 0, state_len
* 4 - size
);
1881 return state_offset
;
1884 static inline uint32_t
1885 gen6_user_vertex_buffer(struct ilo_builder
*builder
,
1886 int size
, const void *vertices
)
1888 const int state_align
= 8;
1889 const int state_len
= size
/ 4;
1891 ILO_DEV_ASSERT(builder
->dev
, 6, 7.5);
1893 assert(size
% 4 == 0);
1895 return ilo_builder_dynamic_write(builder
, ILO_BUILDER_ITEM_BLOB
,
1896 state_align
, state_len
, vertices
);
1899 #endif /* ILO_BUILDER_3D_TOP_H */