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ilo: embed ilo_state_urb in ilo_state_vector
[mesa.git] / src / gallium / drivers / ilo / core / ilo_builder_3d_top.h
1 /*
2 * Mesa 3-D graphics library
3 *
4 * Copyright (C) 2014 LunarG, Inc.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included
14 * in all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
23 *
24 * Authors:
25 * Chia-I Wu <olv@lunarg.com>
26 */
27
28 #ifndef ILO_BUILDER_3D_TOP_H
29 #define ILO_BUILDER_3D_TOP_H
30
31 #include "genhw/genhw.h"
32 #include "../ilo_resource.h"
33 #include "../ilo_shader.h"
34 #include "intel_winsys.h"
35
36 #include "ilo_core.h"
37 #include "ilo_dev.h"
38 #include "ilo_state_3d.h"
39 #include "ilo_state_sampler.h"
40 #include "ilo_state_sol.h"
41 #include "ilo_state_urb.h"
42 #include "ilo_builder.h"
43
44 static inline void
45 gen6_3DSTATE_URB(struct ilo_builder *builder,
46 const struct ilo_state_urb *urb)
47 {
48 const uint8_t cmd_len = 3;
49 uint32_t *dw;
50
51 ilo_builder_batch_pointer(builder, cmd_len, &dw);
52
53 dw[0] = GEN6_RENDER_CMD(3D, 3DSTATE_URB) | (cmd_len - 2);
54 /* see urb_set_gen6_3DSTATE_URB() */
55 dw[1] = urb->urb[0];
56 dw[2] = urb->urb[1];
57 }
58
59 static inline void
60 gen7_3DSTATE_PUSH_CONSTANT_ALLOC_VS(struct ilo_builder *builder,
61 const struct ilo_state_urb *urb)
62 {
63 const uint8_t cmd_len = 2;
64 uint32_t *dw;
65
66 ilo_builder_batch_pointer(builder, cmd_len, &dw);
67
68 dw[0] = GEN7_RENDER_CMD(3D, 3DSTATE_PUSH_CONSTANT_ALLOC_VS) |
69 (cmd_len - 2);
70 /* see urb_set_gen7_3dstate_push_constant_alloc() */
71 dw[1] = urb->pcb[0];
72 }
73
74 static inline void
75 gen7_3DSTATE_PUSH_CONSTANT_ALLOC_HS(struct ilo_builder *builder,
76 const struct ilo_state_urb *urb)
77 {
78 const uint8_t cmd_len = 2;
79 uint32_t *dw;
80
81 ilo_builder_batch_pointer(builder, cmd_len, &dw);
82
83 dw[0] = GEN7_RENDER_CMD(3D, 3DSTATE_PUSH_CONSTANT_ALLOC_HS) |
84 (cmd_len - 2);
85 /* see urb_set_gen7_3dstate_push_constant_alloc() */
86 dw[1] = urb->pcb[1];
87 }
88
89 static inline void
90 gen7_3DSTATE_PUSH_CONSTANT_ALLOC_DS(struct ilo_builder *builder,
91 const struct ilo_state_urb *urb)
92 {
93 const uint8_t cmd_len = 2;
94 uint32_t *dw;
95
96 ilo_builder_batch_pointer(builder, cmd_len, &dw);
97
98 dw[0] = GEN7_RENDER_CMD(3D, 3DSTATE_PUSH_CONSTANT_ALLOC_DS) |
99 (cmd_len - 2);
100 /* see urb_set_gen7_3dstate_push_constant_alloc() */
101 dw[1] = urb->pcb[2];
102 }
103
104 static inline void
105 gen7_3DSTATE_PUSH_CONSTANT_ALLOC_GS(struct ilo_builder *builder,
106 const struct ilo_state_urb *urb)
107 {
108 const uint8_t cmd_len = 2;
109 uint32_t *dw;
110
111 ilo_builder_batch_pointer(builder, cmd_len, &dw);
112
113 dw[0] = GEN7_RENDER_CMD(3D, 3DSTATE_PUSH_CONSTANT_ALLOC_GS) |
114 (cmd_len - 2);
115 /* see urb_set_gen7_3dstate_push_constant_alloc() */
116 dw[1] = urb->pcb[3];
117 }
118
119 static inline void
120 gen7_3DSTATE_PUSH_CONSTANT_ALLOC_PS(struct ilo_builder *builder,
121 const struct ilo_state_urb *urb)
122 {
123 const uint8_t cmd_len = 2;
124 uint32_t *dw;
125
126 ilo_builder_batch_pointer(builder, cmd_len, &dw);
127
128 dw[0] = GEN7_RENDER_CMD(3D, 3DSTATE_PUSH_CONSTANT_ALLOC_PS) |
129 (cmd_len - 2);
130 /* see urb_set_gen7_3dstate_push_constant_alloc() */
131 dw[1] = urb->pcb[4];
132 }
133
134 static inline void
135 gen7_3DSTATE_URB_VS(struct ilo_builder *builder,
136 const struct ilo_state_urb *urb)
137 {
138 const uint8_t cmd_len = 2;
139 uint32_t *dw;
140
141 ilo_builder_batch_pointer(builder, cmd_len, &dw);
142
143 dw[0] = GEN7_RENDER_CMD(3D, 3DSTATE_URB_VS) | (cmd_len - 2);
144 /* see urb_set_gen7_3dstate_push_constant_alloc() */
145 dw[1] = urb->urb[0];
146 }
147
148 static inline void
149 gen7_3DSTATE_URB_HS(struct ilo_builder *builder,
150 const struct ilo_state_urb *urb)
151 {
152 const uint8_t cmd_len = 2;
153 uint32_t *dw;
154
155 ilo_builder_batch_pointer(builder, cmd_len, &dw);
156
157 dw[0] = GEN7_RENDER_CMD(3D, 3DSTATE_URB_HS) | (cmd_len - 2);
158 /* see urb_set_gen7_3dstate_push_constant_alloc() */
159 dw[1] = urb->urb[1];
160 }
161
162 static inline void
163 gen7_3DSTATE_URB_DS(struct ilo_builder *builder,
164 const struct ilo_state_urb *urb)
165 {
166 const uint8_t cmd_len = 2;
167 uint32_t *dw;
168
169 ilo_builder_batch_pointer(builder, cmd_len, &dw);
170
171 dw[0] = GEN7_RENDER_CMD(3D, 3DSTATE_URB_DS) | (cmd_len - 2);
172 /* see urb_set_gen7_3dstate_push_constant_alloc() */
173 dw[1] = urb->urb[2];
174 }
175
176 static inline void
177 gen7_3DSTATE_URB_GS(struct ilo_builder *builder,
178 const struct ilo_state_urb *urb)
179 {
180 const uint8_t cmd_len = 2;
181 uint32_t *dw;
182
183 ilo_builder_batch_pointer(builder, cmd_len, &dw);
184
185 dw[0] = GEN7_RENDER_CMD(3D, 3DSTATE_URB_GS) | (cmd_len - 2);
186 /* see urb_set_gen7_3dstate_push_constant_alloc() */
187 dw[1] = urb->urb[3];
188 }
189
190 static inline void
191 gen75_3DSTATE_VF(struct ilo_builder *builder,
192 bool enable_cut_index,
193 uint32_t cut_index)
194 {
195 const uint8_t cmd_len = 2;
196 uint32_t *dw;
197
198 ILO_DEV_ASSERT(builder->dev, 7.5, 8);
199
200 ilo_builder_batch_pointer(builder, cmd_len, &dw);
201
202 dw[0] = GEN75_RENDER_CMD(3D, 3DSTATE_VF) | (cmd_len - 2);
203 if (enable_cut_index)
204 dw[0] |= GEN75_VF_DW0_CUT_INDEX_ENABLE;
205
206 dw[1] = cut_index;
207 }
208
209 static inline void
210 gen6_3DSTATE_VF_STATISTICS(struct ilo_builder *builder,
211 bool enable)
212 {
213 const uint8_t cmd_len = 1;
214 const uint32_t dw0 = GEN6_RENDER_CMD(SINGLE_DW, 3DSTATE_VF_STATISTICS) |
215 enable;
216
217 ILO_DEV_ASSERT(builder->dev, 6, 8);
218
219 ilo_builder_batch_write(builder, cmd_len, &dw0);
220 }
221
222 /**
223 * Translate a pipe primitive type to the matching hardware primitive type.
224 */
225 static inline int
226 gen6_3d_translate_pipe_prim(unsigned prim)
227 {
228 static const int prim_mapping[ILO_PRIM_MAX] = {
229 [PIPE_PRIM_POINTS] = GEN6_3DPRIM_POINTLIST,
230 [PIPE_PRIM_LINES] = GEN6_3DPRIM_LINELIST,
231 [PIPE_PRIM_LINE_LOOP] = GEN6_3DPRIM_LINELOOP,
232 [PIPE_PRIM_LINE_STRIP] = GEN6_3DPRIM_LINESTRIP,
233 [PIPE_PRIM_TRIANGLES] = GEN6_3DPRIM_TRILIST,
234 [PIPE_PRIM_TRIANGLE_STRIP] = GEN6_3DPRIM_TRISTRIP,
235 [PIPE_PRIM_TRIANGLE_FAN] = GEN6_3DPRIM_TRIFAN,
236 [PIPE_PRIM_QUADS] = GEN6_3DPRIM_QUADLIST,
237 [PIPE_PRIM_QUAD_STRIP] = GEN6_3DPRIM_QUADSTRIP,
238 [PIPE_PRIM_POLYGON] = GEN6_3DPRIM_POLYGON,
239 [PIPE_PRIM_LINES_ADJACENCY] = GEN6_3DPRIM_LINELIST_ADJ,
240 [PIPE_PRIM_LINE_STRIP_ADJACENCY] = GEN6_3DPRIM_LINESTRIP_ADJ,
241 [PIPE_PRIM_TRIANGLES_ADJACENCY] = GEN6_3DPRIM_TRILIST_ADJ,
242 [PIPE_PRIM_TRIANGLE_STRIP_ADJACENCY] = GEN6_3DPRIM_TRISTRIP_ADJ,
243 [ILO_PRIM_RECTANGLES] = GEN6_3DPRIM_RECTLIST,
244 };
245
246 assert(prim_mapping[prim]);
247
248 return prim_mapping[prim];
249 }
250
251 static inline void
252 gen8_3DSTATE_VF_TOPOLOGY(struct ilo_builder *builder, unsigned pipe_prim)
253 {
254 const uint8_t cmd_len = 2;
255 const int prim = gen6_3d_translate_pipe_prim(pipe_prim);
256 uint32_t *dw;
257
258 ILO_DEV_ASSERT(builder->dev, 8, 8);
259
260 ilo_builder_batch_pointer(builder, cmd_len, &dw);
261
262 dw[0] = GEN8_RENDER_CMD(3D, 3DSTATE_VF_TOPOLOGY) | (cmd_len - 2);
263 dw[1] = prim;
264 }
265
266 static inline void
267 gen8_3DSTATE_VF_INSTANCING(struct ilo_builder *builder,
268 int vb_index, uint32_t step_rate)
269 {
270 const uint8_t cmd_len = 3;
271 uint32_t *dw;
272
273 ILO_DEV_ASSERT(builder->dev, 8, 8);
274
275 ilo_builder_batch_pointer(builder, cmd_len, &dw);
276
277 dw[0] = GEN8_RENDER_CMD(3D, 3DSTATE_VF_INSTANCING) | (cmd_len - 2);
278 dw[1] = vb_index;
279 if (step_rate)
280 dw[1] |= GEN8_INSTANCING_DW1_ENABLE;
281 dw[2] = step_rate;
282 }
283
284 static inline void
285 gen8_3DSTATE_VF_SGVS(struct ilo_builder *builder,
286 bool vid_enable, int vid_ve, int vid_comp,
287 bool iid_enable, int iid_ve, int iid_comp)
288 {
289 const uint8_t cmd_len = 2;
290 uint32_t *dw;
291
292 ILO_DEV_ASSERT(builder->dev, 8, 8);
293
294 ilo_builder_batch_pointer(builder, cmd_len, &dw);
295
296 dw[0] = GEN8_RENDER_CMD(3D, 3DSTATE_VF_SGVS) | (cmd_len - 2);
297 dw[1] = 0;
298
299 if (iid_enable) {
300 dw[1] |= GEN8_SGVS_DW1_IID_ENABLE |
301 vid_comp << GEN8_SGVS_DW1_IID_VE_COMP__SHIFT |
302 vid_ve << GEN8_SGVS_DW1_IID_VE_INDEX__SHIFT;
303 }
304
305 if (vid_enable) {
306 dw[1] |= GEN8_SGVS_DW1_VID_ENABLE |
307 vid_comp << GEN8_SGVS_DW1_VID_VE_COMP__SHIFT |
308 vid_ve << GEN8_SGVS_DW1_VID_VE_INDEX__SHIFT;
309 }
310 }
311
312 static inline void
313 gen6_3DSTATE_VERTEX_BUFFERS(struct ilo_builder *builder,
314 const struct ilo_ve_state *ve,
315 const struct ilo_vb_state *vb)
316 {
317 uint8_t cmd_len;
318 uint32_t *dw;
319 unsigned pos, hw_idx;
320
321 ILO_DEV_ASSERT(builder->dev, 6, 8);
322
323 /*
324 * From the Sandy Bridge PRM, volume 2 part 1, page 82:
325 *
326 * "From 1 to 33 VBs can be specified..."
327 */
328 assert(ve->vb_count <= 33);
329
330 if (!ve->vb_count)
331 return;
332
333 cmd_len = 1 + 4 * ve->vb_count;
334 pos = ilo_builder_batch_pointer(builder, cmd_len, &dw);
335
336 dw[0] = GEN6_RENDER_CMD(3D, 3DSTATE_VERTEX_BUFFERS) | (cmd_len - 2);
337 dw++;
338 pos++;
339
340 for (hw_idx = 0; hw_idx < ve->vb_count; hw_idx++) {
341 const unsigned instance_divisor = ve->instance_divisors[hw_idx];
342 const unsigned pipe_idx = ve->vb_mapping[hw_idx];
343 const struct pipe_vertex_buffer *cso = &vb->states[pipe_idx];
344
345 dw[0] = hw_idx << GEN6_VB_DW0_INDEX__SHIFT;
346
347 if (ilo_dev_gen(builder->dev) >= ILO_GEN(8))
348 dw[0] |= builder->mocs << GEN8_VB_DW0_MOCS__SHIFT;
349 else
350 dw[0] |= builder->mocs << GEN6_VB_DW0_MOCS__SHIFT;
351
352 if (ilo_dev_gen(builder->dev) >= ILO_GEN(7))
353 dw[0] |= GEN7_VB_DW0_ADDR_MODIFIED;
354
355 if (instance_divisor)
356 dw[0] |= GEN6_VB_DW0_ACCESS_INSTANCEDATA;
357 else
358 dw[0] |= GEN6_VB_DW0_ACCESS_VERTEXDATA;
359
360 /* use null vb if there is no buffer or the stride is out of range */
361 if (!cso->buffer || cso->stride > 2048) {
362 dw[0] |= GEN6_VB_DW0_IS_NULL;
363 dw[1] = 0;
364 dw[2] = 0;
365 dw[3] = (ilo_dev_gen(builder->dev) >= ILO_GEN(8)) ?
366 0 : instance_divisor;
367
368 continue;
369 }
370
371 dw[0] |= cso->stride << GEN6_VB_DW0_PITCH__SHIFT;
372
373 if (ilo_dev_gen(builder->dev) >= ILO_GEN(8)) {
374 const struct ilo_buffer *buf = ilo_buffer(cso->buffer);
375 const uint32_t start_offset = cso->buffer_offset;
376
377 ilo_builder_batch_reloc64(builder, pos + 1,
378 buf->bo, start_offset, 0);
379 dw[3] = buf->bo_size;
380 } else {
381 const struct ilo_buffer *buf = ilo_buffer(cso->buffer);
382 const uint32_t start_offset = cso->buffer_offset;
383 const uint32_t end_offset = buf->bo_size - 1;
384
385 dw[3] = instance_divisor;
386
387 ilo_builder_batch_reloc(builder, pos + 1, buf->bo, start_offset, 0);
388 ilo_builder_batch_reloc(builder, pos + 2, buf->bo, end_offset, 0);
389 }
390
391 dw += 4;
392 pos += 4;
393 }
394 }
395
396 /* the user vertex buffer must be uploaded with gen6_user_vertex_buffer() */
397 static inline void
398 gen6_user_3DSTATE_VERTEX_BUFFERS(struct ilo_builder *builder,
399 uint32_t vb_begin, uint32_t vb_end,
400 uint32_t stride)
401 {
402 const struct ilo_builder_writer *bat =
403 &builder->writers[ILO_BUILDER_WRITER_BATCH];
404 const uint8_t cmd_len = 1 + 4;
405 uint32_t *dw;
406 unsigned pos;
407
408 ILO_DEV_ASSERT(builder->dev, 6, 7.5);
409
410 pos = ilo_builder_batch_pointer(builder, cmd_len, &dw);
411
412 dw[0] = GEN6_RENDER_CMD(3D, 3DSTATE_VERTEX_BUFFERS) | (cmd_len - 2);
413 dw++;
414 pos++;
415
416 /* VERTEX_BUFFER_STATE */
417 dw[0] = 0 << GEN6_VB_DW0_INDEX__SHIFT |
418 GEN6_VB_DW0_ACCESS_VERTEXDATA |
419 stride << GEN6_VB_DW0_PITCH__SHIFT;
420 if (ilo_dev_gen(builder->dev) >= ILO_GEN(7))
421 dw[0] |= GEN7_VB_DW0_ADDR_MODIFIED;
422
423 dw[3] = 0;
424
425 ilo_builder_batch_reloc(builder, pos + 1, bat->bo, vb_begin, 0);
426 ilo_builder_batch_reloc(builder, pos + 2, bat->bo, vb_end, 0);
427 }
428
429 static inline void
430 gen6_3DSTATE_VERTEX_ELEMENTS(struct ilo_builder *builder,
431 const struct ilo_ve_state *ve)
432 {
433 uint8_t cmd_len;
434 uint32_t *dw;
435 unsigned i;
436
437 ILO_DEV_ASSERT(builder->dev, 6, 8);
438
439 /*
440 * From the Sandy Bridge PRM, volume 2 part 1, page 92:
441 *
442 * "At least one VERTEX_ELEMENT_STATE structure must be included."
443 *
444 * From the Sandy Bridge PRM, volume 2 part 1, page 93:
445 *
446 * "Up to 34 (DevSNB+) vertex elements are supported."
447 */
448 assert(ve->count + ve->prepend_nosrc_cso >= 1);
449 assert(ve->count + ve->prepend_nosrc_cso <= 34);
450
451 STATIC_ASSERT(Elements(ve->cso[0].payload) == 2);
452
453 cmd_len = 1 + 2 * (ve->count + ve->prepend_nosrc_cso);
454 ilo_builder_batch_pointer(builder, cmd_len, &dw);
455
456 dw[0] = GEN6_RENDER_CMD(3D, 3DSTATE_VERTEX_ELEMENTS) | (cmd_len - 2);
457 dw++;
458
459 if (ve->prepend_nosrc_cso) {
460 memcpy(dw, ve->nosrc_cso.payload, sizeof(ve->nosrc_cso.payload));
461 dw += 2;
462 }
463
464 for (i = 0; i < ve->count - ve->last_cso_edgeflag; i++) {
465 memcpy(dw, ve->cso[i].payload, sizeof(ve->cso[i].payload));
466 dw += 2;
467 }
468
469 if (ve->last_cso_edgeflag)
470 memcpy(dw, ve->edgeflag_cso.payload, sizeof(ve->edgeflag_cso.payload));
471 }
472
473 static inline void
474 gen6_3DSTATE_INDEX_BUFFER(struct ilo_builder *builder,
475 const struct ilo_ib_state *ib,
476 bool enable_cut_index)
477 {
478 const uint8_t cmd_len = 3;
479 struct ilo_buffer *buf = ilo_buffer(ib->hw_resource);
480 uint32_t start_offset, end_offset;
481 int format;
482 uint32_t *dw;
483 unsigned pos;
484
485 ILO_DEV_ASSERT(builder->dev, 6, 7.5);
486
487 if (!buf)
488 return;
489
490 /* this is moved to the new 3DSTATE_VF */
491 if (ilo_dev_gen(builder->dev) >= ILO_GEN(7.5))
492 assert(!enable_cut_index);
493
494 switch (ib->hw_index_size) {
495 case 4:
496 format = GEN6_IB_DW0_FORMAT_DWORD;
497 break;
498 case 2:
499 format = GEN6_IB_DW0_FORMAT_WORD;
500 break;
501 case 1:
502 format = GEN6_IB_DW0_FORMAT_BYTE;
503 break;
504 default:
505 assert(!"unknown index size");
506 format = GEN6_IB_DW0_FORMAT_BYTE;
507 break;
508 }
509
510 /*
511 * set start_offset to 0 here and adjust pipe_draw_info::start with
512 * ib->draw_start_offset in 3DPRIMITIVE
513 */
514 start_offset = 0;
515 end_offset = buf->bo_size;
516
517 /* end_offset must also be aligned and is inclusive */
518 end_offset -= (end_offset % ib->hw_index_size);
519 end_offset--;
520
521 pos = ilo_builder_batch_pointer(builder, cmd_len, &dw);
522
523 dw[0] = GEN6_RENDER_CMD(3D, 3DSTATE_INDEX_BUFFER) | (cmd_len - 2) |
524 builder->mocs << GEN6_IB_DW0_MOCS__SHIFT |
525 format;
526 if (enable_cut_index)
527 dw[0] |= GEN6_IB_DW0_CUT_INDEX_ENABLE;
528
529 ilo_builder_batch_reloc(builder, pos + 1, buf->bo, start_offset, 0);
530 ilo_builder_batch_reloc(builder, pos + 2, buf->bo, end_offset, 0);
531 }
532
533 static inline void
534 gen8_3DSTATE_INDEX_BUFFER(struct ilo_builder *builder,
535 const struct ilo_ib_state *ib)
536 {
537 const uint8_t cmd_len = 5;
538 struct ilo_buffer *buf = ilo_buffer(ib->hw_resource);
539 int format;
540 uint32_t *dw;
541 unsigned pos;
542
543 ILO_DEV_ASSERT(builder->dev, 8, 8);
544
545 if (!buf)
546 return;
547
548 switch (ib->hw_index_size) {
549 case 4:
550 format = GEN8_IB_DW1_FORMAT_DWORD;
551 break;
552 case 2:
553 format = GEN8_IB_DW1_FORMAT_WORD;
554 break;
555 case 1:
556 format = GEN8_IB_DW1_FORMAT_BYTE;
557 break;
558 default:
559 assert(!"unknown index size");
560 format = GEN8_IB_DW1_FORMAT_BYTE;
561 break;
562 }
563
564 pos = ilo_builder_batch_pointer(builder, cmd_len, &dw);
565
566 dw[0] = GEN6_RENDER_CMD(3D, 3DSTATE_INDEX_BUFFER) | (cmd_len - 2);
567 dw[1] = format |
568 builder->mocs << GEN8_IB_DW1_MOCS__SHIFT;
569 dw[4] = buf->bo_size;
570
571 /* ignore ib->offset here in favor of adjusting 3DPRIMITIVE */
572 ilo_builder_batch_reloc64(builder, pos + 2, buf->bo, 0, 0);
573 }
574
575 static inline void
576 gen6_3DSTATE_VS(struct ilo_builder *builder,
577 const struct ilo_shader_state *vs)
578 {
579 const uint8_t cmd_len = 6;
580 const struct ilo_shader_cso *cso;
581 uint32_t dw2, dw4, dw5, *dw;
582
583 ILO_DEV_ASSERT(builder->dev, 6, 7.5);
584
585 cso = ilo_shader_get_kernel_cso(vs);
586 dw2 = cso->payload[0];
587 dw4 = cso->payload[1];
588 dw5 = cso->payload[2];
589
590 ilo_builder_batch_pointer(builder, cmd_len, &dw);
591
592 dw[0] = GEN6_RENDER_CMD(3D, 3DSTATE_VS) | (cmd_len - 2);
593 dw[1] = ilo_shader_get_kernel_offset(vs);
594 dw[2] = dw2;
595 dw[3] = 0; /* scratch */
596 dw[4] = dw4;
597 dw[5] = dw5;
598 }
599
600 static inline void
601 gen8_3DSTATE_VS(struct ilo_builder *builder,
602 const struct ilo_shader_state *vs,
603 uint32_t clip_plane_enable)
604 {
605 const uint8_t cmd_len = 9;
606 const struct ilo_shader_cso *cso;
607 uint32_t dw3, dw6, dw7, dw8, *dw;
608
609 ILO_DEV_ASSERT(builder->dev, 8, 8);
610
611 cso = ilo_shader_get_kernel_cso(vs);
612 dw3 = cso->payload[0];
613 dw6 = cso->payload[1];
614 dw7 = cso->payload[2];
615 dw8 = clip_plane_enable << GEN8_VS_DW8_UCP_CLIP_ENABLES__SHIFT;
616
617 ilo_builder_batch_pointer(builder, cmd_len, &dw);
618
619 dw[0] = GEN6_RENDER_CMD(3D, 3DSTATE_VS) | (cmd_len - 2);
620 dw[1] = ilo_shader_get_kernel_offset(vs);
621 dw[2] = 0;
622 dw[3] = dw3;
623 dw[4] = 0; /* scratch */
624 dw[5] = 0;
625 dw[6] = dw6;
626 dw[7] = dw7;
627 dw[8] = dw8;
628 }
629
630 static inline void
631 gen6_disable_3DSTATE_VS(struct ilo_builder *builder)
632 {
633 const uint8_t cmd_len = 6;
634 uint32_t *dw;
635
636 ILO_DEV_ASSERT(builder->dev, 6, 7.5);
637
638 ilo_builder_batch_pointer(builder, cmd_len, &dw);
639
640 dw[0] = GEN6_RENDER_CMD(3D, 3DSTATE_VS) | (cmd_len - 2);
641 dw[1] = 0;
642 dw[2] = 0;
643 dw[3] = 0;
644 dw[4] = 0;
645 dw[5] = 0;
646 }
647
648 static inline void
649 gen7_disable_3DSTATE_HS(struct ilo_builder *builder)
650 {
651 const uint8_t cmd_len = (ilo_dev_gen(builder->dev) >= ILO_GEN(8)) ? 9 : 7;
652 uint32_t *dw;
653
654 ILO_DEV_ASSERT(builder->dev, 7, 8);
655
656 ilo_builder_batch_pointer(builder, cmd_len, &dw);
657
658 dw[0] = GEN7_RENDER_CMD(3D, 3DSTATE_HS) | (cmd_len - 2);
659 dw[1] = 0;
660 dw[2] = 0;
661 dw[3] = 0;
662 dw[4] = 0;
663 dw[5] = 0;
664 dw[6] = 0;
665 if (ilo_dev_gen(builder->dev) >= ILO_GEN(8)) {
666 dw[7] = 0;
667 dw[8] = 0;
668 }
669 }
670
671 static inline void
672 gen7_3DSTATE_TE(struct ilo_builder *builder)
673 {
674 const uint8_t cmd_len = 4;
675 uint32_t *dw;
676
677 ILO_DEV_ASSERT(builder->dev, 7, 8);
678
679 ilo_builder_batch_pointer(builder, cmd_len, &dw);
680
681 dw[0] = GEN7_RENDER_CMD(3D, 3DSTATE_TE) | (cmd_len - 2);
682 dw[1] = 0;
683 dw[2] = 0;
684 dw[3] = 0;
685 }
686
687 static inline void
688 gen7_disable_3DSTATE_DS(struct ilo_builder *builder)
689 {
690 const uint8_t cmd_len = (ilo_dev_gen(builder->dev) >= ILO_GEN(8)) ? 9 : 6;
691 uint32_t *dw;
692
693 ILO_DEV_ASSERT(builder->dev, 7, 8);
694
695 ilo_builder_batch_pointer(builder, cmd_len, &dw);
696
697 dw[0] = GEN7_RENDER_CMD(3D, 3DSTATE_DS) | (cmd_len - 2);
698 dw[1] = 0;
699 dw[2] = 0;
700 dw[3] = 0;
701 dw[4] = 0;
702 dw[5] = 0;
703 if (ilo_dev_gen(builder->dev) >= ILO_GEN(8)) {
704 dw[6] = 0;
705 dw[7] = 0;
706 dw[8] = 0;
707 }
708 }
709
710 static inline void
711 gen6_3DSTATE_GS(struct ilo_builder *builder,
712 const struct ilo_shader_state *gs)
713 {
714 const uint8_t cmd_len = 7;
715 const struct ilo_shader_cso *cso;
716 uint32_t dw2, dw4, dw5, dw6, *dw;
717
718 ILO_DEV_ASSERT(builder->dev, 6, 6);
719
720 cso = ilo_shader_get_kernel_cso(gs);
721 dw2 = cso->payload[0];
722 dw4 = cso->payload[1];
723 dw5 = cso->payload[2];
724 dw6 = cso->payload[3];
725
726 ilo_builder_batch_pointer(builder, cmd_len, &dw);
727
728 dw[0] = GEN6_RENDER_CMD(3D, 3DSTATE_GS) | (cmd_len - 2);
729 dw[1] = ilo_shader_get_kernel_offset(gs);
730 dw[2] = dw2;
731 dw[3] = 0; /* scratch */
732 dw[4] = dw4;
733 dw[5] = dw5;
734 dw[6] = dw6;
735 }
736
737 static inline void
738 gen6_so_3DSTATE_GS(struct ilo_builder *builder,
739 const struct ilo_shader_state *vs,
740 int verts_per_prim)
741 {
742 const uint8_t cmd_len = 7;
743 struct ilo_shader_cso cso;
744 enum ilo_kernel_param param;
745 uint32_t dw2, dw4, dw5, dw6, *dw;
746
747 ILO_DEV_ASSERT(builder->dev, 6, 6);
748
749 assert(ilo_shader_get_kernel_param(vs, ILO_KERNEL_VS_GEN6_SO));
750
751 switch (verts_per_prim) {
752 case 1:
753 param = ILO_KERNEL_VS_GEN6_SO_POINT_OFFSET;
754 break;
755 case 2:
756 param = ILO_KERNEL_VS_GEN6_SO_LINE_OFFSET;
757 break;
758 default:
759 param = ILO_KERNEL_VS_GEN6_SO_TRI_OFFSET;
760 break;
761 }
762
763 /* cannot use VS's CSO */
764 ilo_gpe_init_gs_cso(builder->dev, vs, &cso);
765 dw2 = cso.payload[0];
766 dw4 = cso.payload[1];
767 dw5 = cso.payload[2];
768 dw6 = cso.payload[3];
769
770 ilo_builder_batch_pointer(builder, cmd_len, &dw);
771
772 dw[0] = GEN6_RENDER_CMD(3D, 3DSTATE_GS) | (cmd_len - 2);
773 dw[1] = ilo_shader_get_kernel_offset(vs) +
774 ilo_shader_get_kernel_param(vs, param);
775 dw[2] = dw2;
776 dw[3] = 0;
777 dw[4] = dw4;
778 dw[5] = dw5;
779 dw[6] = dw6;
780 }
781
782 static inline void
783 gen6_disable_3DSTATE_GS(struct ilo_builder *builder)
784 {
785 const uint8_t cmd_len = 7;
786 uint32_t *dw;
787
788 ILO_DEV_ASSERT(builder->dev, 6, 6);
789
790 ilo_builder_batch_pointer(builder, cmd_len, &dw);
791
792 dw[0] = GEN6_RENDER_CMD(3D, 3DSTATE_GS) | (cmd_len - 2);
793 dw[1] = 0;
794 dw[2] = 0;
795 dw[3] = 0;
796 /* honor the valid range of URB read length */
797 dw[4] = 1 << GEN6_GS_DW4_URB_READ_LEN__SHIFT;
798 dw[5] = GEN6_GS_DW5_STATISTICS;
799 dw[6] = 0;
800 }
801
802 static inline void
803 gen6_3DSTATE_GS_SVB_INDEX(struct ilo_builder *builder,
804 int index, unsigned svbi,
805 unsigned max_svbi,
806 bool load_vertex_count)
807 {
808 const uint8_t cmd_len = 4;
809 uint32_t *dw;
810
811 ILO_DEV_ASSERT(builder->dev, 6, 6);
812 assert(index >= 0 && index < 4);
813
814 ilo_builder_batch_pointer(builder, cmd_len, &dw);
815
816 dw[0] = GEN6_RENDER_CMD(3D, 3DSTATE_GS_SVB_INDEX) | (cmd_len - 2);
817
818 dw[1] = index << GEN6_SVBI_DW1_INDEX__SHIFT;
819 if (load_vertex_count)
820 dw[1] |= GEN6_SVBI_DW1_LOAD_INTERNAL_VERTEX_COUNT;
821
822 dw[2] = svbi;
823 dw[3] = max_svbi;
824 }
825
826 static inline void
827 gen7_3DSTATE_GS(struct ilo_builder *builder,
828 const struct ilo_shader_state *gs)
829 {
830 const uint8_t cmd_len = 7;
831 const struct ilo_shader_cso *cso;
832 uint32_t dw2, dw4, dw5, *dw;
833
834 ILO_DEV_ASSERT(builder->dev, 7, 7.5);
835
836 cso = ilo_shader_get_kernel_cso(gs);
837 dw2 = cso->payload[0];
838 dw4 = cso->payload[1];
839 dw5 = cso->payload[2];
840
841 ilo_builder_batch_pointer(builder, cmd_len, &dw);
842
843 dw[0] = GEN6_RENDER_CMD(3D, 3DSTATE_GS) | (cmd_len - 2);
844 dw[1] = ilo_shader_get_kernel_offset(gs);
845 dw[2] = dw2;
846 dw[3] = 0; /* scratch */
847 dw[4] = dw4;
848 dw[5] = dw5;
849 dw[6] = 0;
850 }
851
852 static inline void
853 gen7_disable_3DSTATE_GS(struct ilo_builder *builder)
854 {
855 const uint8_t cmd_len = (ilo_dev_gen(builder->dev) >= ILO_GEN(8)) ? 10 : 7;
856 uint32_t *dw;
857
858 ILO_DEV_ASSERT(builder->dev, 7, 8);
859
860 ilo_builder_batch_pointer(builder, cmd_len, &dw);
861
862 dw[0] = GEN6_RENDER_CMD(3D, 3DSTATE_GS) | (cmd_len - 2);
863 dw[1] = 0;
864 dw[2] = 0;
865 dw[3] = 0;
866 dw[4] = 0;
867
868 if (ilo_dev_gen(builder->dev) >= ILO_GEN(8)) {
869 dw[7] = GEN8_GS_DW7_STATISTICS;
870 dw[8] = 0;
871 dw[9] = 0;
872 } else {
873 dw[5] = GEN7_GS_DW5_STATISTICS;
874 dw[6] = 0;
875 }
876 }
877
878 static inline void
879 gen7_3DSTATE_STREAMOUT(struct ilo_builder *builder,
880 const struct ilo_state_sol *sol)
881 {
882 const uint8_t cmd_len = (ilo_dev_gen(builder->dev) >= ILO_GEN(8)) ? 5 : 3;
883 uint32_t *dw;
884
885 ILO_DEV_ASSERT(builder->dev, 7, 8);
886
887 ilo_builder_batch_pointer(builder, cmd_len, &dw);
888
889 dw[0] = GEN7_RENDER_CMD(3D, 3DSTATE_STREAMOUT) | (cmd_len - 2);
890 /* see sol_set_gen7_3DSTATE_STREAMOUT() */
891 dw[1] = sol->so[0];
892 dw[2] = sol->so[1];
893 if (ilo_dev_gen(builder->dev) >= ILO_GEN(8)) {
894 dw[3] = sol->so[2];
895 dw[4] = sol->so[3];
896 }
897 }
898
899 static inline void
900 gen7_3DSTATE_SO_DECL_LIST(struct ilo_builder *builder,
901 const struct ilo_state_sol *sol)
902 {
903 /*
904 * Note that "DWord Length" has 9 bits for this command and the type of
905 * cmd_len cannot be uint8_t.
906 */
907 uint16_t cmd_len;
908 int cmd_decl_count;
909 uint32_t *dw;
910
911 ILO_DEV_ASSERT(builder->dev, 7, 8);
912
913 if (ilo_dev_gen(builder->dev) >= ILO_GEN(7.5)) {
914 cmd_decl_count = sol->decl_count;
915 } else {
916 /*
917 * From the Ivy Bridge PRM, volume 2 part 1, page 201:
918 *
919 * "Errata: All 128 decls for all four streams must be included
920 * whenever this command is issued. The "Num Entries [n]" fields
921 * still contain the actual numbers of valid decls."
922 */
923 cmd_decl_count = 128;
924 }
925
926 cmd_len = 3 + 2 * cmd_decl_count;
927
928 ilo_builder_batch_pointer(builder, cmd_len, &dw);
929
930 dw[0] = GEN7_RENDER_CMD(3D, 3DSTATE_SO_DECL_LIST) | (cmd_len - 2);
931 /* see sol_set_gen7_3DSTATE_SO_DECL_LIST() */
932 dw[1] = sol->so[4];
933 dw[2] = sol->so[5];
934 memcpy(&dw[3], sol->decl, sizeof(sol->decl[0]) * sol->decl_count);
935
936 if (sol->decl_count < cmd_decl_count) {
937 memset(&dw[3 + 2 * sol->decl_count], 0, sizeof(sol->decl[0]) *
938 cmd_decl_count - sol->decl_count);
939 }
940 }
941
942 static inline void
943 gen7_3DSTATE_SO_BUFFER(struct ilo_builder *builder, int index, int stride,
944 const struct pipe_stream_output_target *so_target)
945 {
946 const uint8_t cmd_len = (ilo_dev_gen(builder->dev) >= ILO_GEN(8)) ? 8 : 4;
947 struct ilo_buffer *buf;
948 int start, end;
949 uint32_t *dw;
950 unsigned pos;
951
952 ILO_DEV_ASSERT(builder->dev, 7, 8);
953
954 buf = ilo_buffer(so_target->buffer);
955
956 /* DWord-aligned */
957 assert(stride % 4 == 0);
958 assert(so_target->buffer_offset % 4 == 0);
959
960 stride &= ~3;
961 start = so_target->buffer_offset & ~3;
962 end = (start + so_target->buffer_size) & ~3;
963
964 pos = ilo_builder_batch_pointer(builder, cmd_len, &dw);
965
966 dw[0] = GEN7_RENDER_CMD(3D, 3DSTATE_SO_BUFFER) | (cmd_len - 2);
967 dw[1] = index << GEN7_SO_BUF_DW1_INDEX__SHIFT |
968 stride;
969
970 if (ilo_dev_gen(builder->dev) >= ILO_GEN(8)) {
971 dw[1] |= builder->mocs << GEN8_SO_BUF_DW1_MOCS__SHIFT;
972
973 dw[4] = end - start;
974 dw[5] = 0;
975 dw[6] = 0;
976 dw[7] = 0;
977
978 ilo_builder_batch_reloc64(builder, pos + 2,
979 buf->bo, start, INTEL_RELOC_WRITE);
980 } else {
981 dw[1] |= builder->mocs << GEN7_SO_BUF_DW1_MOCS__SHIFT;
982
983 ilo_builder_batch_reloc(builder, pos + 2,
984 buf->bo, start, INTEL_RELOC_WRITE);
985 ilo_builder_batch_reloc(builder, pos + 3,
986 buf->bo, end, INTEL_RELOC_WRITE);
987 }
988 }
989
990 static inline void
991 gen7_disable_3DSTATE_SO_BUFFER(struct ilo_builder *builder, int index)
992 {
993 const uint8_t cmd_len = (ilo_dev_gen(builder->dev) >= ILO_GEN(8)) ? 8 : 4;
994 uint32_t *dw;
995
996 ILO_DEV_ASSERT(builder->dev, 7, 8);
997
998 ilo_builder_batch_pointer(builder, cmd_len, &dw);
999
1000 dw[0] = GEN7_RENDER_CMD(3D, 3DSTATE_SO_BUFFER) | (cmd_len - 2);
1001 dw[1] = index << GEN7_SO_BUF_DW1_INDEX__SHIFT;
1002 dw[2] = 0;
1003 dw[3] = 0;
1004
1005 if (ilo_dev_gen(builder->dev) >= ILO_GEN(8)) {
1006 dw[4] = 0;
1007 dw[5] = 0;
1008 dw[6] = 0;
1009 dw[7] = 0;
1010 }
1011 }
1012
1013 static inline void
1014 gen6_3DSTATE_BINDING_TABLE_POINTERS(struct ilo_builder *builder,
1015 uint32_t vs_binding_table,
1016 uint32_t gs_binding_table,
1017 uint32_t ps_binding_table)
1018 {
1019 const uint8_t cmd_len = 4;
1020 uint32_t *dw;
1021
1022 ILO_DEV_ASSERT(builder->dev, 6, 6);
1023
1024 ilo_builder_batch_pointer(builder, cmd_len, &dw);
1025
1026 dw[0] = GEN6_RENDER_CMD(3D, 3DSTATE_BINDING_TABLE_POINTERS) |
1027 GEN6_BINDING_TABLE_PTR_DW0_VS_CHANGED |
1028 GEN6_BINDING_TABLE_PTR_DW0_GS_CHANGED |
1029 GEN6_BINDING_TABLE_PTR_DW0_PS_CHANGED |
1030 (cmd_len - 2);
1031 dw[1] = vs_binding_table;
1032 dw[2] = gs_binding_table;
1033 dw[3] = ps_binding_table;
1034 }
1035
1036 static inline void
1037 gen6_3DSTATE_SAMPLER_STATE_POINTERS(struct ilo_builder *builder,
1038 uint32_t vs_sampler_state,
1039 uint32_t gs_sampler_state,
1040 uint32_t ps_sampler_state)
1041 {
1042 const uint8_t cmd_len = 4;
1043 uint32_t *dw;
1044
1045 ILO_DEV_ASSERT(builder->dev, 6, 6);
1046
1047 ilo_builder_batch_pointer(builder, cmd_len, &dw);
1048
1049 dw[0] = GEN6_RENDER_CMD(3D, 3DSTATE_SAMPLER_STATE_POINTERS) |
1050 GEN6_SAMPLER_PTR_DW0_VS_CHANGED |
1051 GEN6_SAMPLER_PTR_DW0_GS_CHANGED |
1052 GEN6_SAMPLER_PTR_DW0_PS_CHANGED |
1053 (cmd_len - 2);
1054 dw[1] = vs_sampler_state;
1055 dw[2] = gs_sampler_state;
1056 dw[3] = ps_sampler_state;
1057 }
1058
1059 static inline void
1060 gen7_3dstate_pointer(struct ilo_builder *builder,
1061 int subop, uint32_t pointer)
1062 {
1063 const uint32_t cmd = GEN6_RENDER_TYPE_RENDER |
1064 GEN6_RENDER_SUBTYPE_3D |
1065 subop;
1066 const uint8_t cmd_len = 2;
1067 uint32_t *dw;
1068
1069 ILO_DEV_ASSERT(builder->dev, 7, 8);
1070
1071 ilo_builder_batch_pointer(builder, cmd_len, &dw);
1072
1073 dw[0] = cmd | (cmd_len - 2);
1074 dw[1] = pointer;
1075 }
1076
1077 static inline void
1078 gen7_3DSTATE_BINDING_TABLE_POINTERS_VS(struct ilo_builder *builder,
1079 uint32_t binding_table)
1080 {
1081 gen7_3dstate_pointer(builder,
1082 GEN7_RENDER_OPCODE_3DSTATE_BINDING_TABLE_POINTERS_VS,
1083 binding_table);
1084 }
1085
1086 static inline void
1087 gen7_3DSTATE_BINDING_TABLE_POINTERS_HS(struct ilo_builder *builder,
1088 uint32_t binding_table)
1089 {
1090 gen7_3dstate_pointer(builder,
1091 GEN7_RENDER_OPCODE_3DSTATE_BINDING_TABLE_POINTERS_HS,
1092 binding_table);
1093 }
1094
1095 static inline void
1096 gen7_3DSTATE_BINDING_TABLE_POINTERS_DS(struct ilo_builder *builder,
1097 uint32_t binding_table)
1098 {
1099 gen7_3dstate_pointer(builder,
1100 GEN7_RENDER_OPCODE_3DSTATE_BINDING_TABLE_POINTERS_DS,
1101 binding_table);
1102 }
1103
1104 static inline void
1105 gen7_3DSTATE_BINDING_TABLE_POINTERS_GS(struct ilo_builder *builder,
1106 uint32_t binding_table)
1107 {
1108 gen7_3dstate_pointer(builder,
1109 GEN7_RENDER_OPCODE_3DSTATE_BINDING_TABLE_POINTERS_GS,
1110 binding_table);
1111 }
1112
1113 static inline void
1114 gen7_3DSTATE_SAMPLER_STATE_POINTERS_VS(struct ilo_builder *builder,
1115 uint32_t sampler_state)
1116 {
1117 gen7_3dstate_pointer(builder,
1118 GEN7_RENDER_OPCODE_3DSTATE_SAMPLER_STATE_POINTERS_VS,
1119 sampler_state);
1120 }
1121
1122 static inline void
1123 gen7_3DSTATE_SAMPLER_STATE_POINTERS_HS(struct ilo_builder *builder,
1124 uint32_t sampler_state)
1125 {
1126 gen7_3dstate_pointer(builder,
1127 GEN7_RENDER_OPCODE_3DSTATE_SAMPLER_STATE_POINTERS_HS,
1128 sampler_state);
1129 }
1130
1131 static inline void
1132 gen7_3DSTATE_SAMPLER_STATE_POINTERS_DS(struct ilo_builder *builder,
1133 uint32_t sampler_state)
1134 {
1135 gen7_3dstate_pointer(builder,
1136 GEN7_RENDER_OPCODE_3DSTATE_SAMPLER_STATE_POINTERS_DS,
1137 sampler_state);
1138 }
1139
1140 static inline void
1141 gen7_3DSTATE_SAMPLER_STATE_POINTERS_GS(struct ilo_builder *builder,
1142 uint32_t sampler_state)
1143 {
1144 gen7_3dstate_pointer(builder,
1145 GEN7_RENDER_OPCODE_3DSTATE_SAMPLER_STATE_POINTERS_GS,
1146 sampler_state);
1147 }
1148
1149 static inline void
1150 gen6_3dstate_constant(struct ilo_builder *builder, int subop,
1151 const uint32_t *bufs, const int *sizes,
1152 int num_bufs)
1153 {
1154 const uint32_t cmd = GEN6_RENDER_TYPE_RENDER |
1155 GEN6_RENDER_SUBTYPE_3D |
1156 subop;
1157 const uint8_t cmd_len = 5;
1158 unsigned buf_enabled = 0x0;
1159 uint32_t buf_dw[4], *dw;
1160 int max_read_length, total_read_length;
1161 int i;
1162
1163 ILO_DEV_ASSERT(builder->dev, 6, 6);
1164
1165 assert(num_bufs <= 4);
1166
1167 /*
1168 * From the Sandy Bridge PRM, volume 2 part 1, page 138:
1169 *
1170 * "(3DSTATE_CONSTANT_VS) The sum of all four read length fields (each
1171 * incremented to represent the actual read length) must be less than
1172 * or equal to 32"
1173 *
1174 * From the Sandy Bridge PRM, volume 2 part 1, page 161:
1175 *
1176 * "(3DSTATE_CONSTANT_GS) The sum of all four read length fields (each
1177 * incremented to represent the actual read length) must be less than
1178 * or equal to 64"
1179 *
1180 * From the Sandy Bridge PRM, volume 2 part 1, page 287:
1181 *
1182 * "(3DSTATE_CONSTANT_PS) The sum of all four read length fields (each
1183 * incremented to represent the actual read length) must be less than
1184 * or equal to 64"
1185 */
1186 switch (subop) {
1187 case GEN6_RENDER_OPCODE_3DSTATE_CONSTANT_VS:
1188 max_read_length = 32;
1189 break;
1190 case GEN6_RENDER_OPCODE_3DSTATE_CONSTANT_GS:
1191 case GEN6_RENDER_OPCODE_3DSTATE_CONSTANT_PS:
1192 max_read_length = 64;
1193 break;
1194 default:
1195 assert(!"unknown pcb subop");
1196 max_read_length = 0;
1197 break;
1198 }
1199
1200 total_read_length = 0;
1201 for (i = 0; i < 4; i++) {
1202 if (i < num_bufs && sizes[i]) {
1203 /* in 256-bit units */
1204 const int read_len = (sizes[i] + 31) / 32;
1205
1206 assert(bufs[i] % 32 == 0);
1207 assert(read_len <= 32);
1208
1209 buf_enabled |= 1 << i;
1210 buf_dw[i] = bufs[i] | (read_len - 1);
1211
1212 total_read_length += read_len;
1213 } else {
1214 buf_dw[i] = 0;
1215 }
1216 }
1217
1218 assert(total_read_length <= max_read_length);
1219
1220 ilo_builder_batch_pointer(builder, cmd_len, &dw);
1221
1222 dw[0] = cmd | (cmd_len - 2) |
1223 buf_enabled << GEN6_CONSTANT_DW0_BUFFER_ENABLES__SHIFT |
1224 builder->mocs << GEN6_CONSTANT_DW0_MOCS__SHIFT;
1225
1226 memcpy(&dw[1], buf_dw, sizeof(buf_dw));
1227 }
1228
1229 static inline void
1230 gen6_3DSTATE_CONSTANT_VS(struct ilo_builder *builder,
1231 const uint32_t *bufs, const int *sizes,
1232 int num_bufs)
1233 {
1234 gen6_3dstate_constant(builder, GEN6_RENDER_OPCODE_3DSTATE_CONSTANT_VS,
1235 bufs, sizes, num_bufs);
1236 }
1237
1238 static inline void
1239 gen6_3DSTATE_CONSTANT_GS(struct ilo_builder *builder,
1240 const uint32_t *bufs, const int *sizes,
1241 int num_bufs)
1242 {
1243 gen6_3dstate_constant(builder, GEN6_RENDER_OPCODE_3DSTATE_CONSTANT_GS,
1244 bufs, sizes, num_bufs);
1245 }
1246
1247 static inline void
1248 gen7_3dstate_constant(struct ilo_builder *builder,
1249 int subop,
1250 const uint32_t *bufs, const int *sizes,
1251 int num_bufs)
1252 {
1253 const uint32_t cmd = GEN6_RENDER_TYPE_RENDER |
1254 GEN6_RENDER_SUBTYPE_3D |
1255 subop;
1256 const uint8_t cmd_len = (ilo_dev_gen(builder->dev) >= ILO_GEN(8)) ? 11 : 7;
1257 uint32_t payload[6], *dw;
1258 int total_read_length, i;
1259
1260 ILO_DEV_ASSERT(builder->dev, 7, 8);
1261
1262 /* VS, HS, DS, GS, and PS variants */
1263 assert(subop >= GEN6_RENDER_OPCODE_3DSTATE_CONSTANT_VS &&
1264 subop <= GEN7_RENDER_OPCODE_3DSTATE_CONSTANT_DS &&
1265 subop != GEN6_RENDER_OPCODE_3DSTATE_SAMPLE_MASK);
1266
1267 assert(num_bufs <= 4);
1268
1269 payload[0] = 0;
1270 payload[1] = 0;
1271
1272 total_read_length = 0;
1273 for (i = 0; i < 4; i++) {
1274 int read_len;
1275
1276 /*
1277 * From the Ivy Bridge PRM, volume 2 part 1, page 112:
1278 *
1279 * "Constant buffers must be enabled in order from Constant Buffer 0
1280 * to Constant Buffer 3 within this command. For example, it is
1281 * not allowed to enable Constant Buffer 1 by programming a
1282 * non-zero value in the VS Constant Buffer 1 Read Length without a
1283 * non-zero value in VS Constant Buffer 0 Read Length."
1284 */
1285 if (i >= num_bufs || !sizes[i]) {
1286 for (; i < 4; i++) {
1287 assert(i >= num_bufs || !sizes[i]);
1288 payload[2 + i] = 0;
1289 }
1290 break;
1291 }
1292
1293 /* read lengths are in 256-bit units */
1294 read_len = (sizes[i] + 31) / 32;
1295 /* the lower 5 bits are used for memory object control state */
1296 assert(bufs[i] % 32 == 0);
1297
1298 payload[i / 2] |= read_len << ((i % 2) ? 16 : 0);
1299 payload[2 + i] = bufs[i];
1300
1301 total_read_length += read_len;
1302 }
1303
1304 /*
1305 * From the Ivy Bridge PRM, volume 2 part 1, page 113:
1306 *
1307 * "The sum of all four read length fields must be less than or equal
1308 * to the size of 64"
1309 */
1310 assert(total_read_length <= 64);
1311
1312 ilo_builder_batch_pointer(builder, cmd_len, &dw);
1313
1314 dw[0] = cmd | (cmd_len - 2);
1315 if (ilo_dev_gen(builder->dev) >= ILO_GEN(8)) {
1316 dw[1] = payload[0];
1317 dw[2] = payload[1];
1318 dw[3] = payload[2];
1319 dw[4] = 0;
1320 dw[5] = payload[3];
1321 dw[6] = 0;
1322 dw[7] = payload[4];
1323 dw[8] = 0;
1324 dw[9] = payload[5];
1325 dw[10] = 0;
1326 } else {
1327 payload[2] |= builder->mocs << GEN7_CONSTANT_DW_ADDR_MOCS__SHIFT;
1328
1329 memcpy(&dw[1], payload, sizeof(payload));
1330 }
1331 }
1332
1333 static inline void
1334 gen7_3DSTATE_CONSTANT_VS(struct ilo_builder *builder,
1335 const uint32_t *bufs, const int *sizes,
1336 int num_bufs)
1337 {
1338 gen7_3dstate_constant(builder, GEN6_RENDER_OPCODE_3DSTATE_CONSTANT_VS,
1339 bufs, sizes, num_bufs);
1340 }
1341
1342 static inline void
1343 gen7_3DSTATE_CONSTANT_HS(struct ilo_builder *builder,
1344 const uint32_t *bufs, const int *sizes,
1345 int num_bufs)
1346 {
1347 gen7_3dstate_constant(builder, GEN7_RENDER_OPCODE_3DSTATE_CONSTANT_HS,
1348 bufs, sizes, num_bufs);
1349 }
1350
1351 static inline void
1352 gen7_3DSTATE_CONSTANT_DS(struct ilo_builder *builder,
1353 const uint32_t *bufs, const int *sizes,
1354 int num_bufs)
1355 {
1356 gen7_3dstate_constant(builder, GEN7_RENDER_OPCODE_3DSTATE_CONSTANT_DS,
1357 bufs, sizes, num_bufs);
1358 }
1359
1360 static inline void
1361 gen7_3DSTATE_CONSTANT_GS(struct ilo_builder *builder,
1362 const uint32_t *bufs, const int *sizes,
1363 int num_bufs)
1364 {
1365 gen7_3dstate_constant(builder, GEN6_RENDER_OPCODE_3DSTATE_CONSTANT_GS,
1366 bufs, sizes, num_bufs);
1367 }
1368
1369 static inline uint32_t
1370 gen6_BINDING_TABLE_STATE(struct ilo_builder *builder,
1371 const uint32_t *surface_states,
1372 int num_surface_states)
1373 {
1374 const int state_align = 32;
1375 const int state_len = num_surface_states;
1376 uint32_t state_offset, *dw;
1377
1378 ILO_DEV_ASSERT(builder->dev, 6, 8);
1379
1380 /*
1381 * From the Sandy Bridge PRM, volume 4 part 1, page 69:
1382 *
1383 * "It is stored as an array of up to 256 elements..."
1384 */
1385 assert(num_surface_states <= 256);
1386
1387 if (!num_surface_states)
1388 return 0;
1389
1390 state_offset = ilo_builder_surface_pointer(builder,
1391 ILO_BUILDER_ITEM_BINDING_TABLE, state_align, state_len, &dw);
1392 memcpy(dw, surface_states, state_len << 2);
1393
1394 return state_offset;
1395 }
1396
1397 static inline uint32_t
1398 gen6_SURFACE_STATE(struct ilo_builder *builder,
1399 const struct ilo_state_surface *surf)
1400 {
1401 int state_align, state_len;
1402 uint32_t state_offset, *dw;
1403
1404 ILO_DEV_ASSERT(builder->dev, 6, 8);
1405
1406 if (ilo_dev_gen(builder->dev) >= ILO_GEN(8)) {
1407 state_align = 64;
1408 state_len = 13;
1409
1410 state_offset = ilo_builder_surface_pointer(builder,
1411 ILO_BUILDER_ITEM_SURFACE, state_align, state_len, &dw);
1412 memcpy(dw, surf->surface, state_len << 2);
1413
1414 if (surf->bo) {
1415 const uint32_t mocs = (surf->scanout) ?
1416 (GEN8_MOCS_MT_PTE | GEN8_MOCS_CT_L3) : builder->mocs;
1417
1418 dw[1] |= mocs << GEN8_SURFACE_DW1_MOCS__SHIFT;
1419
1420 ilo_builder_surface_reloc64(builder, state_offset, 8, surf->bo,
1421 surf->surface[8], (surf->readonly) ? 0 : INTEL_RELOC_WRITE);
1422 }
1423 } else {
1424 state_align = 32;
1425 state_len = (ilo_dev_gen(builder->dev) >= ILO_GEN(7)) ? 8 : 6;
1426
1427 state_offset = ilo_builder_surface_pointer(builder,
1428 ILO_BUILDER_ITEM_SURFACE, state_align, state_len, &dw);
1429 memcpy(dw, surf->surface, state_len << 2);
1430
1431 if (surf->bo) {
1432 /*
1433 * For scanouts, we should not enable caching in LLC. Since we only
1434 * enable that on Gen8+, we are fine here.
1435 */
1436 dw[5] |= builder->mocs << GEN6_SURFACE_DW5_MOCS__SHIFT;
1437
1438 ilo_builder_surface_reloc(builder, state_offset, 1, surf->bo,
1439 surf->surface[1], (surf->readonly) ? 0 : INTEL_RELOC_WRITE);
1440 }
1441 }
1442
1443 return state_offset;
1444 }
1445
1446 static inline uint32_t
1447 gen6_so_SURFACE_STATE(struct ilo_builder *builder,
1448 const struct pipe_stream_output_target *so,
1449 const struct pipe_stream_output_info *so_info,
1450 int so_index)
1451 {
1452 struct ilo_buffer *buf = ilo_buffer(so->buffer);
1453 struct ilo_state_surface_buffer_info info;
1454 struct ilo_state_surface surf;
1455
1456 ILO_DEV_ASSERT(builder->dev, 6, 6);
1457
1458 memset(&info, 0, sizeof(info));
1459 info.buf = buf;
1460 info.access = ILO_STATE_SURFACE_ACCESS_DP_SVB;
1461
1462 switch (so_info->output[so_index].num_components) {
1463 case 1:
1464 info.format = GEN6_FORMAT_R32_FLOAT;
1465 info.format_size = 4;
1466 break;
1467 case 2:
1468 info.format = GEN6_FORMAT_R32G32_FLOAT;
1469 info.format_size = 8;
1470 break;
1471 case 3:
1472 info.format = GEN6_FORMAT_R32G32B32_FLOAT;
1473 info.format_size = 12;
1474 break;
1475 case 4:
1476 info.format = GEN6_FORMAT_R32G32B32A32_FLOAT;
1477 info.format_size = 16;
1478 break;
1479 default:
1480 assert(!"unexpected SO components length");
1481 info.format = GEN6_FORMAT_R32_FLOAT;
1482 info.format_size = 4;
1483 break;
1484 }
1485
1486 info.struct_size =
1487 so_info->stride[so_info->output[so_index].output_buffer] * 4;
1488 info.offset = so->buffer_offset + so_info->output[so_index].dst_offset * 4;
1489 info.size = so->buffer_size - so_info->output[so_index].dst_offset * 4;
1490
1491 memset(&surf, 0, sizeof(surf));
1492 ilo_state_surface_init_for_buffer(&surf, builder->dev, &info);
1493 surf.bo = info.buf->bo;
1494
1495 return gen6_SURFACE_STATE(builder, &surf);
1496 }
1497
1498 static inline uint32_t
1499 gen6_SAMPLER_STATE(struct ilo_builder *builder,
1500 const struct ilo_state_sampler *samplers,
1501 const uint32_t *sampler_border_colors,
1502 int sampler_count)
1503 {
1504 const int state_align = 32;
1505 const int state_len = 4 * sampler_count;
1506 uint32_t state_offset, *dw;
1507 int i;
1508
1509 ILO_DEV_ASSERT(builder->dev, 6, 8);
1510
1511 /*
1512 * From the Sandy Bridge PRM, volume 4 part 1, page 101:
1513 *
1514 * "The sampler state is stored as an array of up to 16 elements..."
1515 */
1516 assert(sampler_count <= 16);
1517
1518 if (!sampler_count)
1519 return 0;
1520
1521 /*
1522 * From the Sandy Bridge PRM, volume 2 part 1, page 132:
1523 *
1524 * "(Sampler Count of 3DSTATE_VS) Specifies how many samplers (in
1525 * multiples of 4) the vertex shader 0 kernel uses. Used only for
1526 * prefetching the associated sampler state entries.
1527 *
1528 * It also applies to other shader stages.
1529 */
1530 ilo_builder_dynamic_pad_top(builder, 4 * (4 - (sampler_count % 4)));
1531
1532 state_offset = ilo_builder_dynamic_pointer(builder,
1533 ILO_BUILDER_ITEM_SAMPLER, state_align, state_len, &dw);
1534
1535 for (i = 0; i < sampler_count; i++) {
1536 /* see sampler_set_gen6_SAMPLER_STATE() */
1537 dw[0] = samplers[i].sampler[0];
1538 dw[1] = samplers[i].sampler[1];
1539 dw[3] = samplers[i].sampler[2];
1540
1541 assert(!(sampler_border_colors[i] & 0x1f));
1542 dw[2] = sampler_border_colors[i];
1543
1544 dw += 4;
1545 }
1546
1547 return state_offset;
1548 }
1549
1550 static inline uint32_t
1551 gen6_SAMPLER_BORDER_COLOR_STATE(struct ilo_builder *builder,
1552 const struct ilo_state_sampler_border *border)
1553 {
1554 const int state_align =
1555 (ilo_dev_gen(builder->dev) >= ILO_GEN(8)) ? 64 : 32;
1556 const int state_len = (ilo_dev_gen(builder->dev) >= ILO_GEN(7)) ? 4 : 12;
1557
1558 ILO_DEV_ASSERT(builder->dev, 6, 8);
1559
1560 /*
1561 * see border_set_gen6_SAMPLER_BORDER_COLOR_STATE() and
1562 * border_set_gen7_SAMPLER_BORDER_COLOR_STATE()
1563 */
1564 return ilo_builder_dynamic_write(builder, ILO_BUILDER_ITEM_BLOB,
1565 state_align, state_len, border->color);
1566 }
1567
1568 static inline uint32_t
1569 gen6_push_constant_buffer(struct ilo_builder *builder,
1570 int size, void **pcb)
1571 {
1572 /*
1573 * For all VS, GS, FS, and CS push constant buffers, they must be aligned
1574 * to 32 bytes, and their sizes are specified in 256-bit units.
1575 */
1576 const int state_align = 32;
1577 const int state_len = align(size, 32) / 4;
1578 uint32_t state_offset;
1579 char *buf;
1580
1581 ILO_DEV_ASSERT(builder->dev, 6, 8);
1582
1583 state_offset = ilo_builder_dynamic_pointer(builder,
1584 ILO_BUILDER_ITEM_BLOB, state_align, state_len, (uint32_t **) &buf);
1585
1586 /* zero out the unused range */
1587 if (size < state_len * 4)
1588 memset(&buf[size], 0, state_len * 4 - size);
1589
1590 if (pcb)
1591 *pcb = buf;
1592
1593 return state_offset;
1594 }
1595
1596 static inline uint32_t
1597 gen6_user_vertex_buffer(struct ilo_builder *builder,
1598 int size, const void *vertices)
1599 {
1600 const int state_align = 8;
1601 const int state_len = size / 4;
1602
1603 ILO_DEV_ASSERT(builder->dev, 6, 7.5);
1604
1605 assert(size % 4 == 0);
1606
1607 return ilo_builder_dynamic_write(builder, ILO_BUILDER_ITEM_BLOB,
1608 state_align, state_len, vertices);
1609 }
1610
1611 #endif /* ILO_BUILDER_3D_TOP_H */