ilo: mapping a resource may make some states dirty
[mesa.git] / src / gallium / drivers / ilo / ilo_3d_pipeline.h
1 /*
2 * Mesa 3-D graphics library
3 *
4 * Copyright (C) 2013 LunarG, Inc.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included
14 * in all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
23 *
24 * Authors:
25 * Chia-I Wu <olv@lunarg.com>
26 */
27
28 #ifndef ILO_3D_PIPELINE_H
29 #define ILO_3D_PIPELINE_H
30
31 #include "ilo_common.h"
32 #include "ilo_context.h"
33 #include "ilo_gpe_gen6.h"
34 #include "ilo_gpe_gen7.h"
35
36 struct pipe_draw_info;
37 struct intel_bo;
38 struct ilo_cp;
39 struct ilo_context;
40
41 enum ilo_3d_pipeline_invalidate_flags {
42 ILO_3D_PIPELINE_INVALIDATE_HW = 1 << 0,
43 ILO_3D_PIPELINE_INVALIDATE_BATCH_BO = 1 << 1,
44 ILO_3D_PIPELINE_INVALIDATE_STATE_BO = 1 << 2,
45 ILO_3D_PIPELINE_INVALIDATE_KERNEL_BO = 1 << 3,
46
47 ILO_3D_PIPELINE_INVALIDATE_ALL = 0xffffffff,
48 };
49
50 enum ilo_3d_pipeline_action {
51 ILO_3D_PIPELINE_DRAW,
52 ILO_3D_PIPELINE_FLUSH,
53 ILO_3D_PIPELINE_WRITE_TIMESTAMP,
54 ILO_3D_PIPELINE_WRITE_DEPTH_COUNT,
55 };
56
57 /**
58 * 3D pipeline.
59 */
60 struct ilo_3d_pipeline {
61 struct ilo_cp *cp;
62 const struct ilo_dev_info *dev;
63
64 uint32_t invalidate_flags;
65
66 struct intel_bo *workaround_bo;
67
68 uint32_t packed_sample_position_1x;
69 uint32_t packed_sample_position_4x;
70 uint32_t packed_sample_position_8x[2];
71
72 int (*estimate_size)(struct ilo_3d_pipeline *pipeline,
73 enum ilo_3d_pipeline_action action,
74 const void *arg);
75
76 void (*emit_draw)(struct ilo_3d_pipeline *pipeline,
77 const struct ilo_context *ilo,
78 const struct pipe_draw_info *info);
79
80 void (*emit_flush)(struct ilo_3d_pipeline *pipeline);
81
82 void (*emit_write_timestamp)(struct ilo_3d_pipeline *pipeline,
83 struct intel_bo *bo, int index);
84
85 void (*emit_write_depth_count)(struct ilo_3d_pipeline *pipeline,
86 struct intel_bo *bo, int index);
87
88 /**
89 * all GPE functions of all GENs
90 */
91 #define GEN6_EMIT(name) ilo_gpe_gen6_ ## name gen6_ ## name
92 GEN6_EMIT(STATE_BASE_ADDRESS);
93 GEN6_EMIT(STATE_SIP);
94 GEN6_EMIT(PIPELINE_SELECT);
95 GEN6_EMIT(3DSTATE_BINDING_TABLE_POINTERS);
96 GEN6_EMIT(3DSTATE_SAMPLER_STATE_POINTERS);
97 GEN6_EMIT(3DSTATE_URB);
98 GEN6_EMIT(3DSTATE_VERTEX_BUFFERS);
99 GEN6_EMIT(3DSTATE_VERTEX_ELEMENTS);
100 GEN6_EMIT(3DSTATE_INDEX_BUFFER);
101 GEN6_EMIT(3DSTATE_VF_STATISTICS);
102 GEN6_EMIT(3DSTATE_VIEWPORT_STATE_POINTERS);
103 GEN6_EMIT(3DSTATE_CC_STATE_POINTERS);
104 GEN6_EMIT(3DSTATE_SCISSOR_STATE_POINTERS);
105 GEN6_EMIT(3DSTATE_VS);
106 GEN6_EMIT(3DSTATE_GS);
107 GEN6_EMIT(3DSTATE_CLIP);
108 GEN6_EMIT(3DSTATE_SF);
109 GEN6_EMIT(3DSTATE_WM);
110 GEN6_EMIT(3DSTATE_CONSTANT_VS);
111 GEN6_EMIT(3DSTATE_CONSTANT_GS);
112 GEN6_EMIT(3DSTATE_CONSTANT_PS);
113 GEN6_EMIT(3DSTATE_SAMPLE_MASK);
114 GEN6_EMIT(3DSTATE_DRAWING_RECTANGLE);
115 GEN6_EMIT(3DSTATE_DEPTH_BUFFER);
116 GEN6_EMIT(3DSTATE_POLY_STIPPLE_OFFSET);
117 GEN6_EMIT(3DSTATE_POLY_STIPPLE_PATTERN);
118 GEN6_EMIT(3DSTATE_LINE_STIPPLE);
119 GEN6_EMIT(3DSTATE_AA_LINE_PARAMETERS);
120 GEN6_EMIT(3DSTATE_GS_SVB_INDEX);
121 GEN6_EMIT(3DSTATE_MULTISAMPLE);
122 GEN6_EMIT(3DSTATE_STENCIL_BUFFER);
123 GEN6_EMIT(3DSTATE_HIER_DEPTH_BUFFER);
124 GEN6_EMIT(3DSTATE_CLEAR_PARAMS);
125 GEN6_EMIT(PIPE_CONTROL);
126 GEN6_EMIT(3DPRIMITIVE);
127 GEN6_EMIT(INTERFACE_DESCRIPTOR_DATA);
128 GEN6_EMIT(SF_VIEWPORT);
129 GEN6_EMIT(CLIP_VIEWPORT);
130 GEN6_EMIT(CC_VIEWPORT);
131 GEN6_EMIT(COLOR_CALC_STATE);
132 GEN6_EMIT(BLEND_STATE);
133 GEN6_EMIT(DEPTH_STENCIL_STATE);
134 GEN6_EMIT(SCISSOR_RECT);
135 GEN6_EMIT(BINDING_TABLE_STATE);
136 GEN6_EMIT(SURFACE_STATE);
137 GEN6_EMIT(so_SURFACE_STATE);
138 GEN6_EMIT(SAMPLER_STATE);
139 GEN6_EMIT(SAMPLER_BORDER_COLOR_STATE);
140 GEN6_EMIT(push_constant_buffer);
141 #undef GEN6_EMIT
142
143 #define GEN7_EMIT(name) ilo_gpe_gen7_ ## name gen7_ ## name
144 GEN7_EMIT(3DSTATE_DEPTH_BUFFER);
145 GEN7_EMIT(3DSTATE_CC_STATE_POINTERS);
146 GEN7_EMIT(3DSTATE_GS);
147 GEN7_EMIT(3DSTATE_SF);
148 GEN7_EMIT(3DSTATE_WM);
149 GEN7_EMIT(3DSTATE_SAMPLE_MASK);
150 GEN7_EMIT(3DSTATE_CONSTANT_HS);
151 GEN7_EMIT(3DSTATE_CONSTANT_DS);
152 GEN7_EMIT(3DSTATE_HS);
153 GEN7_EMIT(3DSTATE_TE);
154 GEN7_EMIT(3DSTATE_DS);
155 GEN7_EMIT(3DSTATE_STREAMOUT);
156 GEN7_EMIT(3DSTATE_SBE);
157 GEN7_EMIT(3DSTATE_PS);
158 GEN7_EMIT(3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP);
159 GEN7_EMIT(3DSTATE_VIEWPORT_STATE_POINTERS_CC);
160 GEN7_EMIT(3DSTATE_BLEND_STATE_POINTERS);
161 GEN7_EMIT(3DSTATE_DEPTH_STENCIL_STATE_POINTERS);
162 GEN7_EMIT(3DSTATE_BINDING_TABLE_POINTERS_VS);
163 GEN7_EMIT(3DSTATE_BINDING_TABLE_POINTERS_HS);
164 GEN7_EMIT(3DSTATE_BINDING_TABLE_POINTERS_DS);
165 GEN7_EMIT(3DSTATE_BINDING_TABLE_POINTERS_GS);
166 GEN7_EMIT(3DSTATE_BINDING_TABLE_POINTERS_PS);
167 GEN7_EMIT(3DSTATE_SAMPLER_STATE_POINTERS_VS);
168 GEN7_EMIT(3DSTATE_SAMPLER_STATE_POINTERS_HS);
169 GEN7_EMIT(3DSTATE_SAMPLER_STATE_POINTERS_DS);
170 GEN7_EMIT(3DSTATE_SAMPLER_STATE_POINTERS_GS);
171 GEN7_EMIT(3DSTATE_SAMPLER_STATE_POINTERS_PS);
172 GEN7_EMIT(3DSTATE_URB_VS);
173 GEN7_EMIT(3DSTATE_URB_HS);
174 GEN7_EMIT(3DSTATE_URB_DS);
175 GEN7_EMIT(3DSTATE_URB_GS);
176 GEN7_EMIT(3DSTATE_PUSH_CONSTANT_ALLOC_VS);
177 GEN7_EMIT(3DSTATE_PUSH_CONSTANT_ALLOC_HS);
178 GEN7_EMIT(3DSTATE_PUSH_CONSTANT_ALLOC_DS);
179 GEN7_EMIT(3DSTATE_PUSH_CONSTANT_ALLOC_GS);
180 GEN7_EMIT(3DSTATE_PUSH_CONSTANT_ALLOC_PS);
181 GEN7_EMIT(3DSTATE_SO_DECL_LIST);
182 GEN7_EMIT(3DSTATE_SO_BUFFER);
183 GEN7_EMIT(SF_CLIP_VIEWPORT);
184 #undef GEN7_EMIT
185
186 /**
187 * HW states.
188 */
189 struct ilo_3d_pipeline_state {
190 bool has_gen6_wa_pipe_control;
191
192 int reduced_prim;
193 int so_num_vertices, so_max_vertices;
194
195 uint32_t SF_VIEWPORT;
196 uint32_t CLIP_VIEWPORT;
197 uint32_t SF_CLIP_VIEWPORT; /* GEN7+ */
198 uint32_t CC_VIEWPORT;
199
200 uint32_t COLOR_CALC_STATE;
201 uint32_t BLEND_STATE;
202 uint32_t DEPTH_STENCIL_STATE;
203
204 uint32_t SCISSOR_RECT;
205
206 struct {
207 uint32_t BINDING_TABLE_STATE;
208 int BINDING_TABLE_STATE_size;
209 uint32_t SURFACE_STATE[ILO_MAX_VS_SURFACES];
210 uint32_t SAMPLER_STATE;
211 uint32_t SAMPLER_BORDER_COLOR_STATE[ILO_MAX_SAMPLERS];
212 uint32_t PUSH_CONSTANT_BUFFER;
213 int PUSH_CONSTANT_BUFFER_size;
214 } vs;
215
216 struct {
217 uint32_t BINDING_TABLE_STATE;
218 int BINDING_TABLE_STATE_size;
219 uint32_t SURFACE_STATE[ILO_MAX_GS_SURFACES];
220 bool active;
221 } gs;
222
223 struct {
224 uint32_t BINDING_TABLE_STATE;
225 int BINDING_TABLE_STATE_size;
226 uint32_t SURFACE_STATE[ILO_MAX_WM_SURFACES];
227 uint32_t SAMPLER_STATE;
228 uint32_t SAMPLER_BORDER_COLOR_STATE[ILO_MAX_SAMPLERS];
229 } wm;
230 } state;
231 };
232
233 struct ilo_3d_pipeline *
234 ilo_3d_pipeline_create(struct ilo_cp *cp, const struct ilo_dev_info *dev);
235
236 void
237 ilo_3d_pipeline_destroy(struct ilo_3d_pipeline *pipeline);
238
239
240 static inline void
241 ilo_3d_pipeline_invalidate(struct ilo_3d_pipeline *p, uint32_t flags)
242 {
243 p->invalidate_flags |= flags;
244 }
245
246 /**
247 * Estimate the size of an action.
248 */
249 static inline int
250 ilo_3d_pipeline_estimate_size(struct ilo_3d_pipeline *pipeline,
251 enum ilo_3d_pipeline_action action,
252 const void *arg)
253 {
254 return pipeline->estimate_size(pipeline, action, arg);
255 }
256
257 bool
258 ilo_3d_pipeline_emit_draw(struct ilo_3d_pipeline *p,
259 const struct ilo_context *ilo,
260 const struct pipe_draw_info *info,
261 int *prim_generated, int *prim_emitted);
262
263 void
264 ilo_3d_pipeline_emit_flush(struct ilo_3d_pipeline *p);
265
266 void
267 ilo_3d_pipeline_emit_write_timestamp(struct ilo_3d_pipeline *p,
268 struct intel_bo *bo, int index);
269
270 void
271 ilo_3d_pipeline_emit_write_depth_count(struct ilo_3d_pipeline *p,
272 struct intel_bo *bo, int index);
273
274 void
275 ilo_3d_pipeline_get_sample_position(struct ilo_3d_pipeline *p,
276 unsigned sample_count,
277 unsigned sample_index,
278 float *x, float *y);
279
280 void
281 ilo_3d_pipeline_dump(struct ilo_3d_pipeline *p);
282
283 #endif /* ILO_3D_PIPELINE_H */