src/gallium/drivers/ilo/ilo_blitter_rectlist.c

   1 /*
   2  * Mesa 3-D graphics library
   3  *
   4  * Copyright (C) 2014 LunarG, Inc.
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the "Software"),
   8  * to deal in the Software without restriction, including without limitation
   9  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  10  * and/or sell copies of the Software, and to permit persons to whom the
  11  * Software is furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice shall be included
  14  * in all copies or substantial portions of the Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  21  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  22  * DEALINGS IN THE SOFTWARE.
  23  *
  24  * Authors:
  25  *    Chia-I Wu <olv@lunarg.com>
  26  */
  27
  28 #include "util/u_draw.h"
  29 #include "util/u_pack_color.h"
  30
  31 #include "ilo_blitter.h"
  32 #include "ilo_3d.h"
  33 #include "ilo_3d_pipeline.h"
  34 #include "ilo_gpe.h"
  35 #include "ilo_gpe_gen6.h" /* for ve_init_cso_with_components */
  36
  37 /**
  38  * Set the states that are invariant between all ops.
  39  */
  40 static bool
  41 ilo_blitter_set_invariants(struct ilo_blitter *blitter)
  42 {
  43    struct pipe_screen *screen = blitter->ilo->base.screen;
  44    struct pipe_resource templ;
  45    struct pipe_vertex_element velems[2];
  46    struct pipe_viewport_state vp;
  47
  48    if (blitter->initialized)
  49       return true;
  50
  51    blitter->buffer.size = 4096;
  52
  53    /* allocate the vertex buffer */
  54    memset(&templ, 0, sizeof(templ));
  55    templ.target = PIPE_BUFFER;
  56    templ.width0 = blitter->buffer.size;
  57    templ.usage = PIPE_USAGE_STREAM;
  58    templ.bind = PIPE_BIND_VERTEX_BUFFER;
  59    blitter->buffer.res = screen->resource_create(screen, &templ);
  60    if (!blitter->buffer.res)
  61       return false;
  62
  63    /* do not increase reference count */
  64    blitter->vb.states[0].buffer = blitter->buffer.res;
  65
  66    /* only vertex X and Y */
  67    blitter->vb.states[0].stride = 2 * sizeof(float);
  68    blitter->vb.enabled_mask = 0x1;
  69    memset(&velems, 0, sizeof(velems));
  70    velems[1].src_format = PIPE_FORMAT_R32G32_FLOAT;
  71    ilo_gpe_init_ve(blitter->ilo->dev, 2, velems, &blitter->ve);
  72
  73    /* override first VE to be VUE header */
  74    ve_init_cso_with_components(blitter->ilo->dev,
  75          BRW_VE1_COMPONENT_STORE_0, /* Reserved */
  76          BRW_VE1_COMPONENT_STORE_0, /* Render Target Array Index */
  77          BRW_VE1_COMPONENT_STORE_0, /* Viewport Index */
  78          BRW_VE1_COMPONENT_STORE_0, /* Point Width */
  79          &blitter->ve.cso[0]);
  80
  81    /* a rectangle has 3 vertices in a RECTLIST */
  82    util_draw_init_info(&blitter->draw);
  83    blitter->draw.count = 3;
  84
  85    /**
  86     * From the Haswell PRM, volume 7, page 615:
  87     *
  88     *     "The clear value must be between the min and max depth values
  89     *     (inclusive) defined in the CC_VIEWPORT."
  90     *
  91     * Even though clipping and viewport transformation will be disabled, we
  92     * still need to set up the viewport states.
  93     */
  94    memset(&vp, 0, sizeof(vp));
  95    vp.scale[0] = 1.0f;
  96    vp.scale[1] = 1.0f;
  97    vp.scale[2] = 1.0f;
  98    vp.scale[3] = 1.0f;
  99    ilo_gpe_set_viewport_cso(blitter->ilo->dev, &vp, &blitter->viewport);
 100
 101    blitter->initialized = true;
 102
 103    return true;
 104 }
 105
 106 static void
 107 ilo_blitter_set_op(struct ilo_blitter *blitter,
 108                    enum ilo_blitter_rectlist_op op)
 109 {
 110    blitter->op = op;
 111 }
 112
 113 /**
 114  * Set the rectangle primitive.
 115  */
 116 static void
 117 ilo_blitter_set_rectlist(struct ilo_blitter *blitter,
 118                          unsigned x, unsigned y,
 119                          unsigned width, unsigned height)
 120 {
 121    unsigned usage = PIPE_TRANSFER_WRITE | PIPE_TRANSFER_UNSYNCHRONIZED;
 122    float vertices[3][2];
 123    struct pipe_box box;
 124
 125    /*
 126     * From the Sandy Bridge PRM, volume 2 part 1, page 11:
 127     *
 128     *     "(RECTLIST) A list of independent rectangles, where only 3 vertices
 129     *      are provided per rectangle object, with the fourth vertex implied
 130     *      by the definition of a rectangle. V0=LowerRight, V1=LowerLeft,
 131     *      V2=UpperLeft. Implied V3 = V0- V1+V2."
 132     */
 133    vertices[0][0] = (float) (x + width);
 134    vertices[0][1] = (float) (y + height);
 135    vertices[1][0] = (float) x;
 136    vertices[1][1] = (float) (y + height);
 137    vertices[2][0] = (float) x;
 138    vertices[2][1] = (float) y;
 139
 140    /* buffer is full */
 141    if (blitter->buffer.offset + sizeof(vertices) > blitter->buffer.size) {
 142       if (!ilo_buffer_alloc_bo(ilo_buffer(blitter->buffer.res)))
 143          usage &= ~PIPE_TRANSFER_UNSYNCHRONIZED;
 144
 145       blitter->buffer.offset = 0;
 146    }
 147
 148    u_box_1d(blitter->buffer.offset, sizeof(vertices), &box);
 149
 150    blitter->ilo->base.transfer_inline_write(&blitter->ilo->base,
 151          blitter->buffer.res, 0, usage, &box, vertices, 0, 0);
 152
 153    blitter->vb.states[0].buffer_offset = blitter->buffer.offset;
 154    blitter->buffer.offset += sizeof(vertices);
 155 }
 156
 157 static void
 158 ilo_blitter_set_clear_values(struct ilo_blitter *blitter,
 159                              uint32_t depth, ubyte stencil)
 160 {
 161    blitter->depth_clear_value = depth;
 162    blitter->cc.stencil_ref.ref_value[0] = stencil;
 163 }
 164
 165 static void
 166 ilo_blitter_set_dsa(struct ilo_blitter *blitter,
 167                     const struct pipe_depth_stencil_alpha_state *state)
 168 {
 169    ilo_gpe_init_dsa(blitter->ilo->dev, state, &blitter->dsa);
 170 }
 171
 172 static void
 173 ilo_blitter_set_fb(struct ilo_blitter *blitter,
 174                    const struct pipe_resource *res, unsigned level,
 175                    const struct ilo_surface_cso *cso)
 176 {
 177    blitter->fb.width = u_minify(res->width0, level);
 178    blitter->fb.height = u_minify(res->height0, level);
 179
 180    blitter->fb.num_samples = res->nr_samples;
 181    if (!blitter->fb.num_samples)
 182       blitter->fb.num_samples = 1;
 183
 184    memcpy(&blitter->fb.dst, cso, sizeof(*cso));
 185 }
 186
 187 static void
 188 ilo_blitter_set_fb_from_surface(struct ilo_blitter *blitter,
 189                                 struct pipe_surface *surf)
 190 {
 191    ilo_blitter_set_fb(blitter, surf->texture, surf->u.tex.level,
 192          (const struct ilo_surface_cso *) surf);
 193 }
 194
 195 static void
 196 ilo_blitter_set_fb_from_resource(struct ilo_blitter *blitter,
 197                                  struct pipe_resource *res,
 198                                  enum pipe_format format,
 199                                  unsigned level, unsigned slice)
 200 {
 201    struct pipe_surface templ, *surf;
 202
 203    memset(&templ, 0, sizeof(templ));
 204    templ.format = format;
 205    templ.u.tex.level = level;
 206    templ.u.tex.first_layer = slice;
 207    templ.u.tex.last_layer = slice;
 208
 209    /* if we did not call create_surface(), it would never fail */
 210    surf = blitter->ilo->base.create_surface(&blitter->ilo->base, res, &templ);
 211    assert(surf);
 212
 213    ilo_blitter_set_fb(blitter, res, level,
 214          (const struct ilo_surface_cso *) surf);
 215
 216    pipe_surface_reference(&surf, NULL);
 217 }
 218
 219 static void
 220 ilo_blitter_set_uses(struct ilo_blitter *blitter, uint32_t uses)
 221 {
 222    blitter->uses = uses;
 223 }
 224
 225 static void
 226 hiz_emit_rectlist(struct ilo_blitter *blitter)
 227 {
 228    struct ilo_3d *hw3d = blitter->ilo->hw3d;
 229    struct ilo_3d_pipeline *p = hw3d->pipeline;
 230
 231    ilo_3d_own_render_ring(hw3d);
 232
 233    /*
 234     * From the Sandy Bridge PRM, volume 2 part 1, page 313:
 235     *
 236     *     "If other rendering operations have preceded this clear, a
 237     *      PIPE_CONTROL with write cache flush enabled and Z-inhibit
 238     *      disabled must be issued before the rectangle primitive used for
 239     *      the depth buffer clear operation."
 240     *
 241     * From the Sandy Bridge PRM, volume 2 part 1, page 314:
 242     *
 243     *     "Depth buffer clear pass must be followed by a PIPE_CONTROL
 244     *      command with DEPTH_STALL bit set and Then followed by Depth
 245     *      FLUSH"
 246     *
 247     * But the pipeline has to be flushed both before and after not only
 248     * because of these workarounds.  We need them for reasons such as
 249     *
 250     *  - we may sample from a texture that was rendered to
 251     *  - we may sample from the fb shortly after
 252     */
 253    if (!ilo_cp_empty(p->cp))
 254       ilo_3d_pipeline_emit_flush(p);
 255
 256    ilo_3d_pipeline_emit_rectlist(p, blitter);
 257
 258    ilo_3d_pipeline_emit_flush(p);
 259 }
 260
 261 /**
 262  * This must be called after ilo_blitter_set_fb().
 263  */
 264 static void
 265 hiz_set_rectlist(struct ilo_blitter *blitter, bool aligned)
 266 {
 267    unsigned width = blitter->fb.width;
 268    unsigned height = blitter->fb.height;
 269
 270    /*
 271     * From the Sandy Bridge PRM, volume 2 part 1, page 313-314:
 272     *
 273     *     "A rectangle primitive representing the clear area is delivered. The
 274     *      primitive must adhere to the following restrictions on size:
 275     *
 276     *      - If Number of Multisamples is NUMSAMPLES_1, the rectangle must be
 277     *        aligned to an 8x4 pixel block relative to the upper left corner
 278     *        of the depth buffer, and contain an integer number of these pixel
 279     *        blocks, and all 8x4 pixels must be lit.
 280     *
 281     *      - If Number of Multisamples is NUMSAMPLES_4, the rectangle must be
 282     *        aligned to a 4x2 pixel block (8x4 sample block) relative to the
 283     *        upper left corner of the depth buffer, and contain an integer
 284     *        number of these pixel blocks, and all samples of the 4x2 pixels
 285     *        must be lit
 286     *
 287     *      - If Number of Multisamples is NUMSAMPLES_8, the rectangle must be
 288     *        aligned to a 2x2 pixel block (8x4 sample block) relative to the
 289     *        upper left corner of the depth buffer, and contain an integer
 290     *        number of these pixel blocks, and all samples of the 2x2 pixels
 291     *        must be list."
 292     *
 293     *     "The following is required when performing a depth buffer resolve:
 294     *
 295     *      - A rectangle primitive of the same size as the previous depth
 296     *        buffer clear operation must be delivered, and depth buffer state
 297     *        cannot have changed since the previous depth buffer clear
 298     *        operation."
 299     *
 300     * Making the RECTLIST aligned to 8x4 is easy.  But how about
 301     * 3DSTATE_DRAWING_RECTANGLE and 3DSTATE_DEPTH_BUFFER?  Since we use
 302     * HALIGN_8 and VALIGN_4 for depth buffers, we can safely align the drawing
 303     * rectangle, except that the PRM requires the drawing rectangle to be
 304     * clampped to the render target boundary.  For 3DSTATE_DEPTH_BUFFER, we
 305     * cannot align the Width and Height fields if level or slice is greater
 306     * than zero.
 307     */
 308    if (aligned) {
 309       switch (blitter->fb.num_samples) {
 310       case 1:
 311          width = align(width, 8);
 312          height = align(height, 4);
 313          break;
 314       case 2:
 315          width = align(width, 4);
 316          height = align(height, 4);
 317          break;
 318       case 4:
 319          width = align(width, 4);
 320          height = align(height, 2);
 321          break;
 322       case 8:
 323       default:
 324          width = align(width, 2);
 325          height = align(height, 2);
 326          break;
 327       }
 328    }
 329
 330    ilo_blitter_set_rectlist(blitter, 0, 0, width, height);
 331 }
 332
 333 static bool
 334 hiz_can_clear_zs(const struct ilo_blitter *blitter,
 335                  const struct ilo_texture *tex)
 336 {
 337    if (blitter->ilo->dev->gen > ILO_GEN(6))
 338       return true;
 339
 340    /*
 341     * From the Sandy Bridge PRM, volume 2 part 1, page 314:
 342     *
 343     *      Several cases exist where Depth Buffer Clear cannot be enabled (the
 344     *      legacy method of clearing must be performed):
 345     *
 346     *      - If the depth buffer format is D32_FLOAT_S8X24_UINT or
 347     *        D24_UNORM_S8_UINT.
 348     *
 349     *      - If stencil test is enabled but the separate stencil buffer is
 350     *        disabled.
 351     *
 352     *      - [DevSNB-A{W/A}]: ...
 353     *
 354     *      - [DevSNB{W/A}]: When depth buffer format is D16_UNORM and the
 355     *        width of the map (LOD0) is not multiple of 16, fast clear
 356     *        optimization must be disabled.
 357     */
 358    switch (tex->bo_format) {
 359    case PIPE_FORMAT_Z16_UNORM:
 360       if (tex->base.width0 % 16)
 361          return false;
 362       break;
 363    case PIPE_FORMAT_Z24_UNORM_S8_UINT:
 364    case PIPE_FORMAT_Z32_FLOAT_S8X24_UINT:
 365       assert(!"HiZ with combined depth/stencil");
 366       return false;
 367       break;
 368    default:
 369       break;
 370    }
 371
 372    return true;
 373 }
 374
 375 bool
 376 ilo_blitter_rectlist_clear_zs(struct ilo_blitter *blitter,
 377                               struct pipe_surface *zs,
 378                               unsigned clear_flags,
 379                               double depth, unsigned stencil)
 380 {
 381    struct ilo_texture *tex = ilo_texture(zs->texture);
 382    struct pipe_depth_stencil_alpha_state dsa_state;
 383    uint32_t uses;
 384
 385    if (!ilo_texture_can_enable_hiz(tex,
 386             zs->u.tex.level, zs->u.tex.first_layer,
 387             zs->u.tex.last_layer - zs->u.tex.first_layer + 1))
 388       return false;
 389
 390    if (!hiz_can_clear_zs(blitter, tex))
 391       return false;
 392
 393    /*
 394     * From the Sandy Bridge PRM, volume 2 part 1, page 313-314:
 395     *
 396     *     "- Depth Test Enable must be disabled and Depth Buffer Write Enable
 397     *        must be enabled (if depth is being cleared).
 398     *
 399     *      - Stencil buffer clear can be performed at the same time by
 400     *        enabling Stencil Buffer Write Enable.  Stencil Test Enable must
 401     *        be enabled and Stencil Pass Depth Pass Op set to REPLACE, and the
 402     *        clear value that is placed in the stencil buffer is the Stencil
 403     *        Reference Value from COLOR_CALC_STATE.
 404     *
 405     *      - Note also that stencil buffer clear can be performed without
 406     *        depth buffer clear. For stencil only clear, Depth Test Enable and
 407     *        Depth Buffer Write Enable must be disabled.
 408     *
 409     *      - [DevSNB] errata: For stencil buffer only clear, the previous
 410     *        depth clear value must be delivered during the clear."
 411     */
 412    memset(&dsa_state, 0, sizeof(dsa_state));
 413
 414    if (clear_flags & PIPE_CLEAR_DEPTH)
 415       dsa_state.depth.writemask = true;
 416
 417    if (clear_flags & PIPE_CLEAR_STENCIL) {
 418       dsa_state.stencil[0].enabled = true;
 419       dsa_state.stencil[0].func = PIPE_FUNC_ALWAYS;
 420       dsa_state.stencil[0].fail_op = PIPE_STENCIL_OP_KEEP;
 421       dsa_state.stencil[0].zpass_op = PIPE_STENCIL_OP_REPLACE;
 422       dsa_state.stencil[0].zfail_op = PIPE_STENCIL_OP_KEEP;
 423
 424       /*
 425        * From the Ivy Bridge PRM, volume 2 part 1, page 277:
 426        *
 427        *     "Additionally the following must be set to the correct values.
 428        *
 429        *      - DEPTH_STENCIL_STATE::Stencil Write Mask must be 0xFF
 430        *      - DEPTH_STENCIL_STATE::Stencil Test Mask must be 0xFF
 431        *      - DEPTH_STENCIL_STATE::Back Face Stencil Write Mask must be 0xFF
 432        *      - DEPTH_STENCIL_STATE::Back Face Stencil Test Mask must be 0xFF"
 433        */
 434       dsa_state.stencil[0].valuemask = 0xff;
 435       dsa_state.stencil[0].writemask = 0xff;
 436       dsa_state.stencil[1].valuemask = 0xff;
 437       dsa_state.stencil[1].writemask = 0xff;
 438    }
 439
 440    ilo_blitter_set_invariants(blitter);
 441    ilo_blitter_set_op(blitter, ILO_BLITTER_RECTLIST_CLEAR_ZS);
 442
 443    ilo_blitter_set_dsa(blitter, &dsa_state);
 444    ilo_blitter_set_clear_values(blitter,
 445          util_pack_z(zs->format, depth), (ubyte) stencil);
 446    ilo_blitter_set_fb_from_surface(blitter, zs);
 447
 448    uses = ILO_BLITTER_USE_DSA;
 449    if (clear_flags & PIPE_CLEAR_DEPTH)
 450       uses |= ILO_BLITTER_USE_VIEWPORT | ILO_BLITTER_USE_FB_DEPTH;
 451    if (clear_flags & PIPE_CLEAR_STENCIL)
 452       uses |= ILO_BLITTER_USE_CC | ILO_BLITTER_USE_FB_STENCIL;
 453    ilo_blitter_set_uses(blitter, uses);
 454
 455    hiz_set_rectlist(blitter, true);
 456    hiz_emit_rectlist(blitter);
 457
 458    return true;
 459 }
 460
 461 void
 462 ilo_blitter_rectlist_resolve_z(struct ilo_blitter *blitter,
 463                                struct pipe_resource *res,
 464                                unsigned level, unsigned slice)
 465 {
 466    struct ilo_texture *tex = ilo_texture(res);
 467    struct pipe_depth_stencil_alpha_state dsa_state;
 468
 469    if (!ilo_texture_can_enable_hiz(tex, level, slice, 1))
 470       return;
 471
 472    /*
 473     * From the Sandy Bridge PRM, volume 2 part 1, page 314:
 474     *
 475     *     "Depth Test Enable must be enabled with the Depth Test Function set
 476     *      to NEVER. Depth Buffer Write Enable must be enabled. Stencil Test
 477     *      Enable and Stencil Buffer Write Enable must be disabled."
 478     */
 479    memset(&dsa_state, 0, sizeof(dsa_state));
 480    dsa_state.depth.writemask = true;
 481    dsa_state.depth.enabled = true;
 482    dsa_state.depth.func = PIPE_FUNC_NEVER;
 483
 484    ilo_blitter_set_invariants(blitter);
 485    ilo_blitter_set_op(blitter, ILO_BLITTER_RECTLIST_RESOLVE_Z);
 486
 487    ilo_blitter_set_dsa(blitter, &dsa_state);
 488    ilo_blitter_set_fb_from_resource(blitter, res, res->format, level, slice);
 489    ilo_blitter_set_uses(blitter,
 490          ILO_BLITTER_USE_DSA | ILO_BLITTER_USE_FB_DEPTH);
 491
 492    hiz_set_rectlist(blitter, true);
 493    hiz_emit_rectlist(blitter);
 494 }
 495
 496 void
 497 ilo_blitter_rectlist_resolve_hiz(struct ilo_blitter *blitter,
 498                                  struct pipe_resource *res,
 499                                  unsigned level, unsigned slice)
 500 {
 501    struct ilo_texture *tex = ilo_texture(res);
 502    struct pipe_depth_stencil_alpha_state dsa_state;
 503
 504    if (!ilo_texture_can_enable_hiz(tex, level, slice, 1))
 505       return;
 506
 507    /*
 508     * From the Sandy Bridge PRM, volume 2 part 1, page 315:
 509     *
 510     *     "(Hierarchical Depth Buffer Resolve) Depth Test Enable must be
 511     *      disabled. Depth Buffer Write Enable must be enabled. Stencil Test
 512     *      Enable and Stencil Buffer Write Enable must be disabled."
 513     */
 514    memset(&dsa_state, 0, sizeof(dsa_state));
 515    dsa_state.depth.writemask = true;
 516
 517    ilo_blitter_set_invariants(blitter);
 518    ilo_blitter_set_op(blitter, ILO_BLITTER_RECTLIST_RESOLVE_HIZ);
 519
 520    ilo_blitter_set_dsa(blitter, &dsa_state);
 521    ilo_blitter_set_fb_from_resource(blitter, res, res->format, level, slice);
 522    ilo_blitter_set_uses(blitter,
 523          ILO_BLITTER_USE_DSA | ILO_BLITTER_USE_FB_DEPTH);
 524
 525    hiz_set_rectlist(blitter, false);
 526    hiz_emit_rectlist(blitter);
 527 }